[media] s5p-fimc: Fix data structures documentation and cleanup debug trace
Correct inconsistencies in data structures' documentation. Remove meaningless debug traces. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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@ -262,12 +262,7 @@ static unsigned int get_plane_size(struct fimc_frame *fr, unsigned int plane)
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{
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if (!fr || plane >= fr->fmt->memplanes)
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return 0;
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dbg("%s: w: %d. h: %d. depth[%d]: %d",
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__func__, fr->width, fr->height, plane, fr->fmt->depth[plane]);
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return fr->f_width * fr->f_height * fr->fmt->depth[plane] / 8;
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}
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static int queue_setup(struct vb2_queue *vq, unsigned int *num_buffers,
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@ -283,12 +278,8 @@ static int queue_setup(struct vb2_queue *vq, unsigned int *num_buffers,
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*num_planes = fmt->memplanes;
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dbg("%s, buffer count=%d, plane count=%d",
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__func__, *num_buffers, *num_planes);
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for (i = 0; i < fmt->memplanes; i++) {
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sizes[i] = get_plane_size(&ctx->d_frame, i);
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dbg("plane: %u, plane_size: %lu", i, sizes[i]);
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allocators[i] = ctx->fimc_dev->alloc_ctx;
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}
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@ -231,11 +231,7 @@ static int fimc_get_scaler_factor(u32 src, u32 tar, u32 *ratio, u32 *shift)
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return 0;
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}
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}
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*shift = 0, *ratio = 1;
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dbg("s: %d, t: %d, shift: %d, ratio: %d",
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src, tar, *shift, *ratio);
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return 0;
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}
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@ -267,10 +263,8 @@ int fimc_set_scaler_info(struct fimc_ctx *ctx)
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err("invalid source size: %d x %d", sx, sy);
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return -EINVAL;
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}
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sc->real_width = sx;
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sc->real_height = sy;
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dbg("sx= %d, sy= %d, tx= %d, ty= %d", sx, sy, tx, ty);
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ret = fimc_get_scaler_factor(sx, tx, &sc->pre_hratio, &sc->hfactor);
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if (ret)
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@ -135,9 +135,10 @@ enum fimc_color_fmt {
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* @name: format description
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* @fourcc: the fourcc code for this format, 0 if not applicable
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* @color: the corresponding fimc_color_fmt
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* @depth: per plane driver's private 'number of bits per pixel'
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* @memplanes: number of physically non-contiguous data planes
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* @colplanes: number of physically contiguous data planes
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* @depth: per plane driver's private 'number of bits per pixel'
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* @flags: flags indicating which operation mode format applies to
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*/
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struct fimc_fmt {
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enum v4l2_mbus_pixelcode mbus_code;
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@ -171,7 +172,7 @@ struct fimc_dma_offset {
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};
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/**
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* struct fimc_effect - the configuration data for the "Arbitrary" image effect
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* struct fimc_effect - color effect information
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* @type: effect type
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* @pat_cb: cr value when type is "arbitrary"
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* @pat_cr: cr value when type is "arbitrary"
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@ -184,7 +185,6 @@ struct fimc_effect {
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/**
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* struct fimc_scaler - the configuration data for FIMC inetrnal scaler
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*
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* @scaleup_h: flag indicating scaling up horizontally
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* @scaleup_v: flag indicating scaling up vertically
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* @copy_mode: flag indicating transparent DMA transfer (no scaling
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@ -220,7 +220,6 @@ struct fimc_scaler {
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/**
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* struct fimc_addr - the FIMC physical address set for DMA
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*
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* @y: luminance plane physical address
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* @cb: Cb plane physical address
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* @cr: Cr plane physical address
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@ -234,6 +233,7 @@ struct fimc_addr {
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/**
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* struct fimc_vid_buffer - the driver's video buffer
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* @vb: v4l videobuf buffer
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* @list: linked list structure for buffer queue
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* @paddr: precalculated physical address set
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* @index: buffer index for the output DMA engine
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*/
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@ -254,11 +254,10 @@ struct fimc_vid_buffer {
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* @offs_v: image vertical pixel offset
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* @width: image pixel width
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* @height: image pixel weight
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* @paddr: image frame buffer physical addresses
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* @buf_cnt: number of buffers depending on a color format
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* @payload: image size in bytes (w x h x bpp)
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* @color: color format
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* @paddr: image frame buffer physical addresses
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* @dma_offset: DMA offset in bytes
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* @fmt: fimc color format pointer
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*/
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struct fimc_frame {
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u32 f_width;
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@ -390,21 +389,22 @@ struct fimc_ctx;
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/**
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* struct fimc_dev - abstraction for FIMC entity
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*
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* @slock: the spinlock protecting this data structure
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* @lock: the mutex protecting this data structure
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* @pdev: pointer to the FIMC platform device
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* @pdata: pointer to the device platform data
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* @variant: the IP variant information
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* @id: FIMC device index (0..FIMC_MAX_DEVS)
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* @num_clocks: the number of clocks managed by this device instance
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* @clock[]: the clocks required for FIMC operation
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* @clock: clocks required for FIMC operation
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* @regs: the mapped hardware registers
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* @regs_res: the resource claimed for IO registers
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* @irq: interrupt number of the FIMC subdevice
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* @irq_queue:
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* @irq: FIMC interrupt number
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* @irq_queue: interrupt handler waitqueue
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* @m2m: memory-to-memory V4L2 device information
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* @vid_cap: camera capture device information
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* @state: flags used to synchronize m2m and capture mode operation
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* @alloc_ctx: videobuf2 memory allocator context
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*/
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struct fimc_dev {
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spinlock_t slock;
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@ -427,8 +427,7 @@ struct fimc_dev {
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/**
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* fimc_ctx - the device context data
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*
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* @lock: mutex protecting this data structure
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* @slock: spinlock protecting this data structure
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* @s_frame: source frame properties
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* @d_frame: destination frame properties
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* @out_order_1p: output 1-plane YCBCR order
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