powerpc: Allow flush_icache_range to work across ranges >4GB
commit 29430fae82
upstream.
When calling flush_icache_range with a size >4GB, we were masking
off the upper 32 bits, so we would incorrectly flush a range smaller
than intended.
This patch replaces the 32 bit shifts with 64 bit ones, so that
the full size is accounted for.
Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
Cc: stable@vger.kernel.org
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20191104023305.9581-2-alastair@au1.ibm.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
5.4-rM2-2.2.x-imx-squashed
parent
e6d76815e9
commit
34d5d5a81f
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@ -82,7 +82,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
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subf r8,r6,r4 /* compute length */
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add r8,r8,r5 /* ensure we get enough */
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lwz r9,DCACHEL1LOGBLOCKSIZE(r10) /* Get log-2 of cache block size */
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srw. r8,r8,r9 /* compute line count */
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srd. r8,r8,r9 /* compute line count */
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beqlr /* nothing to do? */
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mtctr r8
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1: dcbst 0,r6
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@ -98,7 +98,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
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subf r8,r6,r4 /* compute length */
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add r8,r8,r5
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lwz r9,ICACHEL1LOGBLOCKSIZE(r10) /* Get log-2 of Icache block size */
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srw. r8,r8,r9 /* compute line count */
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srd. r8,r8,r9 /* compute line count */
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beqlr /* nothing to do? */
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mtctr r8
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2: icbi 0,r6
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