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drm: Replace drm_format_plane_cpp() with fb->format->cpp[] 

Replace drm_format_plane_cpp(fb->pixel_format) with just
fb->format->cpp[]. Avoids the expensive format info lookup.

@@
struct drm_framebuffer *a;
struct drm_framebuffer b;
expression E;
@@
(
- drm_format_plane_cpp(a->pixel_format, E)
+ a->format->cpp[E]
|
- drm_format_plane_cpp(b.pixel_format, E)
+ b.format->cpp[E]
)

@@
struct drm_plane_state *a;
struct drm_plane_state b;
expression E;
@@
(
- drm_format_plane_cpp(a->fb->pixel_format, E)
+ a->fb->format->cpp[E]
|
- drm_format_plane_cpp(b.fb->pixel_format, E)
+ b.fb->format->cpp[E]
)

@@
struct drm_framebuffer *a;
identifier T;
expression E;
@@
  T = a->pixel_format
<+...
- drm_format_plane_cpp(T, E)
+ a->format->cpp[E]
...+>

@@
struct drm_framebuffer b;
identifier T;
expression E;
@@
  T = b.pixel_format
<+...
- drm_format_plane_cpp(T, E)
+ b.format->cpp[E]
...+>

v2: Rerun spatch due to code changes

Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1481751057-18123-1-git-send-email-ville.syrjala@linux.intel.com
hifive-unleashed-5.1
Ville Syrjälä 2016-12-14 23:30:57 +02:00
parent 8305494e1e
commit 353c859899
15 changed files with 45 additions and 46 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/arm/hdlcd_crtc.c
View File

@ -238,7 +238,7 @@ static void hdlcd_plane_atomic_update(struct drm_plane *plane,
scanout_start = gem->paddr + fb->offsets[0] +
plane->state->crtc_y * fb->pitches[0] +
plane->state->crtc_x *
drm_format_plane_cpp(fb->pixel_format, 0);
fb->format->cpp[0];
hdlcd = plane->dev->dev_private;
hdlcd_write(hdlcd, HDLCD_REG_FB_LINE_LENGTH, fb->pitches[0]);

3
drivers/gpu/drm/armada/armada_crtc.c
View File

@ -169,7 +169,6 @@ void armada_drm_plane_calc_addrs(u32 *addrs, struct drm_framebuffer *fb,
int x, int y)
{
u32 addr = drm_fb_obj(fb)->dev_addr;
u32 pixel_format = fb->pixel_format;
int num_planes = fb->format->num_planes;
int i;
@ -178,7 +177,7 @@ void armada_drm_plane_calc_addrs(u32 *addrs, struct drm_framebuffer *fb,
for (i = 0; i < num_planes; i++)
addrs[i] = addr + fb->offsets[i] + y * fb->pitches[i] +
x * drm_format_plane_cpp(pixel_format, i);
x * fb->format->cpp[i];
for (; i < 3; i++)
addrs[i] = 0;
}

2
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
View File

@ -672,7 +672,7 @@ static int atmel_hlcdc_plane_atomic_check(struct drm_plane *p,
int xdiv = i ? hsub : 1;
int ydiv = i ? vsub : 1;
state->bpp[i] = drm_format_plane_cpp(fb->pixel_format, i);
state->bpp[i] = fb->format->cpp[i];
if (!state->bpp[i])
return -EINVAL;

16
drivers/gpu/drm/i915/intel_display.c
View File

@ -2275,7 +2275,7 @@ u32 intel_fb_xy_to_linear(int x, int y,
int plane)
{
const struct drm_framebuffer *fb = state->base.fb;
unsigned int cpp = drm_format_plane_cpp(fb->pixel_format, plane);
unsigned int cpp = fb->format->cpp[plane];
unsigned int pitch = fb->pitches[plane];
return y * pitch + x * cpp;
@ -2344,7 +2344,7 @@ static u32 intel_adjust_tile_offset(int *x, int *y,
{
const struct drm_i915_private *dev_priv = to_i915(state->base.plane->dev);
const struct drm_framebuffer *fb = state->base.fb;
unsigned int cpp = drm_format_plane_cpp(fb->pixel_format, plane);
unsigned int cpp = fb->format->cpp[plane];
unsigned int rotation = state->base.rotation;
unsigned int pitch = intel_fb_pitch(fb, plane, rotation);
@ -2400,7 +2400,7 @@ static u32 _intel_compute_tile_offset(const struct drm_i915_private *dev_priv,
u32 alignment)
{
uint64_t fb_modifier = fb->modifier;
unsigned int cpp = drm_format_plane_cpp(fb->pixel_format, plane);
unsigned int cpp = fb->format->cpp[plane];
u32 offset, offset_aligned;
if (alignment)
@ -2468,7 +2468,7 @@ u32 intel_compute_tile_offset(int *x, int *y,
static void intel_fb_offset_to_xy(int *x, int *y,
const struct drm_framebuffer *fb, int plane)
{
unsigned int cpp = drm_format_plane_cpp(fb->pixel_format, plane);
unsigned int cpp = fb->format->cpp[plane];
unsigned int pitch = fb->pitches[plane];
u32 linear_offset = fb->offsets[plane];
@ -2506,7 +2506,7 @@ intel_fill_fb_info(struct drm_i915_private *dev_priv,
u32 offset;
int x, y;
cpp = drm_format_plane_cpp(format, i);
cpp = fb->format->cpp[i];
width = drm_format_plane_width(fb->width, format, i);
height = drm_format_plane_height(fb->height, format, i);
@ -2833,7 +2833,7 @@ valid_fb:
static int skl_max_plane_width(const struct drm_framebuffer *fb, int plane,
unsigned int rotation)
{
int cpp = drm_format_plane_cpp(fb->pixel_format, plane);
int cpp = fb->format->cpp[plane];
switch (fb->modifier) {
case DRM_FORMAT_MOD_NONE:
@ -2912,7 +2912,7 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state)
* TODO: linear and Y-tiled seem fine, Yf untested,
*/
if (fb->modifier == I915_FORMAT_MOD_X_TILED) {
int cpp = drm_format_plane_cpp(fb->pixel_format, 0);
int cpp = fb->format->cpp[0];
while ((x + w) * cpp > fb->pitches[0]) {
if (offset == 0) {
@ -3278,7 +3278,7 @@ u32 skl_plane_stride(const struct drm_framebuffer *fb, int plane,
* linear buffers or in number of tiles for tiled buffers.
*/
if (drm_rotation_90_or_270(rotation)) {
int cpp = drm_format_plane_cpp(fb->pixel_format, plane);
int cpp = fb->format->cpp[plane];
stride /= intel_tile_height(dev_priv, fb->modifier, cpp);
} else {

42
drivers/gpu/drm/i915/intel_pm.c
View File

@ -652,7 +652,7 @@ static void pineview_update_wm(struct intel_crtc *unused_crtc)
&crtc->config->base.adjusted_mode;
const struct drm_framebuffer *fb =
crtc->base.primary->state->fb;
int cpp = drm_format_plane_cpp(fb->pixel_format, 0);
int cpp = fb->format->cpp[0];
int clock = adjusted_mode->crtc_clock;
/* Display SR */
@ -727,7 +727,7 @@ static bool g4x_compute_wm0(struct drm_i915_private *dev_priv,
clock = adjusted_mode->crtc_clock;
htotal = adjusted_mode->crtc_htotal;
hdisplay = crtc->config->pipe_src_w;
cpp = drm_format_plane_cpp(fb->pixel_format, 0);
cpp = fb->format->cpp[0];
/* Use the small buffer method to calculate plane watermark */
entries = ((clock * cpp / 1000) * display_latency_ns) / 1000;
@ -816,7 +816,7 @@ static bool g4x_compute_srwm(struct drm_i915_private *dev_priv,
clock = adjusted_mode->crtc_clock;
htotal = adjusted_mode->crtc_htotal;
hdisplay = crtc->config->pipe_src_w;
cpp = drm_format_plane_cpp(fb->pixel_format, 0);
cpp = fb->format->cpp[0];
line_time_us = max(htotal * 1000 / clock, 1);
line_count = (latency_ns / line_time_us + 1000) / 1000;
@ -963,7 +963,7 @@ static uint16_t vlv_compute_wm_level(struct intel_plane *plane,
if (!state->base.visible)
return 0;
cpp = drm_format_plane_cpp(state->base.fb->pixel_format, 0);
cpp = state->base.fb->format->cpp[0];
clock = crtc->config->base.adjusted_mode.crtc_clock;
htotal = crtc->config->base.adjusted_mode.crtc_htotal;
width = crtc->config->pipe_src_w;
@ -1004,7 +1004,7 @@ static void vlv_compute_fifo(struct intel_crtc *crtc)
if (state->base.visible) {
wm_state->num_active_planes++;
total_rate += drm_format_plane_cpp(state->base.fb->pixel_format, 0);
total_rate += state->base.fb->format->cpp[0];
}
}
@ -1023,7 +1023,7 @@ static void vlv_compute_fifo(struct intel_crtc *crtc)
continue;
}
rate = drm_format_plane_cpp(state->base.fb->pixel_format, 0);
rate = state->base.fb->format->cpp[0];
plane->wm.fifo_size = fifo_size * rate / total_rate;
fifo_left -= plane->wm.fifo_size;
}
@ -1455,7 +1455,7 @@ static void i965_update_wm(struct intel_crtc *unused_crtc)
int clock = adjusted_mode->crtc_clock;
int htotal = adjusted_mode->crtc_htotal;
int hdisplay = crtc->config->pipe_src_w;
int cpp = drm_format_plane_cpp(fb->pixel_format, 0);
int cpp = fb->format->cpp[0];
unsigned long line_time_us;
int entries;
@ -1541,7 +1541,7 @@ static void i9xx_update_wm(struct intel_crtc *unused_crtc)
if (IS_GEN2(dev_priv))
cpp = 4;
else
cpp = drm_format_plane_cpp(fb->pixel_format, 0);
cpp = fb->format->cpp[0];
planea_wm = intel_calculate_wm(adjusted_mode->crtc_clock,
wm_info, fifo_size, cpp,
@ -1568,7 +1568,7 @@ static void i9xx_update_wm(struct intel_crtc *unused_crtc)
if (IS_GEN2(dev_priv))
cpp = 4;
else
cpp = drm_format_plane_cpp(fb->pixel_format, 0);
cpp = fb->format->cpp[0];
planeb_wm = intel_calculate_wm(adjusted_mode->crtc_clock,
wm_info, fifo_size, cpp,
@ -1621,7 +1621,7 @@ static void i9xx_update_wm(struct intel_crtc *unused_crtc)
if (IS_I915GM(dev_priv) || IS_I945GM(dev_priv))
cpp = 4;
else
cpp = drm_format_plane_cpp(fb->pixel_format, 0);
cpp = fb->format->cpp[0];
line_time_us = max(htotal * 1000 / clock, 1);
@ -1787,7 +1787,7 @@ static uint32_t ilk_compute_pri_wm(const struct intel_crtc_state *cstate,
if (!cstate->base.active || !pstate->base.visible)
return 0;
cpp = drm_format_plane_cpp(pstate->base.fb->pixel_format, 0);
cpp = pstate->base.fb->format->cpp[0];
method1 = ilk_wm_method1(ilk_pipe_pixel_rate(cstate), cpp, mem_value);
@ -1816,7 +1816,7 @@ static uint32_t ilk_compute_spr_wm(const struct intel_crtc_state *cstate,
if (!cstate->base.active || !pstate->base.visible)
return 0;
cpp = drm_format_plane_cpp(pstate->base.fb->pixel_format, 0);
cpp = pstate->base.fb->format->cpp[0];
method1 = ilk_wm_method1(ilk_pipe_pixel_rate(cstate), cpp, mem_value);
method2 = ilk_wm_method2(ilk_pipe_pixel_rate(cstate),
@ -1860,7 +1860,7 @@ static uint32_t ilk_compute_fbc_wm(const struct intel_crtc_state *cstate,
if (!cstate->base.active || !pstate->base.visible)
return 0;
cpp = drm_format_plane_cpp(pstate->base.fb->pixel_format, 0);
cpp = pstate->base.fb->format->cpp[0];
return ilk_wm_fbc(pri_val, drm_rect_width(&pstate->base.dst), cpp);
}
@ -3258,13 +3258,13 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate,
if (format == DRM_FORMAT_NV12) {
if (y) /* y-plane data rate */
data_rate = width * height *
drm_format_plane_cpp(format, 0);
fb->format->cpp[0];
else /* uv-plane data rate */
data_rate = (width / 2) * (height / 2) *
drm_format_plane_cpp(format, 1);
fb->format->cpp[1];
} else {
/* for packed formats */
data_rate = width * height * drm_format_plane_cpp(format, 0);
data_rate = width * height * fb->format->cpp[0];
}
down_scale_amount = skl_plane_downscale_amount(intel_pstate);
@ -3351,9 +3351,9 @@ skl_ddb_min_alloc(const struct drm_plane_state *pstate,
}
if (fb->pixel_format == DRM_FORMAT_NV12 && !y)
plane_bpp = drm_format_plane_cpp(fb->pixel_format, 1);
plane_bpp = fb->format->cpp[1];
else
plane_bpp = drm_format_plane_cpp(fb->pixel_format, 0);
plane_bpp = fb->format->cpp[0];
if (drm_rotation_90_or_270(pstate->rotation)) {
switch (plane_bpp) {
@ -3613,13 +3613,13 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
if (drm_rotation_90_or_270(pstate->rotation))
swap(width, height);
cpp = drm_format_plane_cpp(fb->pixel_format, 0);
cpp = fb->format->cpp[0];
plane_pixel_rate = skl_adjusted_plane_pixel_rate(cstate, intel_pstate);
if (drm_rotation_90_or_270(pstate->rotation)) {
int cpp = (fb->pixel_format == DRM_FORMAT_NV12) ?
drm_format_plane_cpp(fb->pixel_format, 1) :
drm_format_plane_cpp(fb->pixel_format, 0);
fb->format->cpp[1] :
fb->format->cpp[0];
switch (cpp) {
case 1:

2
drivers/gpu/drm/i915/intel_sprite.c
View File

@ -885,7 +885,7 @@ intel_check_sprite_plane(struct drm_plane *plane,
/* Check size restrictions when scaling */
if (state->base.visible && (src_w != crtc_w || src_h != crtc_h)) {
unsigned int width_bytes;
int cpp = drm_format_plane_cpp(fb->pixel_format, 0);
int cpp = fb->format->cpp[0];
WARN_ON(!can_scale);

6
drivers/gpu/drm/imx/ipuv3-plane.c
View File

@ -77,7 +77,7 @@ drm_plane_state_to_eba(struct drm_plane_state *state)
BUG_ON(!cma_obj);
return cma_obj->paddr + fb->offsets[0] + fb->pitches[0] * y +
drm_format_plane_cpp(fb->pixel_format, 0) * x;
fb->format->cpp[0] * x;
}
static inline unsigned long
@ -96,7 +96,7 @@ drm_plane_state_to_ubo(struct drm_plane_state *state)
y /= drm_format_vert_chroma_subsampling(fb->pixel_format);
return cma_obj->paddr + fb->offsets[1] + fb->pitches[1] * y +
drm_format_plane_cpp(fb->pixel_format, 1) * x - eba;
fb->format->cpp[1] * x - eba;
}
static inline unsigned long
@ -115,7 +115,7 @@ drm_plane_state_to_vbo(struct drm_plane_state *state)
y /= drm_format_vert_chroma_subsampling(fb->pixel_format);
return cma_obj->paddr + fb->offsets[2] + fb->pitches[2] * y +
drm_format_plane_cpp(fb->pixel_format, 2) * x - eba;
fb->format->cpp[2] * x - eba;
}
void ipu_plane_put_resources(struct ipu_plane *ipu_plane)

2
drivers/gpu/drm/mediatek/mtk_drm_plane.c
View File

@ -135,7 +135,7 @@ static void mtk_plane_atomic_update(struct drm_plane *plane,
pitch = fb->pitches[0];
format = fb->pixel_format;
addr += (plane->state->src.x1 >> 16) * drm_format_plane_cpp(format, 0);
addr += (plane->state->src.x1 >> 16) * fb->format->cpp[0];
addr += (plane->state->src.y1 >> 16) * pitch;
state->pending.enable = true;

4
drivers/gpu/drm/rockchip/rockchip_drm_vop.c
View File

@ -749,7 +749,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
dsp_sty = dest->y1 + crtc->mode.vtotal - crtc->mode.vsync_start;
dsp_st = dsp_sty << 16 | (dsp_stx & 0xffff);
offset = (src->x1 >> 16) * drm_format_plane_cpp(fb->pixel_format, 0);
offset = (src->x1 >> 16) * fb->format->cpp[0];
offset += (src->y1 >> 16) * fb->pitches[0];
dma_addr = rk_obj->dma_addr + offset + fb->offsets[0];
@ -763,7 +763,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
if (is_yuv_support(fb->pixel_format)) {
int hsub = drm_format_horz_chroma_subsampling(fb->pixel_format);
int vsub = drm_format_vert_chroma_subsampling(fb->pixel_format);
int bpp = drm_format_plane_cpp(fb->pixel_format, 1);
int bpp = fb->format->cpp[1];
uv_obj = rockchip_fb_get_gem_obj(fb, 1);
rk_uv_obj = to_rockchip_obj(uv_obj);

2
drivers/gpu/drm/sti/sti_gdp.c
View File

@ -757,7 +757,7 @@ static void sti_gdp_atomic_update(struct drm_plane *drm_plane,
(unsigned long)cma_obj->paddr);
/* pixel memory location */
bpp = drm_format_plane_cpp(fb->pixel_format, 0);
bpp = fb->format->cpp[0];
top_field->gam_gdp_pml = (u32)cma_obj->paddr + fb->offsets[0];
top_field->gam_gdp_pml += src_x * bpp;
top_field->gam_gdp_pml += src_y * fb->pitches[0];

2
drivers/gpu/drm/sun4i/sun4i_backend.c
View File

@ -218,7 +218,7 @@ int sun4i_backend_update_layer_buffer(struct sun4i_backend *backend,
DRM_DEBUG_DRIVER("Using GEM @ %pad\n", &gem->paddr);
/* Compute the start of the displayed memory */
bpp = drm_format_plane_cpp(fb->pixel_format, 0);
bpp = fb->format->cpp[0];
paddr = gem->paddr + fb->offsets[0];
paddr += (state->src_x >> 16) * bpp;
paddr += (state->src_y >> 16) * fb->pitches[0];

2
drivers/gpu/drm/tilcdc/tilcdc_crtc.c
View File

@ -91,7 +91,7 @@ static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb)
start = gem->paddr + fb->offsets[0] +
crtc->y * fb->pitches[0] +
crtc->x * drm_format_plane_cpp(fb->pixel_format, 0);
crtc->x * fb->format->cpp[0];
end = start + (crtc->mode.vdisplay * fb->pitches[0]);

2
drivers/gpu/drm/tilcdc/tilcdc_plane.c
View File

@ -69,7 +69,7 @@ static int tilcdc_plane_atomic_check(struct drm_plane *plane,
}
pitch = crtc_state->mode.hdisplay *
drm_format_plane_cpp(state->fb->pixel_format, 0);
state->fb->format->cpp[0];
if (state->fb->pitches[0] != pitch) {
dev_err(plane->dev->dev,
"Invalid pitch: fb and crtc widths must be the same");

2
drivers/gpu/drm/vc4/vc4_plane.c
View File

@ -369,7 +369,7 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
*/
if (vc4_state->crtc_x < 0) {
for (i = 0; i < num_planes; i++) {
u32 cpp = drm_format_plane_cpp(fb->pixel_format, i);
u32 cpp = fb->format->cpp[i];
u32 subs = ((i == 0) ? 1 : h_subsample);
vc4_state->offsets[i] += (cpp *

2
drivers/gpu/drm/zte/zx_plane.c
View File

@ -159,7 +159,7 @@ static void zx_gl_plane_atomic_update(struct drm_plane *plane,
dst_w = plane->state->crtc_w;
dst_h = plane->state->crtc_h;
bpp = drm_format_plane_cpp(format, 0);
bpp = fb->format->cpp[0];
cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
paddr = cma_obj->paddr + fb->offsets[0];