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ARM: imx6: initialize CCM_CLPCR_LPM into RUN mode earlier 

Commit 4631960d26da ("ARM: imx6: set initial power mode in pm function")
moves imx6_set_lpm() from clock init function into
imx6_pm_common_init().  This causes a hang when cpuidle support is
enabled.  The reason for that is ARM core clock is shut down
unexpectedly by WAIT mode.  It happens with the following call stack:

    cpuidle_register_governor()
        cpuidle_switch_governor()
            cpuidle_uninstall_idle_handler()
                synchronize_sched()
                    wait_rcu_gp()
                        wait_for_completion()

When wait_for_completion() is called as above, all cores are idle/WFI.
Hence, the reset value of CCM_CLPCR_LPM - WAIT mode, will trigger a
hardware shutdown of the ARM core clock.

To fix the regression, we need to ensure that CCM_CLPCR_LPM is
initialized into RUN mode earlier than cpuidle governor registration,
which is a postcore_initcall.  This patch creates function
imx6_pm_ccm_init() to map CCM block and initialize CCM_CLPCR_LPM into
RUN mode, and have the function called from machine .init_irq hook,
which should be early enough.

Reported-by: Kevin Hilman <khilman@kernel.org>
Fixes: 8fb76a07e2 ("ARM: imx6: set initial power mode in pm function")
Tested-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Tyler Baker <tyler.baker@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
hifive-unleashed-5.1
Shawn Guo 2015-04-29 13:07:03 +08:00
parent de8e434d09
commit 35e2916f70
5 changed files with 22 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/mach-imx/common.h
View File

@ -123,6 +123,7 @@ static inline void v7_cpu_resume(void) {}
static inline void imx6_suspend(void __iomem *ocram_vbase) {}
#endif
void imx6_pm_ccm_init(const char *ccm_compat);
void imx6q_pm_init(void);
void imx6dl_pm_init(void);
void imx6sl_pm_init(void);

1
arch/arm/mach-imx/mach-imx6q.c
View File

@ -393,6 +393,7 @@ static void __init imx6q_init_irq(void)
imx_init_l2cache();
imx_src_init();
irqchip_init();
imx6_pm_ccm_init("fsl,imx6q-ccm");
}
static const char * const imx6q_dt_compat[] __initconst = {

1
arch/arm/mach-imx/mach-imx6sl.c
View File

@ -66,6 +66,7 @@ static void __init imx6sl_init_irq(void)
imx_init_l2cache();
imx_src_init();
irqchip_init();
imx6_pm_ccm_init("fsl,imx6sl-ccm");
}
static const char * const imx6sl_dt_compat[] __initconst = {

1
arch/arm/mach-imx/mach-imx6sx.c
View File

@ -86,6 +86,7 @@ static void __init imx6sx_init_irq(void)
imx_init_l2cache();
imx_src_init();
irqchip_init();
imx6_pm_ccm_init("fsl,imx6sx-ccm");
}
static void __init imx6sx_init_late(void)

28
arch/arm/mach-imx/pm-imx6.c
View File

@ -89,7 +89,6 @@ struct imx6_pm_base {
struct imx6_pm_socdata {
u32 ddr_type;
const char *ccm_compat;
const char *mmdc_compat;
const char *src_compat;
const char *iomuxc_compat;
@ -139,7 +138,6 @@ static const u32 imx6sx_mmdc_io_offset[] __initconst = {
};
static const struct imx6_pm_socdata imx6q_pm_data __initconst = {
.ccm_compat = "fsl,imx6q-ccm",
.mmdc_compat = "fsl,imx6q-mmdc",
.src_compat = "fsl,imx6q-src",
.iomuxc_compat = "fsl,imx6q-iomuxc",
@ -149,7 +147,6 @@ static const struct imx6_pm_socdata imx6q_pm_data __initconst = {
};
static const struct imx6_pm_socdata imx6dl_pm_data __initconst = {
.ccm_compat = "fsl,imx6q-ccm",
.mmdc_compat = "fsl,imx6q-mmdc",
.src_compat = "fsl,imx6q-src",
.iomuxc_compat = "fsl,imx6dl-iomuxc",
@ -159,7 +156,6 @@ static const struct imx6_pm_socdata imx6dl_pm_data __initconst = {
};
static const struct imx6_pm_socdata imx6sl_pm_data __initconst = {
.ccm_compat = "fsl,imx6sl-ccm",
.mmdc_compat = "fsl,imx6sl-mmdc",
.src_compat = "fsl,imx6sl-src",
.iomuxc_compat = "fsl,imx6sl-iomuxc",
@ -169,7 +165,6 @@ static const struct imx6_pm_socdata imx6sl_pm_data __initconst = {
};
static const struct imx6_pm_socdata imx6sx_pm_data __initconst = {
.ccm_compat = "fsl,imx6sx-ccm",
.mmdc_compat = "fsl,imx6sx-mmdc",
.src_compat = "fsl,imx6sx-src",
.iomuxc_compat = "fsl,imx6sx-iomuxc",
@ -553,16 +548,11 @@ put_node:
static void __init imx6_pm_common_init(const struct imx6_pm_socdata
*socdata)
{
struct device_node *np;
struct regmap *gpr;
int ret;
np = of_find_compatible_node(NULL, NULL, socdata->ccm_compat);
ccm_base = of_iomap(np, 0);
WARN_ON(!ccm_base);
imx6_set_lpm(WAIT_CLOCKED);
if (IS_ENABLED(CONFIG_SUSPEND)) {
ret = imx6q_suspend_init(socdata);
if (ret)
@ -583,6 +573,24 @@ static void __init imx6_pm_common_init(const struct imx6_pm_socdata
IMX6Q_GPR1_GINT);
}
void __init imx6_pm_ccm_init(const char *ccm_compat)
{
struct device_node *np;
u32 val;
np = of_find_compatible_node(NULL, NULL, ccm_compat);
ccm_base = of_iomap(np, 0);
BUG_ON(!ccm_base);
/*
* Initialize CCM_CLPCR_LPM into RUN mode to avoid ARM core
* clock being shut down unexpectedly by WAIT mode.
*/
val = readl_relaxed(ccm_base + CLPCR);
val &= ~BM_CLPCR_LPM;
writel_relaxed(val, ccm_base + CLPCR);
}
void __init imx6q_pm_init(void)
{
imx6_pm_common_init(&imx6q_pm_data);