[ARM] kirkwood: fix PCI I/O port assignment
Instead of allocating PCI devices I/O port bus addresses from the 000xxxxx I/O port range as intended, due to a bus versus physical address mixup, the Kirkwood PCIe handling code inadvertently allocated I/O port bus addresses from the f20xxxxx address range (which is the physical address range of the PCIe I/O mapping window), but then direct all I/O port accesses to bus addresses 000xxxxx, which would then not be decoded at all. Fix this by setting the base address of the PCIe I/O space struct resource to KIRKWOOD_PCIE_IO_BUS_BASE instead of the incorrect KIRKWOOD_PCIE_IO_PHYS_BASE, and fix up __io() to expect addresses offsetted by the former instead of the latter. (The suggested fix of directing I/O port accesses from the host to bus addresses f20xxxxx instead has the problem that assigning full 32bit I/O port bus addresses (f20xxxxx) doesn't work on all PCI devices, as not all PCI devices implement full 32 bit BAR registers for I/O ports. We should really try to allocate I/O port bus addresses that fit in 16 bits.) Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
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@ -15,7 +15,7 @@
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static inline void __iomem *__io(unsigned long addr)
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{
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return (void __iomem *)((addr - KIRKWOOD_PCIE_IO_PHYS_BASE)
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return (void __iomem *)((addr - KIRKWOOD_PCIE_IO_BUS_BASE)
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+ KIRKWOOD_PCIE_IO_VIRT_BASE);
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}
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@ -115,7 +115,7 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
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*/
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res[0].name = "PCIe I/O Space";
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res[0].flags = IORESOURCE_IO;
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res[0].start = KIRKWOOD_PCIE_IO_PHYS_BASE;
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res[0].start = KIRKWOOD_PCIE_IO_BUS_BASE;
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res[0].end = res[0].start + KIRKWOOD_PCIE_IO_SIZE - 1;
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if (request_resource(&ioport_resource, &res[0]))
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panic("Request PCIe IO resource failed\n");
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