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drm/nouveau/bios: add 0x59 and 0x5a opcodes

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Opcode 0x5a is a register write for data looked up from another part of
the VBIOS image. 0x59 is a more complex opcode, but we may as well
recognize it. These occur on a single known instance of Riva TNT2
hardware.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91025
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ilia Mirkin 2015-06-18 23:59:06 -04:00 committed by Ben Skeggs
parent 1196bcf921
commit 360ccb8436
1 changed files with 24 additions and 0 deletions
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24
drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c
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@ -577,6 +577,9 @@ init_reserved(struct nvbios_init *init)
u8 length, i;
switch (opcode) {
case 0x59:
length = 7;
break;
case 0xaa:
length = 4;
break;
@ -1284,6 +1287,25 @@ init_zm_reg_sequence(struct nvbios_init *init)
}
}
/**
* INIT_ZM_REG_INDIRECT - opcode 0x5a
*
*/
static void
init_zm_reg_indirect(struct nvbios_init *init)
{
struct nvkm_bios *bios = init->bios;
u32 reg = nv_ro32(bios, init->offset + 1);
u16 addr = nv_ro16(bios, init->offset + 5);
u32 data = nv_ro32(bios, addr);
trace("ZM_REG_INDIRECT\tR[0x%06x] = VBIOS[0x%04x] = 0x%08x\n",
reg, addr, data);
init->offset += 7;
init_wr32(init, addr, data);
}
/**
* INIT_SUB_DIRECT - opcode 0x5b
*
@ -2145,6 +2167,8 @@ static struct nvbios_init_opcode {
[0x56] = { init_condition_time },
[0x57] = { init_ltime },
[0x58] = { init_zm_reg_sequence },
[0x59] = { init_reserved },
[0x5a] = { init_zm_reg_indirect },
[0x5b] = { init_sub_direct },
[0x5c] = { init_jump },
[0x5e] = { init_i2c_if },