drm/nouveau/bios: add 0x59 and 0x5a opcodes
Opcode 0x5a is a register write for data looked up from another part of the VBIOS image. 0x59 is a more complex opcode, but we may as well recognize it. These occur on a single known instance of Riva TNT2 hardware. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91025 Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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@ -577,6 +577,9 @@ init_reserved(struct nvbios_init *init)
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u8 length, i;
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switch (opcode) {
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case 0x59:
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length = 7;
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break;
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case 0xaa:
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length = 4;
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break;
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@ -1284,6 +1287,25 @@ init_zm_reg_sequence(struct nvbios_init *init)
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}
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}
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/**
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* INIT_ZM_REG_INDIRECT - opcode 0x5a
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*
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*/
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static void
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init_zm_reg_indirect(struct nvbios_init *init)
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{
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struct nvkm_bios *bios = init->bios;
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u32 reg = nv_ro32(bios, init->offset + 1);
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u16 addr = nv_ro16(bios, init->offset + 5);
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u32 data = nv_ro32(bios, addr);
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trace("ZM_REG_INDIRECT\tR[0x%06x] = VBIOS[0x%04x] = 0x%08x\n",
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reg, addr, data);
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init->offset += 7;
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init_wr32(init, addr, data);
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}
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/**
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* INIT_SUB_DIRECT - opcode 0x5b
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*
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@ -2145,6 +2167,8 @@ static struct nvbios_init_opcode {
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[0x56] = { init_condition_time },
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[0x57] = { init_ltime },
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[0x58] = { init_zm_reg_sequence },
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[0x59] = { init_reserved },
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[0x5a] = { init_zm_reg_indirect },
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[0x5b] = { init_sub_direct },
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[0x5c] = { init_jump },
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[0x5e] = { init_i2c_if },
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