spi: Fixes for v4.3

A small collection of pretty much unremarkable driver specific fixes
 here plus the addition of a new device ID to spidev which requires no
 other code changes.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJVsm2PAAoJECTWi3JdVIfQlf0H/RmLs7XxNF6iIFsZDj32Pwn0
 Oau1DhwYyMRwH+j6llALHNKi5s5aXjwzjWLTTS8NPa/anT86GscybXiMtMaZoutD
 JITGP2fL0QS1GHxwKu0PIYeTiGK09tZ3x+U8Hc9P4rsdaxl9GIQq6MEKv7rO4eHe
 vrmLdLrtywprKsP2A4DLSOaYjIbPuvrHOYutELUO+4Y6a+t3vSFrZtAgzN6N2YZC
 BR2MljgffFPUIXCXI3rEtH1unzLVoTRqSDOgE4BZ8Yf4mxLNMn1/huaDugDEHhPi
 FQPDjv0bARDzQwgHt4i8axdRi1mVrQKxXe4ZS6syw/YC/XNDQbWcc8JRBn1le98=
 =C+po
 -----END PGP SIGNATURE-----

Merge tag 'spi-fix-v4.2-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Pull spi fixes from Mark Brown:
 "A small collection of pretty much unremarkable driver specific fixes
  here plus the addition of a new device ID to spidev which requires no
  other code changes"

* tag 'spi-fix-v4.2-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
  spi: imx: Fix small DMA transfers
  spi: zynq: missing break statement
  spi: SPI_ZYNQMP_GQSPI should depend on HAS_DMA
  spi: spidev: add compatible value for LTC2488
  spi: img-spfi: fix support for speeds up to 1/4th input clock
This commit is contained in:
Linus Torvalds 2015-07-24 13:13:28 -07:00
commit 365c83c3f5
5 changed files with 8 additions and 3 deletions

View file

@ -612,7 +612,7 @@ config SPI_XTENSA_XTFPGA
config SPI_ZYNQMP_GQSPI
tristate "Xilinx ZynqMP GQSPI controller"
depends on SPI_MASTER
depends on SPI_MASTER && HAS_DMA
help
Enables Xilinx GQSPI controller driver for Zynq UltraScale+ MPSoC.

View file

@ -40,6 +40,7 @@
#define SPFI_CONTROL_SOFT_RESET BIT(11)
#define SPFI_CONTROL_SEND_DMA BIT(10)
#define SPFI_CONTROL_GET_DMA BIT(9)
#define SPFI_CONTROL_SE BIT(8)
#define SPFI_CONTROL_TMODE_SHIFT 5
#define SPFI_CONTROL_TMODE_MASK 0x7
#define SPFI_CONTROL_TMODE_SINGLE 0
@ -491,6 +492,7 @@ static void img_spfi_config(struct spi_master *master, struct spi_device *spi,
else if (xfer->tx_nbits == SPI_NBITS_QUAD &&
xfer->rx_nbits == SPI_NBITS_QUAD)
val |= SPFI_CONTROL_TMODE_QUAD << SPFI_CONTROL_TMODE_SHIFT;
val |= SPFI_CONTROL_SE;
spfi_writel(spfi, val, SPFI_CONTROL);
}

View file

@ -201,8 +201,9 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi,
{
struct spi_imx_data *spi_imx = spi_master_get_devdata(master);
if (spi_imx->dma_is_inited && (transfer->len > spi_imx->rx_wml)
&& (transfer->len > spi_imx->tx_wml))
if (spi_imx->dma_is_inited
&& transfer->len > spi_imx->rx_wml * sizeof(u32)
&& transfer->len > spi_imx->tx_wml * sizeof(u32))
return true;
return false;
}

View file

@ -214,6 +214,7 @@ static void zynqmp_gqspi_selectslave(struct zynqmp_qspi *instanceptr,
case GQSPI_SELECT_FLASH_CS_BOTH:
instanceptr->genfifocs = GQSPI_GENFIFO_CS_LOWER |
GQSPI_GENFIFO_CS_UPPER;
break;
case GQSPI_SELECT_FLASH_CS_UPPER:
instanceptr->genfifocs = GQSPI_GENFIFO_CS_UPPER;
break;

View file

@ -693,6 +693,7 @@ static struct class *spidev_class;
#ifdef CONFIG_OF
static const struct of_device_id spidev_dt_ids[] = {
{ .compatible = "rohm,dh2228fv" },
{ .compatible = "lineartechnology,ltc2488" },
{},
};
MODULE_DEVICE_TABLE(of, spidev_dt_ids);