drm/radeon/kms: parse DCE5 encoder caps when setting up encoders
Needed to tell which DIG encoders are HBR2 capable for DP 1.2. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -37,7 +37,7 @@ radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device,
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extern void radeon_link_encoder_connector(struct drm_device *dev);
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extern void
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radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_enum,
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uint32_t supported_device);
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uint32_t supported_device, u16 caps);
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/* from radeon_connector.c */
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extern void
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@ -537,6 +537,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
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u16 size, data_offset;
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u8 frev, crev;
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ATOM_CONNECTOR_OBJECT_TABLE *con_obj;
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ATOM_ENCODER_OBJECT_TABLE *enc_obj;
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ATOM_OBJECT_TABLE *router_obj;
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ATOM_DISPLAY_OBJECT_PATH_TABLE *path_obj;
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ATOM_OBJECT_HEADER *obj_header;
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@ -561,6 +562,9 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
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con_obj = (ATOM_CONNECTOR_OBJECT_TABLE *)
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(ctx->bios + data_offset +
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le16_to_cpu(obj_header->usConnectorObjectTableOffset));
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enc_obj = (ATOM_ENCODER_OBJECT_TABLE *)
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(ctx->bios + data_offset +
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le16_to_cpu(obj_header->usEncoderObjectTableOffset));
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router_obj = (ATOM_OBJECT_TABLE *)
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(ctx->bios + data_offset +
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le16_to_cpu(obj_header->usRouterObjectTableOffset));
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@ -666,14 +670,35 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
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OBJECT_TYPE_MASK) >> OBJECT_TYPE_SHIFT;
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if (grph_obj_type == GRAPH_OBJECT_TYPE_ENCODER) {
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u16 encoder_obj = le16_to_cpu(path->usGraphicObjIds[j]);
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for (k = 0; k < enc_obj->ucNumberOfObjects; k++) {
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u16 encoder_obj = le16_to_cpu(enc_obj->asObjects[k].usObjectID);
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if (le16_to_cpu(path->usGraphicObjIds[j]) == encoder_obj) {
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ATOM_COMMON_RECORD_HEADER *record = (ATOM_COMMON_RECORD_HEADER *)
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(ctx->bios + data_offset +
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le16_to_cpu(enc_obj->asObjects[k].usRecordOffset));
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ATOM_ENCODER_CAP_RECORD *cap_record;
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u16 caps = 0;
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while (record->ucRecordType > 0 &&
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record->ucRecordType <= ATOM_MAX_OBJECT_RECORD_NUMBER) {
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switch (record->ucRecordType) {
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case ATOM_ENCODER_CAP_RECORD_TYPE:
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cap_record =(ATOM_ENCODER_CAP_RECORD *)
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record;
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caps = le16_to_cpu(cap_record->usEncoderCap);
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break;
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}
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record = (ATOM_COMMON_RECORD_HEADER *)
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((char *)record + record->ucRecordSize);
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}
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radeon_add_atom_encoder(dev,
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encoder_obj,
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le16_to_cpu
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(path->
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usDeviceTag));
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usDeviceTag),
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caps);
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}
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}
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} else if (grph_obj_type == GRAPH_OBJECT_TYPE_ROUTER) {
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for (k = 0; k < router_obj->ucNumberOfObjects; k++) {
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u16 router_obj_id = le16_to_cpu(router_obj->asObjects[k].usObjectID);
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@ -1007,7 +1032,8 @@ bool radeon_get_atom_connector_info_from_supported_devices_table(struct
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radeon_get_encoder_enum(dev,
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(1 << i),
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dac),
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(1 << i));
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(1 << i),
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0);
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else
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radeon_add_legacy_encoder(dev,
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radeon_get_encoder_enum(dev,
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@ -2046,7 +2046,10 @@ radeon_atombios_set_dig_info(struct radeon_encoder *radeon_encoder)
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}
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void
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radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_enum, uint32_t supported_device)
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radeon_add_atom_encoder(struct drm_device *dev,
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uint32_t encoder_enum,
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uint32_t supported_device,
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u16 caps)
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{
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struct radeon_device *rdev = dev->dev_private;
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struct drm_encoder *encoder;
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@ -2089,6 +2092,7 @@ radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_enum, uint32_t
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radeon_encoder->rmx_type = RMX_OFF;
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radeon_encoder->underscan_type = UNDERSCAN_OFF;
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radeon_encoder->is_ext_encoder = false;
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radeon_encoder->caps = caps;
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switch (radeon_encoder->encoder_id) {
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case ENCODER_OBJECT_ID_INTERNAL_LVDS:
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@ -379,6 +379,7 @@ struct radeon_encoder {
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int hdmi_audio_workaround;
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int hdmi_buffer_status;
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bool is_ext_encoder;
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u16 caps;
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};
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struct radeon_connector_atom_dig {
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