[ARM] 3361/1: S3C24XX - add USB bus clock source
Patch from Ben Dooks Add USB bus clock definition for 48MHz fed to OHCI and gadget cores Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -53,7 +53,8 @@
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/* clock information */
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/* clock information */
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static LIST_HEAD(clocks);
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static LIST_HEAD(clocks);
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static DEFINE_MUTEX(clocks_mutex);
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DEFINE_MUTEX(clocks_mutex);
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/* old functions */
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/* old functions */
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@ -296,6 +297,13 @@ static struct clk clk_p = {
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.ctrlbit = 0,
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.ctrlbit = 0,
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};
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};
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struct clk clk_usb_bus = {
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.name = "usb-bus",
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.id = -1,
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.rate = 0,
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.parent = &clk_upll,
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};
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/* clocks that could be registered by external code */
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/* clocks that could be registered by external code */
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static int s3c24xx_dclk_enable(struct clk *clk, int enable)
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static int s3c24xx_dclk_enable(struct clk *clk, int enable)
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@ -606,6 +614,10 @@ int __init s3c24xx_setup_clocks(unsigned long xtal,
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if (s3c24xx_register_clock(&clk_p) < 0)
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if (s3c24xx_register_clock(&clk_p) < 0)
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printk(KERN_ERR "failed to register cpu pclk\n");
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printk(KERN_ERR "failed to register cpu pclk\n");
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if (s3c24xx_register_clock(&clk_usb_bus) < 0)
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printk(KERN_ERR "failed to register usb bus clock\n");
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/* register clocks from clock array */
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/* register clocks from clock array */
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for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) {
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for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) {
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@ -34,11 +34,15 @@ extern struct clk s3c24xx_clkout0;
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extern struct clk s3c24xx_clkout1;
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extern struct clk s3c24xx_clkout1;
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extern struct clk s3c24xx_uclk;
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extern struct clk s3c24xx_uclk;
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extern struct clk clk_usb_bus;
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/* exports for arch/arm/mach-s3c2410
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/* exports for arch/arm/mach-s3c2410
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*
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*
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* Please DO NOT use these outside of arch/arm/mach-s3c2410
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* Please DO NOT use these outside of arch/arm/mach-s3c2410
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*/
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*/
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extern struct mutex clocks_mutex;
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extern int s3c24xx_clkcon_enable(struct clk *clk, int enable);
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extern int s3c24xx_clkcon_enable(struct clk *clk, int enable);
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extern int s3c24xx_register_clock(struct clk *clk);
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extern int s3c24xx_register_clock(struct clk *clk);
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@ -31,6 +31,7 @@
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#include <linux/sysdev.h>
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#include <linux/sysdev.h>
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#include <linux/interrupt.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/ioport.h>
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#include <linux/mutex.h>
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#include <linux/clk.h>
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#include <linux/clk.h>
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#include <asm/hardware.h>
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#include <asm/hardware.h>
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@ -111,20 +112,38 @@ static struct clk s3c2440_clk_ac97 = {
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static int s3c2440_clk_add(struct sys_device *sysdev)
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static int s3c2440_clk_add(struct sys_device *sysdev)
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{
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{
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unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN);
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unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN);
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unsigned long clkdivn;
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struct clk *clk_h;
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struct clk *clk_h;
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struct clk *clk_p;
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struct clk *clk_p;
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struct clk *clk_upll;
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printk("S3C2440: Clock Support, DVS %s\n",
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printk("S3C2440: Clock Support, DVS %s\n",
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(camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off");
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(camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off");
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clk_p = clk_get(NULL, "pclk");
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clk_p = clk_get(NULL, "pclk");
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clk_h = clk_get(NULL, "hclk");
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clk_h = clk_get(NULL, "hclk");
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clk_upll = clk_get(NULL, "upll");
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if (IS_ERR(clk_p) || IS_ERR(clk_h)) {
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if (IS_ERR(clk_p) || IS_ERR(clk_h) || IS_ERR(clk_upll)) {
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printk(KERN_ERR "S3C2440: Failed to get parent clocks\n");
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printk(KERN_ERR "S3C2440: Failed to get parent clocks\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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/* check rate of UPLL, and if it is near 96MHz, then change
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* to using half the UPLL rate for the system */
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if (clk_get_rate(clk_upll) > (94 * MHZ)) {
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clk_usb_bus.rate = clk_get_rate(clk_upll) / 2;
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mutex_lock(&clocks_mutex);
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clkdivn = __raw_readl(S3C2410_CLKDIVN);
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clkdivn |= S3C2440_CLKDIVN_UCLK;
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__raw_writel(camdivn, S3C2410_CLKDIVN);
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mutex_unlock(&clocks_mutex);
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}
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s3c2440_clk_cam.parent = clk_h;
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s3c2440_clk_cam.parent = clk_h;
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s3c2440_clk_ac97.parent = clk_p;
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s3c2440_clk_ac97.parent = clk_p;
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s3c2440_clk_cam_upll.parent = clk_upll;
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s3c2440_clk_cam_upll.parent = clk_upll;
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