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ASoC: rt5659: fix wrong control register for ADC2 power 

The control register for ADC L2 and R2 is RT5659_PWR_DIG_1
not RT5659_PWR_DIG_2.

Signed-off-by: Zhong An <zhongan@pinecone.net>
Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
hifive-unleashed-5.1
Bard Liao 2018-03-12 19:50:08 +08:00 committed by Mark Brown
parent 9849ef555c
commit 3795e0c7d5
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
1 changed files with 2 additions and 2 deletions
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4
sound/soc/codecs/rt5659.c
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@ -2500,9 +2500,9 @@ static const struct snd_soc_dapm_widget rt5659_dapm_widgets[] = {
RT5659_PWR_ADC_L1_BIT, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY("ADC1 R Power", RT5659_PWR_DIG_1,
RT5659_PWR_ADC_R1_BIT, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY("ADC2 L Power", RT5659_PWR_DIG_2,
SND_SOC_DAPM_SUPPLY("ADC2 L Power", RT5659_PWR_DIG_1,
RT5659_PWR_ADC_L2_BIT, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_2,
SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_1,
RT5659_PWR_ADC_R2_BIT, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY("ADC1 clock", SND_SOC_NOPM, 0, 0, set_adc_clk,
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),