gpio/omap: Add DT support to GPIO driver
Adapt the GPIO driver to retrieve information from a DT file. Allocate the irq_base dynamically and rename bank->virtual_irq_start to bank->irq_base. Change irq_base type to int instead of u16 to match irq_alloc_descs output. Add documentation for GPIO properties specific to OMAP. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com> Acked-by: Rob Herring <rob.herring@calxeda.com>hifive-unleashed-5.1
Benoit Cousson
parent
96751fcbe5
commit
384ebe1c28
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@ -0,0 +1,36 @@
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OMAP GPIO controller bindings
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Required properties:
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- compatible:
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- "ti,omap2-gpio" for OMAP2 controllers
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- "ti,omap3-gpio" for OMAP3 controllers
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- "ti,omap4-gpio" for OMAP4 controllers
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- #gpio-cells : Should be two.
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- first cell is the pin number
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- second cell is used to specify optional parameters (unused)
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- gpio-controller : Marks the device node as a GPIO controller.
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- #interrupt-cells : Should be 2.
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- interrupt-controller: Mark the device node as an interrupt controller
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The first cell is the GPIO number.
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The second cell is used to specify flags:
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bits[3:0] trigger type and level flags:
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1 = low-to-high edge triggered.
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2 = high-to-low edge triggered.
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4 = active high level-sensitive.
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8 = active low level-sensitive.
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OMAP specific properties:
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- ti,hwmods: Name of the hwmod associated to the GPIO:
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"gpio<X>", <X> being the 1-based instance number from the HW spec
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Example:
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gpio4: gpio4 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio4";
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#gpio-cells = <2>;
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gpio-controller;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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@ -22,6 +22,9 @@
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#include <linux/device.h>
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#include <linux/pm_runtime.h>
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#include <linux/pm.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/irqdomain.h>
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#include <mach/hardware.h>
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#include <asm/irq.h>
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@ -52,7 +55,8 @@ struct gpio_bank {
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struct list_head node;
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void __iomem *base;
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u16 irq;
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u16 virtual_irq_start;
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int irq_base;
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struct irq_domain *domain;
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u32 suspend_wakeup;
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u32 saved_wakeup;
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u32 non_wakeup_gpios;
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@ -669,7 +673,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
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if (!isr)
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break;
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gpio_irq = bank->virtual_irq_start;
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gpio_irq = bank->irq_base;
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for (; isr != 0; isr >>= 1, gpio_irq++) {
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gpio_index = GPIO_INDEX(bank, irq_to_gpio(gpio_irq));
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@ -915,7 +919,7 @@ static int gpio_2irq(struct gpio_chip *chip, unsigned offset)
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struct gpio_bank *bank;
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bank = container_of(chip, struct gpio_bank, chip);
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return bank->virtual_irq_start + offset;
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return bank->irq_base + offset;
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}
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/*---------------------------------------------------------------------*/
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@ -1028,8 +1032,7 @@ static void __devinit omap_gpio_chip_init(struct gpio_bank *bank)
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gpiochip_add(&bank->chip);
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for (j = bank->virtual_irq_start;
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j < bank->virtual_irq_start + bank->width; j++) {
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for (j = bank->irq_base; j < bank->irq_base + bank->width; j++) {
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irq_set_lockdep_class(j, &gpio_lock_class);
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irq_set_chip_data(j, bank);
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if (bank->is_mpuio) {
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@ -1044,15 +1047,22 @@ static void __devinit omap_gpio_chip_init(struct gpio_bank *bank)
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irq_set_handler_data(bank->irq, bank);
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}
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static const struct of_device_id omap_gpio_match[];
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static int __devinit omap_gpio_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *node = dev->of_node;
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const struct of_device_id *match;
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struct omap_gpio_platform_data *pdata;
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struct resource *res;
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struct gpio_bank *bank;
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int ret = 0;
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if (!dev->platform_data)
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match = of_match_device(of_match_ptr(omap_gpio_match), dev);
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pdata = match ? match->data : dev->platform_data;
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if (!pdata)
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return -EINVAL;
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bank = devm_kzalloc(&pdev->dev, sizeof(struct gpio_bank), GFP_KERNEL);
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@ -1068,9 +1078,6 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
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}
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bank->irq = res->start;
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pdata = pdev->dev.platform_data;
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bank->virtual_irq_start = pdata->virtual_irq_start;
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bank->dev = dev;
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bank->dbck_flag = pdata->dbck_flag;
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bank->stride = pdata->bank_stride;
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@ -1080,6 +1087,18 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
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bank->loses_context = pdata->loses_context;
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bank->get_context_loss_count = pdata->get_context_loss_count;
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bank->regs = pdata->regs;
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#ifdef CONFIG_OF_GPIO
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bank->chip.of_node = of_node_get(node);
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#endif
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bank->irq_base = irq_alloc_descs(-1, 0, bank->width, 0);
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if (bank->irq_base < 0) {
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dev_err(dev, "Couldn't allocate IRQ numbers\n");
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return -ENODEV;
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}
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bank->domain = irq_domain_add_legacy(node, bank->width, bank->irq_base,
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0, &irq_domain_simple_ops, NULL);
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if (bank->regs->set_dataout && bank->regs->clr_dataout)
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bank->set_dataout = _set_gpio_dataout_reg;
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@ -1387,11 +1406,95 @@ static const struct dev_pm_ops gpio_pm_ops = {
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NULL)
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};
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#if defined(CONFIG_OF)
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static struct omap_gpio_reg_offs omap2_gpio_regs = {
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.revision = OMAP24XX_GPIO_REVISION,
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.direction = OMAP24XX_GPIO_OE,
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.datain = OMAP24XX_GPIO_DATAIN,
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.dataout = OMAP24XX_GPIO_DATAOUT,
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.set_dataout = OMAP24XX_GPIO_SETDATAOUT,
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.clr_dataout = OMAP24XX_GPIO_CLEARDATAOUT,
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.irqstatus = OMAP24XX_GPIO_IRQSTATUS1,
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.irqstatus2 = OMAP24XX_GPIO_IRQSTATUS2,
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.irqenable = OMAP24XX_GPIO_IRQENABLE1,
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.irqenable2 = OMAP24XX_GPIO_IRQENABLE2,
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.set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1,
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.clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1,
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.debounce = OMAP24XX_GPIO_DEBOUNCE_VAL,
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.debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN,
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.ctrl = OMAP24XX_GPIO_CTRL,
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.wkup_en = OMAP24XX_GPIO_WAKE_EN,
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.leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0,
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.leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1,
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.risingdetect = OMAP24XX_GPIO_RISINGDETECT,
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.fallingdetect = OMAP24XX_GPIO_FALLINGDETECT,
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};
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static struct omap_gpio_reg_offs omap4_gpio_regs = {
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.revision = OMAP4_GPIO_REVISION,
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.direction = OMAP4_GPIO_OE,
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.datain = OMAP4_GPIO_DATAIN,
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.dataout = OMAP4_GPIO_DATAOUT,
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.set_dataout = OMAP4_GPIO_SETDATAOUT,
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.clr_dataout = OMAP4_GPIO_CLEARDATAOUT,
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.irqstatus = OMAP4_GPIO_IRQSTATUS0,
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.irqstatus2 = OMAP4_GPIO_IRQSTATUS1,
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.irqenable = OMAP4_GPIO_IRQSTATUSSET0,
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.irqenable2 = OMAP4_GPIO_IRQSTATUSSET1,
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.set_irqenable = OMAP4_GPIO_IRQSTATUSSET0,
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.clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0,
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.debounce = OMAP4_GPIO_DEBOUNCINGTIME,
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.debounce_en = OMAP4_GPIO_DEBOUNCENABLE,
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.ctrl = OMAP4_GPIO_CTRL,
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.wkup_en = OMAP4_GPIO_IRQWAKEN0,
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.leveldetect0 = OMAP4_GPIO_LEVELDETECT0,
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.leveldetect1 = OMAP4_GPIO_LEVELDETECT1,
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.risingdetect = OMAP4_GPIO_RISINGDETECT,
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.fallingdetect = OMAP4_GPIO_FALLINGDETECT,
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};
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static struct omap_gpio_platform_data omap2_pdata = {
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.regs = &omap2_gpio_regs,
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.bank_width = 32,
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.dbck_flag = false,
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};
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static struct omap_gpio_platform_data omap3_pdata = {
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.regs = &omap2_gpio_regs,
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.bank_width = 32,
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.dbck_flag = true,
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};
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static struct omap_gpio_platform_data omap4_pdata = {
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.regs = &omap4_gpio_regs,
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.bank_width = 32,
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.dbck_flag = true,
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};
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static const struct of_device_id omap_gpio_match[] = {
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{
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.compatible = "ti,omap4-gpio",
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.data = &omap4_pdata,
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},
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{
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.compatible = "ti,omap3-gpio",
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.data = &omap3_pdata,
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},
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{
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.compatible = "ti,omap2-gpio",
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.data = &omap2_pdata,
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},
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{ },
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};
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MODULE_DEVICE_TABLE(of, omap_gpio_match);
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#endif
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static struct platform_driver omap_gpio_driver = {
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.probe = omap_gpio_probe,
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.driver = {
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.name = "omap_gpio",
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.pm = &gpio_pm_ops,
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.of_match_table = of_match_ptr(omap_gpio_match),
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},
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};
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