drm/i915/bxt: add WaDisableMaskBasedCammingInRCC workaround
Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Nick Hoath <nicholas.hoath@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -5346,6 +5346,10 @@ enum skl_disp_power_wells {
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#define HDC_FORCE_NON_COHERENT (1<<4)
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#define HDC_BARRIER_PERFORMANCE_DISABLE (1<<10)
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/* GEN9 chicken */
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#define SLICE_ECO_CHICKEN0 0x7308
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#define PIXEL_MASK_CAMMING_DISABLE (1 << 14)
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/* WaCatErrorRejectionIssue */
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#define GEN7_SQ_CHICKEN_MBCUNIT_CONFIG 0x9030
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#define GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB (1<<11)
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@ -966,6 +966,15 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
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WA_CLR_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN5,
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GEN9_CCS_TLB_PREFETCH_ENABLE);
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/*
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* FIXME: don't apply the following on BXT for stepping C. On BXT A0
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* the flag reads back as 0.
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*/
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/* WaDisableMaskBasedCammingInRCC:bxtA */
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if (IS_BROXTON(dev))
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WA_SET_BIT_MASKED(SLICE_ECO_CHICKEN0,
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PIXEL_MASK_CAMMING_DISABLE);
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return 0;
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}
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