MIPS: BCM63XX: Fix BCM6368 IPSec clock bit
The IPsec clock bit is 18 and not 17. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: mpm@selenic.com Cc: herbert@gondor.apana.org.au Patchwork: https://patchwork.linux-mips.org/patch/3323/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -99,7 +99,7 @@
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#define CKCTL_6368_USBH_CLK_EN (1 << 15)
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#define CKCTL_6368_USBH_CLK_EN (1 << 15)
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#define CKCTL_6368_DISABLE_GLESS_EN (1 << 16)
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#define CKCTL_6368_DISABLE_GLESS_EN (1 << 16)
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#define CKCTL_6368_NAND_CLK_EN (1 << 17)
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#define CKCTL_6368_NAND_CLK_EN (1 << 17)
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#define CKCTL_6368_IPSEC_CLK_EN (1 << 17)
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#define CKCTL_6368_IPSEC_CLK_EN (1 << 18)
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#define CKCTL_6368_ALL_SAFE_EN (CKCTL_6368_SWPKT_USB_EN | \
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#define CKCTL_6368_ALL_SAFE_EN (CKCTL_6368_SWPKT_USB_EN | \
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CKCTL_6368_SWPKT_SAR_EN | \
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CKCTL_6368_SWPKT_SAR_EN | \
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