mtd: nand: pxa3xx: switch to mtd_ooblayout_ops
Implementing the mtd_ooblayout_ops interface is the new way of exposing ECC/OOB layout to MTD users. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>hifive-unleashed-5.1
Boris Brezillon
parent
e04dbf3528
commit
39980c5616
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@ -323,6 +323,62 @@ static struct pxa3xx_nand_flash builtin_flash_types[] = {
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{ 0xba20, 16, 16, &timing[3] },
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};
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static int pxa3xx_ooblayout_ecc(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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struct pxa3xx_nand_host *host = nand_get_controller_data(chip);
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struct pxa3xx_nand_info *info = host->info_data;
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int nchunks = mtd->writesize / info->chunk_size;
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if (section >= nchunks)
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return -ERANGE;
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oobregion->offset = ((info->ecc_size + info->spare_size) * section) +
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info->spare_size;
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oobregion->length = info->ecc_size;
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return 0;
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}
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static int pxa3xx_ooblayout_free(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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struct pxa3xx_nand_host *host = nand_get_controller_data(chip);
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struct pxa3xx_nand_info *info = host->info_data;
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int nchunks = mtd->writesize / info->chunk_size;
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if (section >= nchunks)
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return -ERANGE;
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if (!info->spare_size)
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return 0;
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oobregion->offset = section * (info->ecc_size + info->spare_size);
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oobregion->length = info->spare_size;
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if (!section) {
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/*
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* Bootrom looks in bytes 0 & 5 for bad blocks for the
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* 4KB page / 4bit BCH combination.
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*/
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if (mtd->writesize == 4096 && info->chunk_size == 2048) {
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oobregion->offset += 6;
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oobregion->length -= 6;
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} else {
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oobregion->offset += 2;
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oobregion->length -= 2;
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}
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}
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return 0;
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}
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static const struct mtd_ooblayout_ops pxa3xx_ooblayout_ops = {
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.ecc = pxa3xx_ooblayout_ecc,
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.free = pxa3xx_ooblayout_free,
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};
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static u8 bbt_pattern[] = {'M', 'V', 'B', 'b', 't', '0' };
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static u8 bbt_mirror_pattern[] = {'1', 't', 'b', 'B', 'V', 'M' };
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@ -346,41 +402,6 @@ static struct nand_bbt_descr bbt_mirror_descr = {
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.pattern = bbt_mirror_pattern
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};
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static struct nand_ecclayout ecc_layout_2KB_bch4bit = {
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.eccbytes = 32,
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.eccpos = {
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32, 33, 34, 35, 36, 37, 38, 39,
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40, 41, 42, 43, 44, 45, 46, 47,
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48, 49, 50, 51, 52, 53, 54, 55,
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56, 57, 58, 59, 60, 61, 62, 63},
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.oobfree = { {2, 30} }
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};
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static struct nand_ecclayout ecc_layout_4KB_bch4bit = {
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.eccbytes = 64,
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.eccpos = {
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32, 33, 34, 35, 36, 37, 38, 39,
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40, 41, 42, 43, 44, 45, 46, 47,
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48, 49, 50, 51, 52, 53, 54, 55,
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56, 57, 58, 59, 60, 61, 62, 63,
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96, 97, 98, 99, 100, 101, 102, 103,
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104, 105, 106, 107, 108, 109, 110, 111,
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112, 113, 114, 115, 116, 117, 118, 119,
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120, 121, 122, 123, 124, 125, 126, 127},
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/* Bootrom looks in bytes 0 & 5 for bad blocks */
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.oobfree = { {6, 26}, { 64, 32} }
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};
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static struct nand_ecclayout ecc_layout_4KB_bch8bit = {
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.eccbytes = 128,
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.eccpos = {
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32, 33, 34, 35, 36, 37, 38, 39,
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40, 41, 42, 43, 44, 45, 46, 47,
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48, 49, 50, 51, 52, 53, 54, 55,
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56, 57, 58, 59, 60, 61, 62, 63},
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.oobfree = { }
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};
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#define NDTR0_tCH(c) (min((c), 7) << 19)
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#define NDTR0_tCS(c) (min((c), 7) << 16)
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#define NDTR0_tWH(c) (min((c), 7) << 11)
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@ -1545,9 +1566,12 @@ static void pxa3xx_nand_free_buff(struct pxa3xx_nand_info *info)
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}
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static int pxa_ecc_init(struct pxa3xx_nand_info *info,
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struct nand_ecc_ctrl *ecc,
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struct mtd_info *mtd,
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int strength, int ecc_stepsize, int page_size)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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struct nand_ecc_ctrl *ecc = &chip->ecc;
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if (strength == 1 && ecc_stepsize == 512 && page_size == 2048) {
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info->nfullchunks = 1;
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info->ntotalchunks = 1;
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@ -1581,7 +1605,7 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
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info->ecc_size = 32;
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ecc->mode = NAND_ECC_HW;
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ecc->size = info->chunk_size;
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ecc->layout = &ecc_layout_2KB_bch4bit;
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mtd_set_ooblayout(mtd, &pxa3xx_ooblayout_ops);
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ecc->strength = 16;
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} else if (strength == 4 && ecc_stepsize == 512 && page_size == 4096) {
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@ -1593,7 +1617,7 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
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info->ecc_size = 32;
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ecc->mode = NAND_ECC_HW;
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ecc->size = info->chunk_size;
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ecc->layout = &ecc_layout_4KB_bch4bit;
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mtd_set_ooblayout(mtd, &pxa3xx_ooblayout_ops);
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ecc->strength = 16;
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/*
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@ -1611,7 +1635,7 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
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info->ecc_size = 32;
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ecc->mode = NAND_ECC_HW;
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ecc->size = info->chunk_size;
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ecc->layout = &ecc_layout_4KB_bch8bit;
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mtd_set_ooblayout(mtd, &pxa3xx_ooblayout_ops);
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ecc->strength = 16;
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} else {
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dev_err(&info->pdev->dev,
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@ -1706,7 +1730,7 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
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ecc_step = 512;
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}
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ret = pxa_ecc_init(info, &chip->ecc, ecc_strength,
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ret = pxa_ecc_init(info, mtd, ecc_strength,
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ecc_step, mtd->writesize);
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if (ret)
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return ret;
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