xen32: create initial mappings like 64-bit
Rearrange the pagetable initialization to share code with the 64-bit kernel. Rather than deferring anything to pagetable_setup_start, just set up an initial pagetable in swapper_pg_dir early at startup, and create an additional 8MB of physical memory mappings. This matches the native head_32.S mappings to a large degree, and allows the rest of the pagetable setup to continue without much Xen vs. native difference. Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Cc: Stephen Tweedie <sct@redhat.com> Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: Mark McLoughlin <markmc@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Jeremy Fitzhardinge
Ingo Molnar
parent
d114e1981c
commit
39dbc5bd34
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@ -854,50 +854,6 @@ static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
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static __init void xen_pagetable_setup_start(pgd_t *base)
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{
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#ifdef CONFIG_X86_32
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pgd_t *xen_pgd = (pgd_t *)xen_start_info->pt_base;
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int i;
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init_mm.pgd = base;
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/*
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* copy top-level of Xen-supplied pagetable into place. This
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* is a stand-in while we copy the pmd pages.
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*/
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memcpy(base, xen_pgd, PTRS_PER_PGD * sizeof(pgd_t));
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/*
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* For PAE, need to allocate new pmds, rather than
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* share Xen's, since Xen doesn't like pmd's being
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* shared between address spaces.
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*/
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for (i = 0; i < PTRS_PER_PGD; i++) {
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if (pgd_val_ma(xen_pgd[i]) & _PAGE_PRESENT) {
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pmd_t *pmd = (pmd_t *)alloc_bootmem_low_pages(PAGE_SIZE);
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memcpy(pmd, (void *)pgd_page_vaddr(xen_pgd[i]),
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PAGE_SIZE);
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make_lowmem_page_readonly(pmd);
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set_pgd(&base[i], __pgd(1 + __pa(pmd)));
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} else
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pgd_clear(&base[i]);
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}
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/* make sure zero_page is mapped RO so we can use it in pagetables */
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make_lowmem_page_readonly(empty_zero_page);
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make_lowmem_page_readonly(base);
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/*
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* Switch to new pagetable. This is done before
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* pagetable_init has done anything so that the new pages
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* added to the table can be prepared properly for Xen.
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*/
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xen_write_cr3(__pa(base));
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/* Unpin initial Xen pagetable */
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pin_pagetable_pfn(MMUEXT_UNPIN_TABLE,
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PFN_DOWN(__pa(xen_start_info->pt_base)));
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#endif /* CONFIG_X86_32 */
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}
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void xen_setup_shared_info(void)
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@ -936,12 +892,6 @@ static __init void xen_pagetable_setup_done(pgd_t *base)
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pv_mmu_ops.set_pte = xen_set_pte;
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xen_setup_shared_info();
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#ifdef CONFIG_X86_32
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/* Actually pin the pagetable down, but we can't set PG_pinned
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yet because the page structures don't exist yet. */
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pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(base)));
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#endif
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}
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static __init void xen_post_allocator_init(void)
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@ -1299,14 +1249,17 @@ static void __init xen_reserve_top(void)
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#endif /* CONFIG_X86_32 */
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}
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#ifdef CONFIG_X86_64
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/*
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* Like __va(), but returns address in the kernel mapping (which is
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* all we have until the physical memory mapping has been set up.
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*/
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static void *__ka(phys_addr_t paddr)
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{
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#ifdef CONFIG_X86_64
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return (void *)(paddr + __START_KERNEL_map);
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#else
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return __va(paddr);
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#endif
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}
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/* Convert a machine address to physical address */
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@ -1326,6 +1279,7 @@ static void *m2v(phys_addr_t maddr)
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return __ka(m2p(maddr));
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}
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#ifdef CONFIG_X86_64
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static void walk(pgd_t *pgd, unsigned long addr)
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{
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unsigned l4idx = pgd_index(addr);
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@ -1356,13 +1310,14 @@ static void walk(pgd_t *pgd, unsigned long addr)
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xen_raw_printk(" l1: %016lx\n", l1.pte);
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xen_raw_printk(" %016lx\n", pte_val(l1));
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}
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#endif
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static void set_page_prot(void *addr, pgprot_t prot)
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{
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unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
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pte_t pte = pfn_pte(pfn, prot);
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xen_raw_printk("addr=%p pfn=%lx mfn=%lx prot=%016x pte=%016x\n",
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xen_raw_printk("addr=%p pfn=%lx mfn=%lx prot=%016llx pte=%016llx\n",
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addr, pfn, get_phys_to_machine(pfn),
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pgprot_val(prot), pte.pte);
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@ -1370,17 +1325,6 @@ static void set_page_prot(void *addr, pgprot_t prot)
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BUG();
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}
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static void convert_pfn_mfn(void *v)
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{
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pte_t *pte = v;
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int i;
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/* All levels are converted the same way, so just treat them
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as ptes. */
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for(i = 0; i < PTRS_PER_PTE; i++)
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pte[i] = xen_make_pte(pte[i].pte);
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}
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/*
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* Identity map, in addition to plain kernel map. This needs to be
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* large enough to allocate page table pages to allocate the rest.
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@ -1388,7 +1332,7 @@ static void convert_pfn_mfn(void *v)
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*/
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static pte_t level1_ident_pgt[PTRS_PER_PTE * 4] __page_aligned_bss;
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static __init void xen_map_identity_early(unsigned long max_pfn)
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static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
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{
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unsigned pmdidx, pteidx;
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unsigned ident_pte;
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@ -1399,11 +1343,9 @@ static __init void xen_map_identity_early(unsigned long max_pfn)
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for(pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
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pte_t *pte_page;
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BUG_ON(level2_ident_pgt[pmdidx].pmd != level2_kernel_pgt[pmdidx].pmd);
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/* Reuse or allocate a page of ptes */
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if (pmd_present(level2_ident_pgt[pmdidx]))
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pte_page = m2v(level2_ident_pgt[pmdidx].pmd);
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if (pmd_present(pmd[pmdidx]))
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pte_page = m2v(pmd[pmdidx].pmd);
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else {
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/* Check for free pte pages */
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if (ident_pte == ARRAY_SIZE(level1_ident_pgt))
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@ -1412,9 +1354,7 @@ static __init void xen_map_identity_early(unsigned long max_pfn)
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pte_page = &level1_ident_pgt[ident_pte];
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ident_pte += PTRS_PER_PTE;
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/* Install new l1 in l2(s) */
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level2_ident_pgt[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
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level2_kernel_pgt[pmdidx] = level2_ident_pgt[pmdidx];
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pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
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}
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/* Install mappings */
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@ -1434,6 +1374,20 @@ static __init void xen_map_identity_early(unsigned long max_pfn)
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for(pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
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set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
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set_page_prot(pmd, PAGE_KERNEL_RO);
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}
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#ifdef CONFIG_X86_64
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static void convert_pfn_mfn(void *v)
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{
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pte_t *pte = v;
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int i;
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/* All levels are converted the same way, so just treat them
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as ptes. */
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for(i = 0; i < PTRS_PER_PTE; i++)
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pte[i] = xen_make_pte(pte[i].pte);
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}
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/*
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@ -1471,18 +1425,18 @@ static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pf
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memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
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/* Set up identity map */
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xen_map_identity_early(max_pfn);
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xen_map_identity_early(level2_ident_pgt, max_pfn);
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/* Make pagetable pieces RO */
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set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
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set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
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set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
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set_page_prot(level2_ident_pgt, PAGE_KERNEL_RO);
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set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
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set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
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/* Pin down new L4 */
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pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa_symbol(init_level4_pgt)));
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pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
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PFN_DOWN(__pa_symbol(init_level4_pgt)));
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/* Unpin Xen-provided one */
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pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
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@ -1498,17 +1452,37 @@ static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pf
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return pgd;
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}
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#else
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#else /* !CONFIG_X86_64 */
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static pmd_t level2_kernel_pgt[PTRS_PER_PMD] __page_aligned_bss;
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static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
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{
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pmd_t *kernel_pmd;
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init_pg_tables_start = __pa(pgd);
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init_pg_tables_end = __pa(pgd) + xen_start_info->nr_pt_frames*PAGE_SIZE;
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max_pfn_mapped = PFN_DOWN(init_pg_tables_end + 512*1024);
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x86_write_percpu(xen_cr3, __pa(pgd));
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x86_write_percpu(xen_current_cr3, __pa(pgd));
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kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
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memcpy(level2_kernel_pgt, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
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return pgd;
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xen_map_identity_early(level2_kernel_pgt, max_pfn);
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memcpy(swapper_pg_dir, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
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set_pgd(&swapper_pg_dir[KERNEL_PGD_BOUNDARY],
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__pgd(__pa(level2_kernel_pgt) | _PAGE_PRESENT));
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set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
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set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
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set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
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pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
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xen_write_cr3(__pa(swapper_pg_dir));
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pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(swapper_pg_dir)));
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return swapper_pg_dir;
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}
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#endif /* CONFIG_X86_64 */
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