sfc: Remove redundant writes to INT_ADR_KER
This register only needs to be written after reset, not each time we enable interrupts. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1290,19 +1290,11 @@ static inline void falcon_interrupts(struct efx_nic *efx, int enabled,
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void falcon_enable_interrupts(struct efx_nic *efx)
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void falcon_enable_interrupts(struct efx_nic *efx)
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{
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{
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efx_oword_t int_adr_reg_ker;
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struct efx_channel *channel;
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struct efx_channel *channel;
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EFX_ZERO_OWORD(*((efx_oword_t *) efx->irq_status.addr));
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EFX_ZERO_OWORD(*((efx_oword_t *) efx->irq_status.addr));
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wmb(); /* Ensure interrupt vector is clear before interrupts enabled */
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wmb(); /* Ensure interrupt vector is clear before interrupts enabled */
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/* Program address */
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EFX_POPULATE_OWORD_2(int_adr_reg_ker,
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FRF_AZ_NORM_INT_VEC_DIS_KER,
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EFX_INT_MODE_USE_MSI(efx),
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FRF_AZ_INT_ADR_KER, efx->irq_status.dma_addr);
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efx_writeo(efx, &int_adr_reg_ker, FR_AZ_INT_ADR_KER);
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/* Enable interrupts */
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/* Enable interrupts */
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falcon_interrupts(efx, 1, 0);
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falcon_interrupts(efx, 1, 0);
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@ -3061,6 +3053,13 @@ int falcon_init_nic(struct efx_nic *efx)
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EFX_POPULATE_OWORD_1(temp, FRF_AZ_RX_DC_PF_LWM, RX_DC_ENTRIES - 8);
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EFX_POPULATE_OWORD_1(temp, FRF_AZ_RX_DC_PF_LWM, RX_DC_ENTRIES - 8);
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efx_writeo(efx, &temp, FR_AZ_RX_DC_PF_WM);
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efx_writeo(efx, &temp, FR_AZ_RX_DC_PF_WM);
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/* Program INT_KER address */
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EFX_POPULATE_OWORD_2(temp,
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FRF_AZ_NORM_INT_VEC_DIS_KER,
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EFX_INT_MODE_USE_MSI(efx),
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FRF_AZ_INT_ADR_KER, efx->irq_status.dma_addr);
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efx_writeo(efx, &temp, FR_AZ_INT_ADR_KER);
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/* Clear the parity enables on the TX data fifos as
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/* Clear the parity enables on the TX data fifos as
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* they produce false parity errors because of timing issues
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* they produce false parity errors because of timing issues
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*/
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*/
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