drm/radeon/kms: add wait_for_vblank asic callback
Required for future functionality. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
parent
e5bcf23443
commit
3ae19b750b
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@ -99,6 +99,25 @@ void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev)
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}
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}
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}
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}
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void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc)
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{
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struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc];
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int i;
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if (RREG32(EVERGREEN_CRTC_CONTROL + radeon_crtc->crtc_offset) & EVERGREEN_CRTC_MASTER_EN) {
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for (i = 0; i < rdev->usec_timeout; i++) {
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if (!(RREG32(EVERGREEN_CRTC_STATUS + radeon_crtc->crtc_offset) & EVERGREEN_CRTC_V_BLANK))
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break;
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udelay(1);
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}
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for (i = 0; i < rdev->usec_timeout; i++) {
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if (RREG32(EVERGREEN_CRTC_STATUS + radeon_crtc->crtc_offset) & EVERGREEN_CRTC_V_BLANK)
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break;
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udelay(1);
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}
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}
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}
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void evergreen_pre_page_flip(struct radeon_device *rdev, int crtc)
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void evergreen_pre_page_flip(struct radeon_device *rdev, int crtc)
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{
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{
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/* enable the pflip int */
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/* enable the pflip int */
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@ -219,6 +219,7 @@
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# define EVERGREEN_CRTC_MASTER_EN (1 << 0)
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# define EVERGREEN_CRTC_MASTER_EN (1 << 0)
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# define EVERGREEN_CRTC_DISP_READ_REQUEST_DISABLE (1 << 24)
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# define EVERGREEN_CRTC_DISP_READ_REQUEST_DISABLE (1 << 24)
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#define EVERGREEN_CRTC_STATUS 0x6e8c
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#define EVERGREEN_CRTC_STATUS 0x6e8c
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# define EVERGREEN_CRTC_V_BLANK (1 << 0)
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#define EVERGREEN_CRTC_STATUS_POSITION 0x6e90
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#define EVERGREEN_CRTC_STATUS_POSITION 0x6e90
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#define EVERGREEN_MASTER_UPDATE_MODE 0x6ef8
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#define EVERGREEN_MASTER_UPDATE_MODE 0x6ef8
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#define EVERGREEN_CRTC_UPDATE_LOCK 0x6ed4
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#define EVERGREEN_CRTC_UPDATE_LOCK 0x6ed4
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@ -65,6 +65,40 @@ MODULE_FIRMWARE(FIRMWARE_R520);
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#include "r100_track.h"
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#include "r100_track.h"
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void r100_wait_for_vblank(struct radeon_device *rdev, int crtc)
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{
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struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc];
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int i;
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if (radeon_crtc->crtc_id == 0) {
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if (RREG32(RADEON_CRTC_GEN_CNTL) & RADEON_CRTC_EN) {
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for (i = 0; i < rdev->usec_timeout; i++) {
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if (!(RREG32(RADEON_CRTC_STATUS) & RADEON_CRTC_VBLANK_CUR))
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break;
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udelay(1);
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}
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for (i = 0; i < rdev->usec_timeout; i++) {
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if (RREG32(RADEON_CRTC_STATUS) & RADEON_CRTC_VBLANK_CUR)
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break;
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udelay(1);
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}
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}
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} else {
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if (RREG32(RADEON_CRTC2_GEN_CNTL) & RADEON_CRTC2_EN) {
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for (i = 0; i < rdev->usec_timeout; i++) {
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if (!(RREG32(RADEON_CRTC2_STATUS) & RADEON_CRTC2_VBLANK_CUR))
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break;
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udelay(1);
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}
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for (i = 0; i < rdev->usec_timeout; i++) {
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if (RREG32(RADEON_CRTC2_STATUS) & RADEON_CRTC2_VBLANK_CUR)
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break;
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udelay(1);
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}
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}
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}
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}
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/* This files gather functions specifics to:
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/* This files gather functions specifics to:
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* r100,rv100,rs100,rv200,rs200,r200,rv250,rs300,rv280
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* r100,rv100,rs100,rv200,rs200,r200,rv250,rs300,rv280
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*/
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*/
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@ -351,6 +351,8 @@
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#define AVIVO_D1CRTC_BLANK_CONTROL 0x6084
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#define AVIVO_D1CRTC_BLANK_CONTROL 0x6084
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#define AVIVO_D1CRTC_INTERLACE_CONTROL 0x6088
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#define AVIVO_D1CRTC_INTERLACE_CONTROL 0x6088
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#define AVIVO_D1CRTC_INTERLACE_STATUS 0x608c
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#define AVIVO_D1CRTC_INTERLACE_STATUS 0x608c
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#define AVIVO_D1CRTC_STATUS 0x609c
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# define AVIVO_D1CRTC_V_BLANK (1 << 0)
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#define AVIVO_D1CRTC_STATUS_POSITION 0x60a0
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#define AVIVO_D1CRTC_STATUS_POSITION 0x60a0
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#define AVIVO_D1CRTC_FRAME_COUNT 0x60a4
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#define AVIVO_D1CRTC_FRAME_COUNT 0x60a4
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#define AVIVO_D1CRTC_STEREO_CONTROL 0x60c4
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#define AVIVO_D1CRTC_STEREO_CONTROL 0x60c4
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@ -1204,6 +1204,8 @@ struct radeon_asic {
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void (*pre_page_flip)(struct radeon_device *rdev, int crtc);
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void (*pre_page_flip)(struct radeon_device *rdev, int crtc);
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u32 (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base);
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u32 (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base);
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void (*post_page_flip)(struct radeon_device *rdev, int crtc);
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void (*post_page_flip)(struct radeon_device *rdev, int crtc);
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/* wait for vblank */
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void (*wait_for_vblank)(struct radeon_device *rdev, int crtc);
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};
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};
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/*
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/*
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@ -1692,6 +1694,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
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#define radeon_pre_page_flip(rdev, crtc) rdev->asic->pre_page_flip((rdev), (crtc))
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#define radeon_pre_page_flip(rdev, crtc) rdev->asic->pre_page_flip((rdev), (crtc))
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#define radeon_page_flip(rdev, crtc, base) rdev->asic->page_flip((rdev), (crtc), (base))
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#define radeon_page_flip(rdev, crtc, base) rdev->asic->page_flip((rdev), (crtc), (base))
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#define radeon_post_page_flip(rdev, crtc) rdev->asic->post_page_flip((rdev), (crtc))
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#define radeon_post_page_flip(rdev, crtc) rdev->asic->post_page_flip((rdev), (crtc))
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#define radeon_wait_for_vblank(rdev, crtc) rdev->asic->wait_for_vblank((rdev), (crtc))
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/* Common functions */
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/* Common functions */
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/* AGP */
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/* AGP */
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@ -178,6 +178,7 @@ static struct radeon_asic r100_asic = {
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.pre_page_flip = &r100_pre_page_flip,
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.pre_page_flip = &r100_pre_page_flip,
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.page_flip = &r100_page_flip,
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.page_flip = &r100_page_flip,
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.post_page_flip = &r100_post_page_flip,
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.post_page_flip = &r100_post_page_flip,
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.wait_for_vblank = &r100_wait_for_vblank,
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};
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};
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static struct radeon_asic r200_asic = {
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static struct radeon_asic r200_asic = {
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@ -229,6 +230,7 @@ static struct radeon_asic r200_asic = {
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.pre_page_flip = &r100_pre_page_flip,
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.pre_page_flip = &r100_pre_page_flip,
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.page_flip = &r100_page_flip,
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.page_flip = &r100_page_flip,
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.post_page_flip = &r100_post_page_flip,
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.post_page_flip = &r100_post_page_flip,
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.wait_for_vblank = &r100_wait_for_vblank,
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};
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};
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static struct radeon_asic r300_asic = {
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static struct radeon_asic r300_asic = {
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@ -281,6 +283,7 @@ static struct radeon_asic r300_asic = {
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.pre_page_flip = &r100_pre_page_flip,
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.pre_page_flip = &r100_pre_page_flip,
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.page_flip = &r100_page_flip,
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.page_flip = &r100_page_flip,
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.post_page_flip = &r100_post_page_flip,
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.post_page_flip = &r100_post_page_flip,
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.wait_for_vblank = &r100_wait_for_vblank,
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};
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};
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static struct radeon_asic r300_asic_pcie = {
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static struct radeon_asic r300_asic_pcie = {
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@ -332,6 +335,7 @@ static struct radeon_asic r300_asic_pcie = {
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.pre_page_flip = &r100_pre_page_flip,
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.pre_page_flip = &r100_pre_page_flip,
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.page_flip = &r100_page_flip,
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.page_flip = &r100_page_flip,
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.post_page_flip = &r100_post_page_flip,
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.post_page_flip = &r100_post_page_flip,
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.wait_for_vblank = &r100_wait_for_vblank,
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};
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};
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static struct radeon_asic r420_asic = {
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static struct radeon_asic r420_asic = {
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@ -384,6 +388,7 @@ static struct radeon_asic r420_asic = {
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.pre_page_flip = &r100_pre_page_flip,
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.pre_page_flip = &r100_pre_page_flip,
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.page_flip = &r100_page_flip,
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.page_flip = &r100_page_flip,
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.post_page_flip = &r100_post_page_flip,
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.post_page_flip = &r100_post_page_flip,
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.wait_for_vblank = &r100_wait_for_vblank,
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};
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};
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static struct radeon_asic rs400_asic = {
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static struct radeon_asic rs400_asic = {
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.pre_page_flip = &r100_pre_page_flip,
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.pre_page_flip = &r100_pre_page_flip,
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.page_flip = &r100_page_flip,
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.page_flip = &r100_page_flip,
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.post_page_flip = &r100_post_page_flip,
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.post_page_flip = &r100_post_page_flip,
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.wait_for_vblank = &r100_wait_for_vblank,
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};
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};
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static struct radeon_asic rs600_asic = {
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static struct radeon_asic rs600_asic = {
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@ -488,6 +494,7 @@ static struct radeon_asic rs600_asic = {
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.pre_page_flip = &rs600_pre_page_flip,
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.pre_page_flip = &rs600_pre_page_flip,
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.page_flip = &rs600_page_flip,
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.page_flip = &rs600_page_flip,
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.post_page_flip = &rs600_post_page_flip,
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.post_page_flip = &rs600_post_page_flip,
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.wait_for_vblank = &avivo_wait_for_vblank,
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};
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};
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static struct radeon_asic rs690_asic = {
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static struct radeon_asic rs690_asic = {
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@ -540,6 +547,7 @@ static struct radeon_asic rs690_asic = {
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.pre_page_flip = &rs600_pre_page_flip,
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.pre_page_flip = &rs600_pre_page_flip,
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.page_flip = &rs600_page_flip,
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.page_flip = &rs600_page_flip,
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.post_page_flip = &rs600_post_page_flip,
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.post_page_flip = &rs600_post_page_flip,
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.wait_for_vblank = &avivo_wait_for_vblank,
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};
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};
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static struct radeon_asic rv515_asic = {
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static struct radeon_asic rv515_asic = {
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@ -592,6 +600,7 @@ static struct radeon_asic rv515_asic = {
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.pre_page_flip = &rs600_pre_page_flip,
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.pre_page_flip = &rs600_pre_page_flip,
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.page_flip = &rs600_page_flip,
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.page_flip = &rs600_page_flip,
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.post_page_flip = &rs600_post_page_flip,
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.post_page_flip = &rs600_post_page_flip,
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.wait_for_vblank = &avivo_wait_for_vblank,
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};
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};
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static struct radeon_asic r520_asic = {
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static struct radeon_asic r520_asic = {
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.pre_page_flip = &rs600_pre_page_flip,
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.pre_page_flip = &rs600_pre_page_flip,
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.page_flip = &rs600_page_flip,
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.page_flip = &rs600_page_flip,
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.post_page_flip = &rs600_post_page_flip,
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.post_page_flip = &rs600_post_page_flip,
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.wait_for_vblank = &avivo_wait_for_vblank,
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};
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};
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static struct radeon_asic r600_asic = {
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static struct radeon_asic r600_asic = {
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.pre_page_flip = &rs600_pre_page_flip,
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.pre_page_flip = &rs600_pre_page_flip,
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.page_flip = &rs600_page_flip,
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.page_flip = &rs600_page_flip,
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.post_page_flip = &rs600_post_page_flip,
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.post_page_flip = &rs600_post_page_flip,
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.wait_for_vblank = &avivo_wait_for_vblank,
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};
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};
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static struct radeon_asic rs780_asic = {
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static struct radeon_asic rs780_asic = {
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.pre_page_flip = &rs600_pre_page_flip,
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.pre_page_flip = &rs600_pre_page_flip,
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.page_flip = &rs600_page_flip,
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.page_flip = &rs600_page_flip,
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.post_page_flip = &rs600_post_page_flip,
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.post_page_flip = &rs600_post_page_flip,
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.wait_for_vblank = &avivo_wait_for_vblank,
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};
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};
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static struct radeon_asic rv770_asic = {
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static struct radeon_asic rv770_asic = {
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.pre_page_flip = &rs600_pre_page_flip,
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.pre_page_flip = &rs600_pre_page_flip,
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.page_flip = &rv770_page_flip,
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.page_flip = &rv770_page_flip,
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.post_page_flip = &rs600_post_page_flip,
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.post_page_flip = &rs600_post_page_flip,
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.wait_for_vblank = &avivo_wait_for_vblank,
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};
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};
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static struct radeon_asic evergreen_asic = {
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static struct radeon_asic evergreen_asic = {
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@ -848,6 +861,7 @@ static struct radeon_asic evergreen_asic = {
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.pre_page_flip = &evergreen_pre_page_flip,
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.pre_page_flip = &evergreen_pre_page_flip,
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.page_flip = &evergreen_page_flip,
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.page_flip = &evergreen_page_flip,
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.post_page_flip = &evergreen_post_page_flip,
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.post_page_flip = &evergreen_post_page_flip,
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.wait_for_vblank = &dce4_wait_for_vblank,
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};
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};
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static struct radeon_asic sumo_asic = {
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static struct radeon_asic sumo_asic = {
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.pre_page_flip = &evergreen_pre_page_flip,
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.pre_page_flip = &evergreen_pre_page_flip,
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.page_flip = &evergreen_page_flip,
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.page_flip = &evergreen_page_flip,
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.post_page_flip = &evergreen_post_page_flip,
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.post_page_flip = &evergreen_post_page_flip,
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.wait_for_vblank = &dce4_wait_for_vblank,
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};
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};
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static struct radeon_asic btc_asic = {
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static struct radeon_asic btc_asic = {
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@ -950,6 +965,7 @@ static struct radeon_asic btc_asic = {
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.pre_page_flip = &evergreen_pre_page_flip,
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.pre_page_flip = &evergreen_pre_page_flip,
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.page_flip = &evergreen_page_flip,
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.page_flip = &evergreen_page_flip,
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.post_page_flip = &evergreen_post_page_flip,
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.post_page_flip = &evergreen_post_page_flip,
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.wait_for_vblank = &dce4_wait_for_vblank,
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};
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};
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static const struct radeon_vm_funcs cayman_vm_funcs = {
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static const struct radeon_vm_funcs cayman_vm_funcs = {
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@ -1024,6 +1040,7 @@ static struct radeon_asic cayman_asic = {
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.pre_page_flip = &evergreen_pre_page_flip,
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.pre_page_flip = &evergreen_pre_page_flip,
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.page_flip = &evergreen_page_flip,
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.page_flip = &evergreen_page_flip,
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.post_page_flip = &evergreen_post_page_flip,
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.post_page_flip = &evergreen_post_page_flip,
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.wait_for_vblank = &dce4_wait_for_vblank,
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};
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};
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int radeon_asic_init(struct radeon_device *rdev)
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int radeon_asic_init(struct radeon_device *rdev)
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@ -139,6 +139,7 @@ extern void r100_pm_get_dynpm_state(struct radeon_device *rdev);
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extern void r100_pre_page_flip(struct radeon_device *rdev, int crtc);
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extern void r100_pre_page_flip(struct radeon_device *rdev, int crtc);
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extern u32 r100_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
|
extern u32 r100_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
|
||||||
extern void r100_post_page_flip(struct radeon_device *rdev, int crtc);
|
extern void r100_post_page_flip(struct radeon_device *rdev, int crtc);
|
||||||
|
extern void r100_wait_for_vblank(struct radeon_device *rdev, int crtc);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* r200,rv250,rs300,rv280
|
* r200,rv250,rs300,rv280
|
||||||
|
@ -236,7 +237,7 @@ extern void rs600_pre_page_flip(struct radeon_device *rdev, int crtc);
|
||||||
extern u32 rs600_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
|
extern u32 rs600_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
|
||||||
extern void rs600_post_page_flip(struct radeon_device *rdev, int crtc);
|
extern void rs600_post_page_flip(struct radeon_device *rdev, int crtc);
|
||||||
void rs600_set_safe_registers(struct radeon_device *rdev);
|
void rs600_set_safe_registers(struct radeon_device *rdev);
|
||||||
|
extern void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* rs690,rs740
|
* rs690,rs740
|
||||||
|
@ -423,6 +424,7 @@ extern void sumo_pm_init_profile(struct radeon_device *rdev);
|
||||||
extern void evergreen_pre_page_flip(struct radeon_device *rdev, int crtc);
|
extern void evergreen_pre_page_flip(struct radeon_device *rdev, int crtc);
|
||||||
extern u32 evergreen_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
|
extern u32 evergreen_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
|
||||||
extern void evergreen_post_page_flip(struct radeon_device *rdev, int crtc);
|
extern void evergreen_post_page_flip(struct radeon_device *rdev, int crtc);
|
||||||
|
extern void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc);
|
||||||
void evergreen_disable_interrupt_state(struct radeon_device *rdev);
|
void evergreen_disable_interrupt_state(struct radeon_device *rdev);
|
||||||
int evergreen_blit_init(struct radeon_device *rdev);
|
int evergreen_blit_init(struct radeon_device *rdev);
|
||||||
|
|
||||||
|
|
|
@ -539,9 +539,11 @@
|
||||||
|
|
||||||
#define RADEON_CRTC2_PITCH 0x032c
|
#define RADEON_CRTC2_PITCH 0x032c
|
||||||
#define RADEON_CRTC_STATUS 0x005c
|
#define RADEON_CRTC_STATUS 0x005c
|
||||||
|
# define RADEON_CRTC_VBLANK_CUR (1 << 0)
|
||||||
# define RADEON_CRTC_VBLANK_SAVE (1 << 1)
|
# define RADEON_CRTC_VBLANK_SAVE (1 << 1)
|
||||||
# define RADEON_CRTC_VBLANK_SAVE_CLEAR (1 << 1)
|
# define RADEON_CRTC_VBLANK_SAVE_CLEAR (1 << 1)
|
||||||
#define RADEON_CRTC2_STATUS 0x03fc
|
#define RADEON_CRTC2_STATUS 0x03fc
|
||||||
|
# define RADEON_CRTC2_VBLANK_CUR (1 << 0)
|
||||||
# define RADEON_CRTC2_VBLANK_SAVE (1 << 1)
|
# define RADEON_CRTC2_VBLANK_SAVE (1 << 1)
|
||||||
# define RADEON_CRTC2_VBLANK_SAVE_CLEAR (1 << 1)
|
# define RADEON_CRTC2_VBLANK_SAVE_CLEAR (1 << 1)
|
||||||
#define RADEON_CRTC_V_SYNC_STRT_WID 0x020c
|
#define RADEON_CRTC_V_SYNC_STRT_WID 0x020c
|
||||||
|
|
|
@ -46,6 +46,25 @@
|
||||||
void rs600_gpu_init(struct radeon_device *rdev);
|
void rs600_gpu_init(struct radeon_device *rdev);
|
||||||
int rs600_mc_wait_for_idle(struct radeon_device *rdev);
|
int rs600_mc_wait_for_idle(struct radeon_device *rdev);
|
||||||
|
|
||||||
|
void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc)
|
||||||
|
{
|
||||||
|
struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc];
|
||||||
|
int i;
|
||||||
|
|
||||||
|
if (RREG32(AVIVO_D1CRTC_CONTROL + radeon_crtc->crtc_offset) & AVIVO_CRTC_EN) {
|
||||||
|
for (i = 0; i < rdev->usec_timeout; i++) {
|
||||||
|
if (!(RREG32(AVIVO_D1CRTC_STATUS + radeon_crtc->crtc_offset) & AVIVO_D1CRTC_V_BLANK))
|
||||||
|
break;
|
||||||
|
udelay(1);
|
||||||
|
}
|
||||||
|
for (i = 0; i < rdev->usec_timeout; i++) {
|
||||||
|
if (RREG32(AVIVO_D1CRTC_STATUS + radeon_crtc->crtc_offset) & AVIVO_D1CRTC_V_BLANK)
|
||||||
|
break;
|
||||||
|
udelay(1);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
void rs600_pre_page_flip(struct radeon_device *rdev, int crtc)
|
void rs600_pre_page_flip(struct radeon_device *rdev, int crtc)
|
||||||
{
|
{
|
||||||
/* enable the pflip int */
|
/* enable the pflip int */
|
||||||
|
|
Loading…
Reference in a new issue