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drm/i915/bdw: Do not write the Semaphore Sync Registers in GEN8+

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These do not exist anymore.

Spotted while reading through intel_ringbuffer.c

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Oscar Mateo 2014-06-11 16:17:16 +01:00 committed by Daniel Vetter
parent b90b91d870
commit 3b2cc8ab64
1 changed files with 4 additions and 3 deletions
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7
drivers/gpu/drm/i915/intel_ringbuffer.c
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@ -1746,14 +1746,15 @@ int intel_ring_cacheline_align(struct intel_engine_cs *ring)
void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno)
{
struct drm_i915_private *dev_priv = ring->dev->dev_private;
struct drm_device *dev = ring->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
BUG_ON(ring->outstanding_lazy_seqno);
if (INTEL_INFO(ring->dev)->gen >= 6) {
if (INTEL_INFO(dev)->gen == 6 || INTEL_INFO(dev)->gen == 7) {
I915_WRITE(RING_SYNC_0(ring->mmio_base), 0);
I915_WRITE(RING_SYNC_1(ring->mmio_base), 0);
if (HAS_VEBOX(ring->dev))
if (HAS_VEBOX(dev))
I915_WRITE(RING_SYNC_2(ring->mmio_base), 0);
}