drm/i915/bdw: Do not write the Semaphore Sync Registers in GEN8+
These do not exist anymore. Spotted while reading through intel_ringbuffer.c Signed-off-by: Oscar Mateo <oscar.mateo@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -1746,14 +1746,15 @@ int intel_ring_cacheline_align(struct intel_engine_cs *ring)
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void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno)
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{
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struct drm_i915_private *dev_priv = ring->dev->dev_private;
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struct drm_device *dev = ring->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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BUG_ON(ring->outstanding_lazy_seqno);
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if (INTEL_INFO(ring->dev)->gen >= 6) {
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if (INTEL_INFO(dev)->gen == 6 || INTEL_INFO(dev)->gen == 7) {
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I915_WRITE(RING_SYNC_0(ring->mmio_base), 0);
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I915_WRITE(RING_SYNC_1(ring->mmio_base), 0);
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if (HAS_VEBOX(ring->dev))
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if (HAS_VEBOX(dev))
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I915_WRITE(RING_SYNC_2(ring->mmio_base), 0);
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}
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