drm/i915: Continuation of future readiness series
Removing the check for HAS_PCH_SPLIT, it looks redundant here. Anyways all the platforms are checked separately. v2: Reordering as per the gen (Ville) Signed-off-by: Sonika Jindal <sonika.jindal@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -12354,29 +12354,27 @@ static void intel_init_display(struct drm_device *dev)
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dev_priv->display.get_display_clock_speed =
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i830_get_display_clock_speed;
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if (HAS_PCH_SPLIT(dev)) {
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if (IS_GEN5(dev)) {
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dev_priv->display.fdi_link_train = ironlake_fdi_link_train;
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dev_priv->display.write_eld = ironlake_write_eld;
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} else if (IS_GEN6(dev)) {
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dev_priv->display.fdi_link_train = gen6_fdi_link_train;
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dev_priv->display.write_eld = ironlake_write_eld;
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dev_priv->display.modeset_global_resources =
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snb_modeset_global_resources;
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} else if (IS_IVYBRIDGE(dev)) {
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/* FIXME: detect B0+ stepping and use auto training */
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dev_priv->display.fdi_link_train = ivb_manual_fdi_link_train;
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dev_priv->display.write_eld = ironlake_write_eld;
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dev_priv->display.modeset_global_resources =
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ivb_modeset_global_resources;
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} else if (IS_HASWELL(dev) || IS_GEN8(dev)) {
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dev_priv->display.fdi_link_train = hsw_fdi_link_train;
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dev_priv->display.write_eld = haswell_write_eld;
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dev_priv->display.modeset_global_resources =
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haswell_modeset_global_resources;
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}
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} else if (IS_G4X(dev)) {
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if (IS_G4X(dev)) {
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dev_priv->display.write_eld = g4x_write_eld;
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} else if (IS_GEN5(dev)) {
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dev_priv->display.fdi_link_train = ironlake_fdi_link_train;
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dev_priv->display.write_eld = ironlake_write_eld;
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} else if (IS_GEN6(dev)) {
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dev_priv->display.fdi_link_train = gen6_fdi_link_train;
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dev_priv->display.write_eld = ironlake_write_eld;
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dev_priv->display.modeset_global_resources =
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snb_modeset_global_resources;
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} else if (IS_IVYBRIDGE(dev)) {
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/* FIXME: detect B0+ stepping and use auto training */
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dev_priv->display.fdi_link_train = ivb_manual_fdi_link_train;
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dev_priv->display.write_eld = ironlake_write_eld;
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dev_priv->display.modeset_global_resources =
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ivb_modeset_global_resources;
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} else if (IS_HASWELL(dev) || IS_GEN8(dev)) {
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dev_priv->display.fdi_link_train = hsw_fdi_link_train;
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dev_priv->display.write_eld = haswell_write_eld;
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dev_priv->display.modeset_global_resources =
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haswell_modeset_global_resources;
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} else if (IS_VALLEYVIEW(dev)) {
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dev_priv->display.modeset_global_resources =
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valleyview_modeset_global_resources;
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