ARM: tegra: add fuses as device randomness
Various fuses on Tegra include information that's unique to an individual chip, or a subset of chips. Call add_device_randomness() with this data to perturb the initial state of the random pool. Suggested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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@ -21,14 +21,26 @@
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <linux/export.h>
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#include <linux/random.h>
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#include <linux/tegra-soc.h>
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#include "fuse.h"
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#include "iomap.h"
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#include "apbio.h"
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/* Tegra20 only */
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#define FUSE_UID_LOW 0x108
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#define FUSE_UID_HIGH 0x10c
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/* Tegra30 and later */
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#define FUSE_VENDOR_CODE 0x200
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#define FUSE_FAB_CODE 0x204
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#define FUSE_LOT_CODE_0 0x208
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#define FUSE_LOT_CODE_1 0x20c
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#define FUSE_WAFER_ID 0x210
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#define FUSE_X_COORDINATE 0x214
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#define FUSE_Y_COORDINATE 0x218
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#define FUSE_SKU_INFO 0x110
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#define TEGRA20_FUSE_SPARE_BIT 0x200
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@ -112,21 +124,51 @@ u32 tegra_read_chipid(void)
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return readl_relaxed(IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804);
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}
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static void __init tegra20_fuse_init_randomness(void)
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{
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u32 randomness[2];
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randomness[0] = tegra_fuse_readl(FUSE_UID_LOW);
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randomness[1] = tegra_fuse_readl(FUSE_UID_HIGH);
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add_device_randomness(randomness, sizeof(randomness));
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}
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/* Applies to Tegra30 or later */
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static void __init tegra30_fuse_init_randomness(void)
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{
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u32 randomness[7];
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randomness[0] = tegra_fuse_readl(FUSE_VENDOR_CODE);
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randomness[1] = tegra_fuse_readl(FUSE_FAB_CODE);
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randomness[2] = tegra_fuse_readl(FUSE_LOT_CODE_0);
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randomness[3] = tegra_fuse_readl(FUSE_LOT_CODE_1);
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randomness[4] = tegra_fuse_readl(FUSE_WAFER_ID);
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randomness[5] = tegra_fuse_readl(FUSE_X_COORDINATE);
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randomness[6] = tegra_fuse_readl(FUSE_Y_COORDINATE);
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add_device_randomness(randomness, sizeof(randomness));
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}
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void __init tegra_init_fuse(void)
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{
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u32 id;
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u32 randomness[5];
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u32 reg = readl(IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x48));
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reg |= 1 << 28;
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writel(reg, IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x48));
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reg = tegra_fuse_readl(FUSE_SKU_INFO);
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randomness[0] = reg;
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tegra_sku_id = reg & 0xFF;
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reg = tegra_apb_readl(TEGRA_APB_MISC_BASE + STRAP_OPT);
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randomness[1] = reg;
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tegra_bct_strapping = (reg & RAM_ID_MASK) >> RAM_CODE_SHIFT;
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id = tegra_read_chipid();
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randomness[2] = id;
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tegra_chip_id = (id >> 8) & 0xff;
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switch (tegra_chip_id) {
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@ -149,6 +191,18 @@ void __init tegra_init_fuse(void)
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tegra_revision = tegra_get_revision(id);
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tegra_init_speedo_data();
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randomness[3] = (tegra_cpu_process_id << 16) | tegra_core_process_id;
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randomness[4] = (tegra_cpu_speedo_id << 16) | tegra_soc_speedo_id;
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add_device_randomness(randomness, sizeof(randomness));
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switch (tegra_chip_id) {
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case TEGRA20:
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tegra20_fuse_init_randomness();
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case TEGRA30:
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case TEGRA114:
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default:
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tegra30_fuse_init_randomness();
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}
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pr_info("Tegra Revision: %s SKU: %d CPU Process: %d Core Process: %d\n",
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tegra_revision_name[tegra_revision],
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