Merge branch 'drm-fixes-3.16' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
A few more fixes for 3.16. The pageflipping fixes I dropped last week have finally shaped up so this is mostly fixes for fallout from the pageflipping code changes. Also fix a memory leak and a black screen when restoring the backlight on console unblanking. * 'drm-fixes-3.16' of git://people.freedesktop.org/~agd5f/linux: drm/radeon: Make classic pageflip completion path less racy. drm/radeon: Add missing vblank_put in pageflip ioctl error path. drm/radeon: Remove redundant fence unref in pageflip path. drm/radeon: Complete page flip even if waiting on the BO fence fails drm/radeon: Move pinning the BO back to radeon_crtc_page_flip() drm/radeon: Prevent too early kms-pageflips triggered by vblank. drm/radeon: set default bl level to something reasonable drm/radeon: avoid leaking edid data
This commit is contained in:
commit
3c169e5629
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@ -1414,8 +1414,8 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
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tmp &= ~EVERGREEN_GRPH_SURFACE_UPDATE_H_RETRACE_EN;
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WREG32(EVERGREEN_GRPH_FLIP_CONTROL + radeon_crtc->crtc_offset, tmp);
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/* set pageflip to happen anywhere in vblank interval */
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WREG32(EVERGREEN_MASTER_UPDATE_MODE + radeon_crtc->crtc_offset, 0);
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/* set pageflip to happen only at start of vblank interval (front porch) */
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WREG32(EVERGREEN_MASTER_UPDATE_MODE + radeon_crtc->crtc_offset, 3);
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if (!atomic && fb && fb != crtc->primary->fb) {
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radeon_fb = to_radeon_framebuffer(fb);
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@ -1614,8 +1614,8 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc,
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tmp &= ~AVIVO_D1GRPH_SURFACE_UPDATE_H_RETRACE_EN;
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WREG32(AVIVO_D1GRPH_FLIP_CONTROL + radeon_crtc->crtc_offset, tmp);
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/* set pageflip to happen anywhere in vblank interval */
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WREG32(AVIVO_D1MODE_MASTER_UPDATE_MODE + radeon_crtc->crtc_offset, 0);
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/* set pageflip to happen only at start of vblank interval (front porch) */
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WREG32(AVIVO_D1MODE_MASTER_UPDATE_MODE + radeon_crtc->crtc_offset, 3);
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if (!atomic && fb && fb != crtc->primary->fb) {
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radeon_fb = to_radeon_framebuffer(fb);
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@ -183,7 +183,6 @@ void radeon_atom_backlight_init(struct radeon_encoder *radeon_encoder,
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struct backlight_properties props;
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struct radeon_backlight_privdata *pdata;
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struct radeon_encoder_atom_dig *dig;
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u8 backlight_level;
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char bl_name[16];
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/* Mac laptops with multiple GPUs use the gmux driver for backlight
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@ -222,12 +221,17 @@ void radeon_atom_backlight_init(struct radeon_encoder *radeon_encoder,
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pdata->encoder = radeon_encoder;
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backlight_level = radeon_atom_get_backlight_level_from_reg(rdev);
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dig = radeon_encoder->enc_priv;
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dig->bl_dev = bd;
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bd->props.brightness = radeon_atom_backlight_get_brightness(bd);
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/* Set a reasonable default here if the level is 0 otherwise
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* fbdev will attempt to turn the backlight on after console
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* unblanking and it will try and restore 0 which turns the backlight
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* off again.
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*/
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if (bd->props.brightness == 0)
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bd->props.brightness = RADEON_MAX_BL_LEVEL;
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bd->props.power = FB_BLANK_UNBLANK;
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backlight_update_status(bd);
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@ -2642,8 +2642,9 @@ void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *s
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for (i = 0; i < rdev->num_crtc; i++) {
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if (save->crtc_enabled[i]) {
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tmp = RREG32(EVERGREEN_MASTER_UPDATE_MODE + crtc_offsets[i]);
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if ((tmp & 0x3) != 0) {
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tmp &= ~0x3;
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if ((tmp & 0x7) != 3) {
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tmp &= ~0x7;
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tmp |= 0x3;
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WREG32(EVERGREEN_MASTER_UPDATE_MODE + crtc_offsets[i], tmp);
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}
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tmp = RREG32(EVERGREEN_GRPH_UPDATE + crtc_offsets[i]);
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@ -239,7 +239,6 @@
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# define EVERGREEN_CRTC_V_BLANK (1 << 0)
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#define EVERGREEN_CRTC_STATUS_POSITION 0x6e90
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#define EVERGREEN_CRTC_STATUS_HV_COUNT 0x6ea0
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#define EVERGREEN_MASTER_UPDATE_MODE 0x6ef8
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#define EVERGREEN_CRTC_UPDATE_LOCK 0x6ed4
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#define EVERGREEN_MASTER_UPDATE_LOCK 0x6ef4
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#define EVERGREEN_MASTER_UPDATE_MODE 0x6ef8
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@ -684,10 +684,9 @@ struct radeon_flip_work {
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struct work_struct unpin_work;
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struct radeon_device *rdev;
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int crtc_id;
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struct drm_framebuffer *fb;
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uint64_t base;
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struct drm_pending_vblank_event *event;
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struct radeon_bo *old_rbo;
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struct radeon_bo *new_rbo;
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struct radeon_fence *fence;
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};
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@ -366,7 +366,6 @@ void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id)
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spin_unlock_irqrestore(&rdev->ddev->event_lock, flags);
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drm_vblank_put(rdev->ddev, radeon_crtc->crtc_id);
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radeon_fence_unref(&work->fence);
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radeon_irq_kms_pflip_irq_put(rdev, work->crtc_id);
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queue_work(radeon_crtc->flip_queue, &work->unpin_work);
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}
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@ -386,51 +385,108 @@ static void radeon_flip_work_func(struct work_struct *__work)
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struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[work->crtc_id];
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struct drm_crtc *crtc = &radeon_crtc->base;
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struct drm_framebuffer *fb = work->fb;
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uint32_t tiling_flags, pitch_pixels;
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uint64_t base;
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unsigned long flags;
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int r;
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down_read(&rdev->exclusive_lock);
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while (work->fence) {
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if (work->fence) {
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r = radeon_fence_wait(work->fence, false);
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if (r == -EDEADLK) {
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up_read(&rdev->exclusive_lock);
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r = radeon_gpu_reset(rdev);
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down_read(&rdev->exclusive_lock);
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}
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if (r)
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DRM_ERROR("failed to wait on page flip fence (%d)!\n", r);
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if (r) {
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DRM_ERROR("failed to wait on page flip fence (%d)!\n",
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r);
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goto cleanup;
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} else
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radeon_fence_unref(&work->fence);
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/* We continue with the page flip even if we failed to wait on
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* the fence, otherwise the DRM core and userspace will be
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* confused about which BO the CRTC is scanning out
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*/
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radeon_fence_unref(&work->fence);
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}
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/* pin the new buffer */
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DRM_DEBUG_DRIVER("flip-ioctl() cur_fbo = %p, cur_bbo = %p\n",
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work->old_rbo, work->new_rbo);
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/* We borrow the event spin lock for protecting flip_status */
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spin_lock_irqsave(&crtc->dev->event_lock, flags);
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r = radeon_bo_reserve(work->new_rbo, false);
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/* set the proper interrupt */
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radeon_irq_kms_pflip_irq_get(rdev, radeon_crtc->crtc_id);
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/* do the flip (mmio) */
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radeon_page_flip(rdev, radeon_crtc->crtc_id, work->base);
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radeon_crtc->flip_status = RADEON_FLIP_SUBMITTED;
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spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
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up_read(&rdev->exclusive_lock);
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}
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static int radeon_crtc_page_flip(struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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struct drm_pending_vblank_event *event,
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uint32_t page_flip_flags)
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{
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struct drm_device *dev = crtc->dev;
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struct radeon_device *rdev = dev->dev_private;
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struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
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struct radeon_framebuffer *old_radeon_fb;
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struct radeon_framebuffer *new_radeon_fb;
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struct drm_gem_object *obj;
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struct radeon_flip_work *work;
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struct radeon_bo *new_rbo;
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uint32_t tiling_flags, pitch_pixels;
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uint64_t base;
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unsigned long flags;
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int r;
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work = kzalloc(sizeof *work, GFP_KERNEL);
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if (work == NULL)
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return -ENOMEM;
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INIT_WORK(&work->flip_work, radeon_flip_work_func);
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INIT_WORK(&work->unpin_work, radeon_unpin_work_func);
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work->rdev = rdev;
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work->crtc_id = radeon_crtc->crtc_id;
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work->event = event;
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/* schedule unpin of the old buffer */
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old_radeon_fb = to_radeon_framebuffer(crtc->primary->fb);
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obj = old_radeon_fb->obj;
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/* take a reference to the old object */
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drm_gem_object_reference(obj);
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work->old_rbo = gem_to_radeon_bo(obj);
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new_radeon_fb = to_radeon_framebuffer(fb);
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obj = new_radeon_fb->obj;
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new_rbo = gem_to_radeon_bo(obj);
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spin_lock(&new_rbo->tbo.bdev->fence_lock);
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if (new_rbo->tbo.sync_obj)
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work->fence = radeon_fence_ref(new_rbo->tbo.sync_obj);
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spin_unlock(&new_rbo->tbo.bdev->fence_lock);
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/* pin the new buffer */
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DRM_DEBUG_DRIVER("flip-ioctl() cur_rbo = %p, new_rbo = %p\n",
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work->old_rbo, new_rbo);
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r = radeon_bo_reserve(new_rbo, false);
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if (unlikely(r != 0)) {
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DRM_ERROR("failed to reserve new rbo buffer before flip\n");
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goto cleanup;
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}
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/* Only 27 bit offset for legacy CRTC */
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r = radeon_bo_pin_restricted(work->new_rbo, RADEON_GEM_DOMAIN_VRAM,
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r = radeon_bo_pin_restricted(new_rbo, RADEON_GEM_DOMAIN_VRAM,
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ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27, &base);
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if (unlikely(r != 0)) {
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radeon_bo_unreserve(work->new_rbo);
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radeon_bo_unreserve(new_rbo);
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r = -EINVAL;
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DRM_ERROR("failed to pin new rbo buffer before flip\n");
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goto cleanup;
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}
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radeon_bo_get_tiling_flags(work->new_rbo, &tiling_flags, NULL);
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radeon_bo_unreserve(work->new_rbo);
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radeon_bo_get_tiling_flags(new_rbo, &tiling_flags, NULL);
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radeon_bo_unreserve(new_rbo);
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if (!ASIC_IS_AVIVO(rdev)) {
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/* crtc offset is from display base addr not FB location */
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@ -467,6 +523,7 @@ static void radeon_flip_work_func(struct work_struct *__work)
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}
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base &= ~7;
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}
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work->base = base;
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r = drm_vblank_get(crtc->dev, radeon_crtc->crtc_id);
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if (r) {
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@ -477,88 +534,11 @@ static void radeon_flip_work_func(struct work_struct *__work)
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/* We borrow the event spin lock for protecting flip_work */
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spin_lock_irqsave(&crtc->dev->event_lock, flags);
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/* set the proper interrupt */
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radeon_irq_kms_pflip_irq_get(rdev, radeon_crtc->crtc_id);
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/* do the flip (mmio) */
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radeon_page_flip(rdev, radeon_crtc->crtc_id, base);
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radeon_crtc->flip_status = RADEON_FLIP_SUBMITTED;
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spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
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up_read(&rdev->exclusive_lock);
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return;
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pflip_cleanup:
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if (unlikely(radeon_bo_reserve(work->new_rbo, false) != 0)) {
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DRM_ERROR("failed to reserve new rbo in error path\n");
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goto cleanup;
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}
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if (unlikely(radeon_bo_unpin(work->new_rbo) != 0)) {
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DRM_ERROR("failed to unpin new rbo in error path\n");
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}
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radeon_bo_unreserve(work->new_rbo);
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cleanup:
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drm_gem_object_unreference_unlocked(&work->old_rbo->gem_base);
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radeon_fence_unref(&work->fence);
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kfree(work);
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up_read(&rdev->exclusive_lock);
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}
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static int radeon_crtc_page_flip(struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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struct drm_pending_vblank_event *event,
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uint32_t page_flip_flags)
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{
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struct drm_device *dev = crtc->dev;
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struct radeon_device *rdev = dev->dev_private;
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struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
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struct radeon_framebuffer *old_radeon_fb;
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struct radeon_framebuffer *new_radeon_fb;
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struct drm_gem_object *obj;
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struct radeon_flip_work *work;
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unsigned long flags;
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work = kzalloc(sizeof *work, GFP_KERNEL);
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if (work == NULL)
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return -ENOMEM;
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INIT_WORK(&work->flip_work, radeon_flip_work_func);
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INIT_WORK(&work->unpin_work, radeon_unpin_work_func);
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work->rdev = rdev;
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work->crtc_id = radeon_crtc->crtc_id;
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work->fb = fb;
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work->event = event;
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/* schedule unpin of the old buffer */
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old_radeon_fb = to_radeon_framebuffer(crtc->primary->fb);
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obj = old_radeon_fb->obj;
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/* take a reference to the old object */
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drm_gem_object_reference(obj);
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work->old_rbo = gem_to_radeon_bo(obj);
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new_radeon_fb = to_radeon_framebuffer(fb);
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obj = new_radeon_fb->obj;
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work->new_rbo = gem_to_radeon_bo(obj);
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spin_lock(&work->new_rbo->tbo.bdev->fence_lock);
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if (work->new_rbo->tbo.sync_obj)
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work->fence = radeon_fence_ref(work->new_rbo->tbo.sync_obj);
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spin_unlock(&work->new_rbo->tbo.bdev->fence_lock);
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/* We borrow the event spin lock for protecting flip_work */
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spin_lock_irqsave(&crtc->dev->event_lock, flags);
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if (radeon_crtc->flip_status != RADEON_FLIP_NONE) {
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DRM_DEBUG_DRIVER("flip queue: crtc already busy\n");
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spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
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drm_gem_object_unreference_unlocked(&work->old_rbo->gem_base);
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radeon_fence_unref(&work->fence);
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kfree(work);
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return -EBUSY;
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r = -EBUSY;
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goto vblank_cleanup;
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}
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radeon_crtc->flip_status = RADEON_FLIP_PENDING;
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radeon_crtc->flip_work = work;
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@ -569,8 +549,27 @@ static int radeon_crtc_page_flip(struct drm_crtc *crtc,
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spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
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queue_work(radeon_crtc->flip_queue, &work->flip_work);
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return 0;
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vblank_cleanup:
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drm_vblank_put(crtc->dev, radeon_crtc->crtc_id);
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pflip_cleanup:
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if (unlikely(radeon_bo_reserve(new_rbo, false) != 0)) {
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DRM_ERROR("failed to reserve new rbo in error path\n");
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goto cleanup;
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}
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if (unlikely(radeon_bo_unpin(new_rbo) != 0)) {
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DRM_ERROR("failed to unpin new rbo in error path\n");
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}
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radeon_bo_unreserve(new_rbo);
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cleanup:
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drm_gem_object_unreference_unlocked(&work->old_rbo->gem_base);
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radeon_fence_unref(&work->fence);
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kfree(work);
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return r;
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}
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static int
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|
@ -830,6 +829,10 @@ int radeon_ddc_get_modes(struct radeon_connector *radeon_connector)
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struct radeon_device *rdev = dev->dev_private;
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int ret = 0;
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/* don't leak the edid if we already fetched it in detect() */
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if (radeon_connector->edid)
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goto got_edid;
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/* on hw with routers, select right port */
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if (radeon_connector->router.ddc_valid)
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radeon_router_select_ddc_port(radeon_connector);
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|
@ -868,6 +871,7 @@ int radeon_ddc_get_modes(struct radeon_connector *radeon_connector)
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radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev);
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}
|
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if (radeon_connector->edid) {
|
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got_edid:
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drm_mode_connector_update_edid_property(&radeon_connector->base, radeon_connector->edid);
|
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ret = drm_add_edid_modes(&radeon_connector->base, radeon_connector->edid);
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drm_edid_to_eld(&radeon_connector->base, radeon_connector->edid);
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|
@ -406,8 +406,9 @@ void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save)
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for (i = 0; i < rdev->num_crtc; i++) {
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if (save->crtc_enabled[i]) {
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||||
tmp = RREG32(AVIVO_D1MODE_MASTER_UPDATE_MODE + crtc_offsets[i]);
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if ((tmp & 0x3) != 0) {
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tmp &= ~0x3;
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if ((tmp & 0x7) != 3) {
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tmp &= ~0x7;
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tmp |= 0x3;
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WREG32(AVIVO_D1MODE_MASTER_UPDATE_MODE + crtc_offsets[i], tmp);
|
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}
|
||||
tmp = RREG32(AVIVO_D1GRPH_UPDATE + crtc_offsets[i]);
|
||||
|
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