net/mlxe5: Separate between FEC and current speed
FEC mode is per link type, not necessary per speed. This patch access FEC register by link modes instead of speeds. This patch will allow further enhacment of link modes supporting FEC with the same speed (different lane type). Signed-off-by: Aya Levin <ayal@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
This commit is contained in:
Aya Levin
Saeed Mahameed
parent
2132b71f78
commit
3c19208ea9
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@ -343,64 +343,45 @@ out:
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return err;
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}
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static u32 fec_supported_speeds[] = {
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10000,
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40000,
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25000,
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50000,
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56000,
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100000
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enum mlx5e_fec_supported_link_mode {
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MLX5E_FEC_SUPPORTED_LINK_MODES_10G_40G,
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MLX5E_FEC_SUPPORTED_LINK_MODES_25G,
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MLX5E_FEC_SUPPORTED_LINK_MODES_50G,
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MLX5E_FEC_SUPPORTED_LINK_MODES_56G,
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MLX5E_FEC_SUPPORTED_LINK_MODES_100G,
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MLX5E_MAX_FEC_SUPPORTED_LINK_MODE,
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};
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#define MLX5E_FEC_SUPPORTED_SPEEDS ARRAY_SIZE(fec_supported_speeds)
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#define MLX5E_FEC_OVERRIDE_ADMIN_POLICY(buf, policy, write, link) \
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do { \
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u8 *_policy = &(policy); \
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u32 *_buf = buf; \
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\
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if (write) \
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MLX5_SET(pplm_reg, _buf, fec_override_admin_##link, *_policy); \
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else \
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*_policy = MLX5_GET(pplm_reg, _buf, fec_override_admin_##link); \
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} while (0)
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/* get/set FEC admin field for a given speed */
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static int mlx5e_fec_admin_field(u32 *pplm,
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u8 *fec_policy,
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bool write,
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u32 speed)
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static int mlx5e_fec_admin_field(u32 *pplm, u8 *fec_policy, bool write,
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enum mlx5e_fec_supported_link_mode link_mode)
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{
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switch (speed) {
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case 10000:
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case 40000:
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if (!write)
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*fec_policy = MLX5_GET(pplm_reg, pplm,
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fec_override_admin_10g_40g);
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else
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MLX5_SET(pplm_reg, pplm,
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fec_override_admin_10g_40g, *fec_policy);
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switch (link_mode) {
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case MLX5E_FEC_SUPPORTED_LINK_MODES_10G_40G:
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MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 10g_40g);
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break;
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case 25000:
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if (!write)
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*fec_policy = MLX5_GET(pplm_reg, pplm,
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fec_override_admin_25g);
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else
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MLX5_SET(pplm_reg, pplm,
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fec_override_admin_25g, *fec_policy);
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case MLX5E_FEC_SUPPORTED_LINK_MODES_25G:
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MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 25g);
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break;
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case 50000:
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if (!write)
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*fec_policy = MLX5_GET(pplm_reg, pplm,
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fec_override_admin_50g);
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else
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MLX5_SET(pplm_reg, pplm,
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fec_override_admin_50g, *fec_policy);
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case MLX5E_FEC_SUPPORTED_LINK_MODES_50G:
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MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 50g);
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break;
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case 56000:
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if (!write)
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*fec_policy = MLX5_GET(pplm_reg, pplm,
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fec_override_admin_56g);
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else
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MLX5_SET(pplm_reg, pplm,
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fec_override_admin_56g, *fec_policy);
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case MLX5E_FEC_SUPPORTED_LINK_MODES_56G:
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MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 56g);
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break;
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case 100000:
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if (!write)
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*fec_policy = MLX5_GET(pplm_reg, pplm,
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fec_override_admin_100g);
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else
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MLX5_SET(pplm_reg, pplm,
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fec_override_admin_100g, *fec_policy);
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case MLX5E_FEC_SUPPORTED_LINK_MODES_100G:
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MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 100g);
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break;
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default:
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return -EINVAL;
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@ -408,32 +389,28 @@ static int mlx5e_fec_admin_field(u32 *pplm,
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return 0;
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}
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#define MLX5E_GET_FEC_OVERRIDE_CAP(buf, link) \
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MLX5_GET(pplm_reg, buf, fec_override_cap_##link)
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/* returns FEC capabilities for a given speed */
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static int mlx5e_get_fec_cap_field(u32 *pplm,
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u8 *fec_cap,
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u32 speed)
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static int mlx5e_get_fec_cap_field(u32 *pplm, u8 *fec_cap,
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enum mlx5e_fec_supported_link_mode link_mode)
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{
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switch (speed) {
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case 10000:
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case 40000:
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*fec_cap = MLX5_GET(pplm_reg, pplm,
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fec_override_cap_10g_40g);
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switch (link_mode) {
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case MLX5E_FEC_SUPPORTED_LINK_MODES_10G_40G:
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*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 10g_40g);
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break;
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case 25000:
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*fec_cap = MLX5_GET(pplm_reg, pplm,
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fec_override_cap_25g);
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case MLX5E_FEC_SUPPORTED_LINK_MODES_25G:
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*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 25g);
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break;
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case 50000:
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*fec_cap = MLX5_GET(pplm_reg, pplm,
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fec_override_cap_50g);
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case MLX5E_FEC_SUPPORTED_LINK_MODES_50G:
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*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 50g);
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break;
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case 56000:
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*fec_cap = MLX5_GET(pplm_reg, pplm,
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fec_override_cap_56g);
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case MLX5E_FEC_SUPPORTED_LINK_MODES_56G:
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*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 56g);
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break;
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case 100000:
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*fec_cap = MLX5_GET(pplm_reg, pplm,
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fec_override_cap_100g);
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case MLX5E_FEC_SUPPORTED_LINK_MODES_100G:
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*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 100g);
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break;
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default:
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return -EINVAL;
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@ -460,10 +437,10 @@ bool mlx5e_fec_in_caps(struct mlx5_core_dev *dev, int fec_policy)
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if (err)
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return false;
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for (i = 0; i < MLX5E_FEC_SUPPORTED_SPEEDS; i++) {
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for (i = 0; i < MLX5E_MAX_FEC_SUPPORTED_LINK_MODE; i++) {
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u8 fec_caps;
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mlx5e_get_fec_cap_field(out, &fec_caps, fec_supported_speeds[i]);
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mlx5e_get_fec_cap_field(out, &fec_caps, i);
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if (fec_caps & fec_policy)
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return true;
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}
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@ -476,8 +453,8 @@ int mlx5e_get_fec_mode(struct mlx5_core_dev *dev, u32 *fec_mode_active,
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u32 out[MLX5_ST_SZ_DW(pplm_reg)] = {};
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u32 in[MLX5_ST_SZ_DW(pplm_reg)] = {};
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int sz = MLX5_ST_SZ_BYTES(pplm_reg);
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u32 link_speed;
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int err;
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int i;
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if (!MLX5_CAP_GEN(dev, pcam_reg))
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return -EOPNOTSUPP;
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@ -493,13 +470,16 @@ int mlx5e_get_fec_mode(struct mlx5_core_dev *dev, u32 *fec_mode_active,
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*fec_mode_active = MLX5_GET(pplm_reg, out, fec_mode_active);
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if (!fec_configured_mode)
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return 0;
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goto out;
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err = mlx5e_port_linkspeed(dev, &link_speed);
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if (err)
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return err;
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return mlx5e_fec_admin_field(out, fec_configured_mode, 0, link_speed);
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*fec_configured_mode = 0;
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for (i = 0; i < MLX5E_MAX_FEC_SUPPORTED_LINK_MODE; i++) {
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mlx5e_fec_admin_field(out, fec_configured_mode, 0, i);
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if (*fec_configured_mode != 0)
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goto out;
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}
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out:
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return 0;
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}
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int mlx5e_set_fec_mode(struct mlx5_core_dev *dev, u8 fec_policy)
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@ -525,16 +505,14 @@ int mlx5e_set_fec_mode(struct mlx5_core_dev *dev, u8 fec_policy)
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MLX5_SET(pplm_reg, out, local_port, 1);
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for (i = 0; i < MLX5E_FEC_SUPPORTED_SPEEDS; i++) {
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mlx5e_get_fec_cap_field(out, &fec_caps, fec_supported_speeds[i]);
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for (i = 0; i < MLX5E_MAX_FEC_SUPPORTED_LINK_MODE; i++) {
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mlx5e_get_fec_cap_field(out, &fec_caps, i);
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/* policy supported for link speed */
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if (fec_caps & fec_policy)
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mlx5e_fec_admin_field(out, &fec_policy, 1,
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fec_supported_speeds[i]);
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mlx5e_fec_admin_field(out, &fec_policy, 1, i);
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else
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/* set FEC to auto*/
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mlx5e_fec_admin_field(out, &fec_policy_auto, 1,
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fec_supported_speeds[i]);
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mlx5e_fec_admin_field(out, &fec_policy_auto, 1, i);
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}
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return mlx5_core_access_reg(dev, out, sz, out, sz, MLX5_REG_PPLM, 0, 1);
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