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arm64: dts: meson: g12a: x96-max: fix PHY deassert timing requirements 

According to the datasheet (Rev. 1.9) the RTL8211F requires at least
72ms "for internal circuits settling time" before accessing the PHY
registers. On similar boards with the same PHY this fixes an issue where
Ethernet link would not come up when using ip link set down/up.

Fixes: ed5e8f6891 ("arm64: dts: meson: g12a: x96-max: fix the Ethernet PHY reset line")
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/12506964ca5d5f936579a280ad0a7e7f9a0a2d4c.1607363522.git.stefan@agner.ch
zero-sugar-mainline-defconfig
Stefan Agner 2020-12-07 18:58:02 +01:00 committed by Kevin Hilman
parent 656ab1bdcd
commit 3d07c3b3a8
1 changed files with 1 additions and 1 deletions
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2
arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
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@ -340,7 +340,7 @@
eee-broken-1000t;
reset-assert-us = <10000>;
reset-deassert-us = <30000>;
reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
interrupt-parent = <&gpio_intc>;