ARM: SoC: DT updates for v4.2
As usual, quite a few device-tree updates in ARM land. There was ome
minor churn in DTs due to relicensing under a dual-license, and lots
of little additions of new peripherals, features etc, but nothing
really exciting to call to your attention. Some higlights, focsuing
on support for new SoCs and boards:
- AT91: new boards: Overkiz, Acme Systems' Arietta G25
- tegra: HDA support
- bcm: new platforms: Buffalo WXR-1900DHP, SmartRG SR400ac, ASUS RT-AC87U
- mvebu: new platforms: Compulab CM-A510, Armada 385-based Linksys
boards, DLink DNS-327L
- OMAP: new platforms: Baltos IR5221, LogicPD Torpedo, Toby-Churchill SL50
- ARM: added support for Juno r1 board
- sunxi: A33 SoC support; new boards: A23 EVB, SinA33, GA10H-A33, Mele A1000G
- imx: i.MX7D SoC support; new boards: Armadeus Systems APF6,
Gateworks GW5510, and aristainetos2 boards
- hisilicon: hi6220 SoC support; new boards: 96boards hikey
Conflicts: None
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC DT updates from Kevin Hilman:
"As usual, quite a few device-tree updates in ARM land. There was one
minor churn in DTs due to relicensing under a dual-license, and lots
of little additions of new peripherals, features etc, but nothing
really exciting to call to your attention. Some higlights, focsuing
on support for new SoCs and boards:
- AT91: new boards: Overkiz, Acme Systems' Arietta G25
- tegra: HDA support
- bcm: new platforms: Buffalo WXR-1900DHP, SmartRG SR400ac, ASUS
RT-AC87U
- mvebu: new platforms: Compulab CM-A510, Armada 385-based Linksys
boards, DLink DNS-327L
- OMAP: new platforms: Baltos IR5221, LogicPD Torpedo, Toby-Churchill
SL50
- ARM: added support for Juno r1 board
- sunxi: A33 SoC support; new boards: A23 EVB, SinA33, GA10H-A33,
Mele A1000G
- imx: i.MX7D SoC support; new boards: Armadeus Systems APF6,
Gateworks GW5510, and aristainetos2 boards
- hisilicon: hi6220 SoC support; new boards: 96boards hikey"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (462 commits)
ARM: hisi: revert changes from hisi/hip04-dt branch
ARM: nomadik: set proper compatible for accelerometer
ARM64: juno: add GPIO keys
ARM: at91/dt: sama5d4: fix dma conf for aes, sha and tdes nodes
ARM: dts: Introduce STM32F429 MCU
ARM: socfpga: dts: enable ethernet for Arria10 devkit
ARM: dts: k2l: fix the netcp range size
ARM: dts: k2e: fix the netcp range size
ARM: dts: k2hk: fix the netcp range size
ARM: dts: k2l-evm: Add device bindings for netcp driver
ARM: dts: k2e-evm: Add device bindings for netcp driver
ARM: dts: k2hk-evm: Add device bindings for netcp driver
ARM: BCM5301X: Add DT for Asus RT-AC87U
ARM: BCM5301X: add IRQ numbers for PCIe controller
ARM: BCM5301X: add NAND flash chip description
arm64: dts: Add dts files for Hisilicon Hi6220 SoC
clk: hi6220: Document devicetree bindings for hi6220 clock
arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC
ARM: at91/dt: sama5d4ek: mci0 uses slot 0
ARM: at91/dt: kizbox: fix mismatch LED PWM device
...
hifive-unleashed-5.1
Linus Torvalds
commit
3d9f96d850
|
|
@ -0,0 +1,12 @@
|
|||
Altera SOCFPGA SDRAM Controller
|
||||
|
||||
Required properties:
|
||||
- compatible : Should contain "altr,sdr-ctl" and "syscon".
|
||||
syscon is required by the Altera SOCFPGA SDRAM EDAC.
|
||||
- reg : Should contain 1 register range (address and length)
|
||||
|
||||
Example:
|
||||
sdr: sdr@ffc25000 {
|
||||
compatible = "altr,sdr-ctl", "syscon";
|
||||
reg = <0xffc25000 0x1000>;
|
||||
};
|
||||
|
|
@ -157,3 +157,69 @@ Example:
|
|||
|
||||
};
|
||||
};
|
||||
|
||||
ARM Versatile Express Boards
|
||||
-----------------------------
|
||||
For details on the device tree bindings for ARM Versatile Express boards
|
||||
please consult the vexpress.txt file in the same directory as this file.
|
||||
|
||||
ARM Juno Boards
|
||||
----------------
|
||||
The Juno boards are targeting development for AArch64 systems. The first
|
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iteration, Juno r0, is a vehicle for evaluating big.LITTLE on AArch64,
|
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with the second iteration, Juno r1, mainly aimed at development of PCIe
|
||||
based systems. Juno r1 also has support for AXI masters placed on the TLX
|
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connectors to join the coherency domain.
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|
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Juno boards are described in a similar way to ARM Versatile Express boards,
|
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with the motherboard part of the hardware being described in a separate file
|
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to highlight the fact that is part of the support infrastructure for the SoC.
|
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Juno device tree bindings also share the Versatile Express bindings as
|
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described under the RS1 memory mapping.
|
||||
|
||||
Required properties (in root node):
|
||||
compatible = "arm,juno"; /* For Juno r0 board */
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compatible = "arm,juno-r1"; /* For Juno r1 board */
|
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|
||||
Required nodes:
|
||||
The description for the board must include:
|
||||
- a "psci" node describing the boot method used for the secondary CPUs.
|
||||
A detailed description of the bindings used for "psci" nodes is present
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in the psci.txt file.
|
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- a "cpus" node describing the available cores and their associated
|
||||
"enable-method"s. For more details see cpus.txt file.
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||||
|
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Example:
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/dts-v1/;
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/ {
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model = "ARM Juno development board (r0)";
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compatible = "arm,juno", "arm,vexpress";
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interrupt-parent = <&gic>;
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#address-cells = <2>;
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#size-cells = <2>;
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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A57_0: cpu@0 {
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compatible = "arm,cortex-a57","arm,armv8";
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reg = <0x0 0x0>;
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device_type = "cpu";
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enable-method = "psci";
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};
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|
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.....
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A53_0: cpu@100 {
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compatible = "arm,cortex-a53","arm,armv8";
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reg = <0x0 0x100>;
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device_type = "cpu";
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||||
enable-method = "psci";
|
||||
};
|
||||
|
||||
.....
|
||||
};
|
||||
|
||||
};
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||||
|
|
|
|||
|
|
@ -1,8 +1,35 @@
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|||
Broadcom BCM2835 device tree bindings
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||||
-------------------------------------------
|
||||
|
||||
Boards with the BCM2835 SoC shall have the following properties:
|
||||
Raspberry Pi Model A
|
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Required root node properties:
|
||||
compatible = "raspberrypi,model-a", "brcm,bcm2835";
|
||||
|
||||
Required root node property:
|
||||
Raspberry Pi Model A+
|
||||
Required root node properties:
|
||||
compatible = "raspberrypi,model-a-plus", "brcm,bcm2835";
|
||||
|
||||
Raspberry Pi Model B
|
||||
Required root node properties:
|
||||
compatible = "raspberrypi,model-b", "brcm,bcm2835";
|
||||
|
||||
Raspberry Pi Model B (no P5)
|
||||
early model B with I2C0 rather than I2C1 routed to the expansion header
|
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Required root node properties:
|
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compatible = "raspberrypi,model-b-i2c0", "brcm,bcm2835";
|
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|
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Raspberry Pi Model B rev2
|
||||
Required root node properties:
|
||||
compatible = "raspberrypi,model-b-rev2", "brcm,bcm2835";
|
||||
|
||||
Raspberry Pi Model B+
|
||||
Required root node properties:
|
||||
compatible = "raspberrypi,model-b-plus", "brcm,bcm2835";
|
||||
|
||||
Raspberry Pi Compute Module
|
||||
Required root node properties:
|
||||
compatible = "raspberrypi,compute-module", "brcm,bcm2835";
|
||||
|
||||
Generic BCM2835 board
|
||||
Required root node properties:
|
||||
compatible = "brcm,bcm2835";
|
||||
|
|
|
|||
|
|
@ -7,3 +7,79 @@ following properties:
|
|||
Required root node property:
|
||||
|
||||
compatible: should be "brcm,bcm63138"
|
||||
|
||||
An optional Boot lookup table Device Tree node is required for secondary CPU
|
||||
initialization as well as a 'resets' phandle to the correct PMB controller as
|
||||
defined in reset/brcm,bcm63138-pmb.txt for this secondary CPU, and an
|
||||
'enable-method' property.
|
||||
|
||||
Required properties for the Boot lookup table node:
|
||||
- compatible: should be "brcm,bcm63138-bootlut"
|
||||
- reg: register base address and length for the Boot Lookup table
|
||||
|
||||
Optional properties for the primary CPU node:
|
||||
- enable-method: should be "brcm,bcm63138"
|
||||
|
||||
Optional properties for the secondary CPU node:
|
||||
- enable-method: should be "brcm,bcm63138"
|
||||
- resets: phandle to the relevant PMB controller, one integer indicating the internal
|
||||
bus number, and a second integer indicating the address of the CPU in the PMB
|
||||
internal bus number.
|
||||
|
||||
Example:
|
||||
|
||||
cpus {
|
||||
cpu@0 {
|
||||
compatible = "arm,cotex-a9";
|
||||
reg = <0>;
|
||||
...
|
||||
enable-method = "brcm,bcm63138";
|
||||
};
|
||||
|
||||
cpu@1 {
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <1>;
|
||||
...
|
||||
enable-method = "brcm,bcm63138";
|
||||
resets = <&pmb0 4 1>;
|
||||
};
|
||||
};
|
||||
|
||||
bootlut: bootlut@8000 {
|
||||
compatible = "brcm,bcm63138-bootlut";
|
||||
reg = <0x8000 0x50>;
|
||||
};
|
||||
|
||||
=======
|
||||
reboot
|
||||
------
|
||||
Two nodes are required for software reboot: a timer node and a syscon-reboot node.
|
||||
|
||||
Timer node:
|
||||
|
||||
- compatible: Must be "brcm,bcm6328-timer", "syscon"
|
||||
- reg: Register base address and length
|
||||
|
||||
Syscon reboot node:
|
||||
|
||||
See Documentation/devicetree/bindings/power/reset/syscon-reboot.txt for the
|
||||
detailed list of properties, the two values defined below are specific to the
|
||||
BCM6328-style timer:
|
||||
|
||||
- offset: Should be 0x34 to denote the offset of the TIMER_WD_TIMER_RESET register
|
||||
from the beginning of the TIMER block
|
||||
- mask: Should be 1 for the SoftRst bit.
|
||||
|
||||
Example:
|
||||
|
||||
timer: timer@80 {
|
||||
compatible = "brcm,bcm6328-timer", "syscon";
|
||||
reg = <0x80 0x3c>;
|
||||
};
|
||||
|
||||
reboot {
|
||||
compatible = "syscon-reboot";
|
||||
regmap = <&timer>;
|
||||
offset = <0x34>;
|
||||
mask = <0x1>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,5 +1,8 @@
|
|||
Hisilicon Platforms Device Tree Bindings
|
||||
----------------------------------------------------
|
||||
Hi6220 SoC
|
||||
Required root node properties:
|
||||
- compatible = "hisilicon,hi6220";
|
||||
|
||||
Hi4511 Board
|
||||
Required root node properties:
|
||||
|
|
@ -13,6 +16,9 @@ HiP01 ca9x2 Board
|
|||
Required root node properties:
|
||||
- compatible = "hisilicon,hip01-ca9x2";
|
||||
|
||||
HiKey Board
|
||||
Required root node properties:
|
||||
- compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
|
||||
|
||||
Hisilicon system controller
|
||||
|
||||
|
|
@ -40,6 +46,87 @@ Example:
|
|||
reboot-offset = <0x4>;
|
||||
};
|
||||
|
||||
-----------------------------------------------------------------------
|
||||
Hisilicon Hi6220 system controller
|
||||
|
||||
Required properties:
|
||||
- compatible : "hisilicon,hi6220-sysctrl"
|
||||
- reg : Register address and size
|
||||
- #clock-cells: should be set to 1, many clock registers are defined
|
||||
under this controller and this property must be present.
|
||||
|
||||
Hisilicon designs this controller as one of the system controllers,
|
||||
its main functions are the same as Hisilicon system controller, but
|
||||
the register offset of some core modules are different.
|
||||
|
||||
Example:
|
||||
/*for Hi6220*/
|
||||
sys_ctrl: sys_ctrl@f7030000 {
|
||||
compatible = "hisilicon,hi6220-sysctrl", "syscon";
|
||||
reg = <0x0 0xf7030000 0x0 0x2000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
|
||||
Hisilicon Hi6220 Power Always ON domain controller
|
||||
|
||||
Required properties:
|
||||
- compatible : "hisilicon,hi6220-aoctrl"
|
||||
- reg : Register address and size
|
||||
- #clock-cells: should be set to 1, many clock registers are defined
|
||||
under this controller and this property must be present.
|
||||
|
||||
Hisilicon designs this system controller to control the power always
|
||||
on domain for mobile platform.
|
||||
|
||||
Example:
|
||||
/*for Hi6220*/
|
||||
ao_ctrl: ao_ctrl@f7800000 {
|
||||
compatible = "hisilicon,hi6220-aoctrl", "syscon";
|
||||
reg = <0x0 0xf7800000 0x0 0x2000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
|
||||
Hisilicon Hi6220 Media domain controller
|
||||
|
||||
Required properties:
|
||||
- compatible : "hisilicon,hi6220-mediactrl"
|
||||
- reg : Register address and size
|
||||
- #clock-cells: should be set to 1, many clock registers are defined
|
||||
under this controller and this property must be present.
|
||||
|
||||
Hisilicon designs this system controller to control the multimedia
|
||||
domain(e.g. codec, G3D ...) for mobile platform.
|
||||
|
||||
Example:
|
||||
/*for Hi6220*/
|
||||
media_ctrl: media_ctrl@f4410000 {
|
||||
compatible = "hisilicon,hi6220-mediactrl", "syscon";
|
||||
reg = <0x0 0xf4410000 0x0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
|
||||
Hisilicon Hi6220 Power Management domain controller
|
||||
|
||||
Required properties:
|
||||
- compatible : "hisilicon,hi6220-pmctrl"
|
||||
- reg : Register address and size
|
||||
- #clock-cells: should be set to 1, some clock registers are define
|
||||
under this controller and this property must be present.
|
||||
|
||||
Hisilicon designs this system controller to control the power management
|
||||
domain for mobile platform.
|
||||
|
||||
Example:
|
||||
/*for Hi6220*/
|
||||
pm_ctrl: pm_ctrl@f7032000 {
|
||||
compatible = "hisilicon,hi6220-pmctrl", "syscon";
|
||||
reg = <0x0 0xf7032000 0x0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
-----------------------------------------------------------------------
|
||||
Hisilicon HiP01 system controller
|
||||
|
||||
|
|
|
|||
|
|
@ -1,6 +1,18 @@
|
|||
Marvell Berlin SoC Family Device Tree Bindings
|
||||
---------------------------------------------------------------
|
||||
|
||||
Work in progress statement:
|
||||
|
||||
Device tree files and bindings applying to Marvell Berlin SoCs and boards are
|
||||
considered "unstable". Any Marvell Berlin device tree binding may change at any
|
||||
time. Be sure to use a device tree binary and a kernel image generated from the
|
||||
same source tree.
|
||||
|
||||
Please refer to Documentation/devicetree/bindings/ABI.txt for a definition of a
|
||||
stable binding/ABI.
|
||||
|
||||
---------------------------------------------------------------
|
||||
|
||||
Boards with a SoC of the Marvell Berlin family, e.g. Armada 1500
|
||||
shall have the following properties:
|
||||
|
||||
|
|
@ -49,10 +61,9 @@ chip control registers, so there should be a single DT node only providing the
|
|||
different functions which are described below.
|
||||
|
||||
Required properties:
|
||||
- compatible: shall be one of
|
||||
"marvell,berlin2-chip-ctrl" for BG2
|
||||
"marvell,berlin2cd-chip-ctrl" for BG2CD
|
||||
"marvell,berlin2q-chip-ctrl" for BG2Q
|
||||
- compatible:
|
||||
* the first and second values must be:
|
||||
"simple-mfd", "syscon"
|
||||
- reg: address and length of following register sets for
|
||||
BG2/BG2CD: chip control register set
|
||||
BG2Q: chip control register set and cpu pll registers
|
||||
|
|
@ -63,90 +74,23 @@ Marvell Berlin SoCs have a system control register set providing several
|
|||
individual registers dealing with pinmux, padmux, and reset.
|
||||
|
||||
Required properties:
|
||||
- compatible: should be one of
|
||||
"marvell,berlin2-system-ctrl" for BG2
|
||||
"marvell,berlin2cd-system-ctrl" for BG2CD
|
||||
"marvell,berlin2q-system-ctrl" for BG2Q
|
||||
- compatible:
|
||||
* the first and second values must be:
|
||||
"simple-mfd", "syscon"
|
||||
- reg: address and length of the system control register set
|
||||
|
||||
* Clock provider binding
|
||||
|
||||
As clock related registers are spread among the chip control registers, the
|
||||
chip control node also provides the clocks. Marvell Berlin2 (BG2, BG2CD, BG2Q)
|
||||
SoCs share the same IP for PLLs and clocks, with some minor differences in
|
||||
features and register layout.
|
||||
|
||||
Required properties:
|
||||
- #clock-cells: shall be set to 1
|
||||
- clocks: clock specifiers referencing the core clock input clocks
|
||||
- clock-names: array of strings describing the input clock specifiers above.
|
||||
Allowed clock-names for the reference clocks are
|
||||
"refclk" for the SoCs osciallator input on all SoCs,
|
||||
and SoC-specific input clocks for
|
||||
BG2/BG2CD: "video_ext0" for the external video clock input
|
||||
|
||||
Clocks provided by core clocks shall be referenced by a clock specifier
|
||||
indexing one of the provided clocks. Refer to dt-bindings/clock/berlin<soc>.h
|
||||
for the corresponding index mapping.
|
||||
|
||||
* Pin controller binding
|
||||
|
||||
Pin control registers are part of both register sets, chip control and system
|
||||
control. The pins controlled are organized in groups, so no actual pin
|
||||
information is needed.
|
||||
|
||||
A pin-controller node should contain subnodes representing the pin group
|
||||
configurations, one per function. Each subnode has the group name and the muxing
|
||||
function used.
|
||||
|
||||
Be aware the Marvell Berlin datasheets use the keyword 'mode' for what is called
|
||||
a 'function' in the pin-controller subsystem.
|
||||
|
||||
Required subnode-properties:
|
||||
- groups: a list of strings describing the group names.
|
||||
- function: a string describing the function used to mux the groups.
|
||||
|
||||
* Reset controller binding
|
||||
|
||||
A reset controller is part of the chip control registers set. The chip control
|
||||
node also provides the reset. The register set is not at the same offset between
|
||||
Berlin SoCs.
|
||||
|
||||
Required property:
|
||||
- #reset-cells: must be set to 2
|
||||
|
||||
Example:
|
||||
|
||||
chip: chip-control@ea0000 {
|
||||
compatible = "marvell,berlin2-chip-ctrl";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <2>;
|
||||
compatible = "simple-mfd", "syscon";
|
||||
reg = <0xea0000 0x400>;
|
||||
clocks = <&refclk>, <&externaldev 0>;
|
||||
clock-names = "refclk", "video_ext0";
|
||||
|
||||
spi1_pmux: spi1-pmux {
|
||||
groups = "G0";
|
||||
function = "spi1";
|
||||
};
|
||||
/* sub-device nodes */
|
||||
};
|
||||
|
||||
sysctrl: system-controller@d000 {
|
||||
compatible = "marvell,berlin2-system-ctrl";
|
||||
compatible = "simple-mfd", "syscon";
|
||||
reg = <0xd000 0x100>;
|
||||
|
||||
uart0_pmux: uart0-pmux {
|
||||
groups = "GSM4";
|
||||
function = "uart0";
|
||||
};
|
||||
|
||||
uart1_pmux: uart1-pmux {
|
||||
groups = "GSM5";
|
||||
function = "uart1";
|
||||
};
|
||||
|
||||
uart2_pmux: uart2-pmux {
|
||||
groups = "GSM3";
|
||||
function = "uart2";
|
||||
};
|
||||
/* sub-device nodes */
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,25 @@
|
|||
* ARM Snoop Control Unit (SCU)
|
||||
|
||||
As part of the MPCore complex, Cortex-A5 and Cortex-A9 are provided
|
||||
with a Snoop Control Unit. The register range is usually 256 (0x100)
|
||||
bytes.
|
||||
|
||||
References:
|
||||
|
||||
- Cortex-A9: see DDI0407E Cortex-A9 MPCore Technical Reference Manual
|
||||
Revision r2p0
|
||||
- Cortex-A5: see DDI0434B Cortex-A5 MPCore Technical Reference Manual
|
||||
Revision r0p1
|
||||
|
||||
- compatible : Should be:
|
||||
"arm,cortex-a9-scu"
|
||||
"arm,cortex-a5-scu"
|
||||
|
||||
- reg : Specify the base address and the size of the SCU register window.
|
||||
|
||||
Example:
|
||||
|
||||
scu@a04100000 {
|
||||
compatible = "arm,cortex-a9-scu";
|
||||
reg = <0xa0410000 0x100>;
|
||||
};
|
||||
|
|
@ -0,0 +1,83 @@
|
|||
ST-Ericsson Ux500 boards
|
||||
------------------------
|
||||
|
||||
Required properties (in root node) one of these:
|
||||
compatible = "st-ericsson,mop500" (legacy)
|
||||
compatible = "st-ericsson,u8500"
|
||||
|
||||
Required node (under root node):
|
||||
|
||||
soc: represents the system-on-chip and contains the chip
|
||||
peripherals
|
||||
|
||||
Required property of soc node, one of these:
|
||||
compatible = "stericsson,db8500"
|
||||
|
||||
Required subnodes under soc node:
|
||||
|
||||
backupram: (used for CPU spin tables and for storing data
|
||||
during retention, system won't boot without this):
|
||||
compatible = "ste,dbx500-backupram"
|
||||
|
||||
scu:
|
||||
see binding for arm/scu.txt
|
||||
|
||||
interrupt-controller:
|
||||
see binding for arm/gic.txt
|
||||
|
||||
timer:
|
||||
see binding for arm/twd.txt
|
||||
|
||||
clocks:
|
||||
see binding for clocks/ux500.txt
|
||||
|
||||
Example:
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
model = "ST-Ericsson HREF (pre-v60) and ST UIB";
|
||||
compatible = "st-ericsson,mop500", "st-ericsson,u8500";
|
||||
|
||||
soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "stericsson,db8500";
|
||||
interrupt-parent = <&intc>;
|
||||
ranges;
|
||||
|
||||
backupram@80150000 {
|
||||
compatible = "ste,dbx500-backupram";
|
||||
reg = <0x80150000 0x2000>;
|
||||
};
|
||||
|
||||
intc: interrupt-controller@a0411000 {
|
||||
compatible = "arm,cortex-a9-gic";
|
||||
#interrupt-cells = <3>;
|
||||
#address-cells = <1>;
|
||||
interrupt-controller;
|
||||
reg = <0xa0411000 0x1000>,
|
||||
<0xa0410100 0x100>;
|
||||
};
|
||||
|
||||
scu@a04100000 {
|
||||
compatible = "arm,cortex-a9-scu";
|
||||
reg = <0xa0410000 0x100>;
|
||||
};
|
||||
|
||||
timer@a0410600 {
|
||||
compatible = "arm,cortex-a9-twd-timer";
|
||||
reg = <0xa0410600 0x20>;
|
||||
interrupts = <1 13 0x304>; /* IRQ level high per-CPU */
|
||||
clocks = <&smp_twd_clk>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
compatible = "stericsson,u8500-clks";
|
||||
|
||||
smp_twd_clk: smp-twd-clock {
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,34 @@
|
|||
* Hisilicon Hi6220 Clock Controller
|
||||
|
||||
Clock control registers reside in different Hi6220 system controllers,
|
||||
please refer the following document to know more about the binding rules
|
||||
for these system controllers:
|
||||
|
||||
Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
|
||||
|
||||
Required Properties:
|
||||
|
||||
- compatible: the compatible should be one of the following strings to
|
||||
indicate the clock controller functionality.
|
||||
|
||||
- "hisilicon,hi6220-aoctrl"
|
||||
- "hisilicon,hi6220-sysctrl"
|
||||
- "hisilicon,hi6220-mediactrl"
|
||||
- "hisilicon,hi6220-pmctrl"
|
||||
|
||||
- reg: physical base address of the controller and length of memory mapped
|
||||
region.
|
||||
|
||||
- #clock-cells: should be 1.
|
||||
|
||||
For example:
|
||||
sys_ctrl: sys_ctrl@f7030000 {
|
||||
compatible = "hisilicon,hi6220-sysctrl", "syscon";
|
||||
reg = <0x0 0xf7030000 0x0 0x2000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
Each clock is assigned an identifier and client nodes use this identifier
|
||||
to specify the clock which they consume.
|
||||
|
||||
All these identifier could be found in <dt-bindings/clock/hi6220-clock.h>.
|
||||
|
|
@ -0,0 +1,13 @@
|
|||
* Clock bindings for Freescale i.MX7 Dual
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "fsl,imx7d-ccm"
|
||||
- reg: Address and length of the register set
|
||||
- #clock-cells: Should be <1>
|
||||
- clocks: list of clock specifiers, must contain an entry for each required
|
||||
entry in clock-names
|
||||
- clock-names: should include entries "ckil", "osc"
|
||||
|
||||
The clock consumer should specify the desired clock by having the clock
|
||||
ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx7d-clock.h
|
||||
for the full list of i.MX7 Dual clock IDs.
|
||||
|
|
@ -0,0 +1,31 @@
|
|||
Device Tree Clock bindings for Marvell Berlin
|
||||
|
||||
This binding uses the common clock binding[1].
|
||||
|
||||
[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
|
||||
|
||||
Clock related registers are spread among the chip control registers. Berlin
|
||||
clock node should be a sub-node of the chip controller node. Marvell Berlin2
|
||||
(BG2, BG2CD, BG2Q) SoCs share the same IP for PLLs and clocks, with some
|
||||
minor differences in features and register layout.
|
||||
|
||||
Required properties:
|
||||
- compatible: must be "marvell,berlin2-clk" or "marvell,berlin2q-clk"
|
||||
- #clock-cells: must be 1
|
||||
- clocks: must be the input parent clock phandle
|
||||
- clock-names: name of the input parent clock
|
||||
Allowed clock-names for the reference clocks are
|
||||
"refclk" for the SoCs oscillator input on all SoCs,
|
||||
and SoC-specific input clocks for
|
||||
BG2/BG2CD: "video_ext0" for the external video clock input
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
chip_clk: clock {
|
||||
compatible = "marvell,berlin2q-clk";
|
||||
|
||||
#clock-cells = <1>;
|
||||
clocks = <&refclk>;
|
||||
clock-names = "refclk";
|
||||
};
|
||||
|
|
@ -58,5 +58,5 @@ Example:
|
|||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
}
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,43 @@
|
|||
* Pin-controller driver for the Marvell Berlin SoCs
|
||||
|
||||
Pin control registers are part of both chip controller and system
|
||||
controller register sets. Pin controller nodes should be a sub-node of
|
||||
either the chip controller or system controller node. The pins
|
||||
controlled are organized in groups, so no actual pin information is
|
||||
needed.
|
||||
|
||||
A pin-controller node should contain subnodes representing the pin group
|
||||
configurations, one per function. Each subnode has the group name and
|
||||
the muxing function used.
|
||||
|
||||
Be aware the Marvell Berlin datasheets use the keyword 'mode' for what
|
||||
is called a 'function' in the pin-controller subsystem.
|
||||
|
||||
Required properties:
|
||||
- compatible: should be one of:
|
||||
"marvell,berlin2-soc-pinctrl",
|
||||
"marvell,berlin2-system-pinctrl",
|
||||
"marvell,berlin2cd-soc-pinctrl",
|
||||
"marvell,berlin2cd-system-pinctrl",
|
||||
"marvell,berlin2q-soc-pinctrl",
|
||||
"marvell,berlin2q-system-pinctrl"
|
||||
|
||||
Required subnode-properties:
|
||||
- groups: a list of strings describing the group names.
|
||||
- function: a string describing the function used to mux the groups.
|
||||
|
||||
Example:
|
||||
|
||||
sys_pinctrl: pin-controller {
|
||||
compatible = "marvell,berlin2q-system-pinctrl";
|
||||
|
||||
uart0_pmux: uart0-pmux {
|
||||
groups = "GSM12";
|
||||
function = "uart0";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-0 = <&uart0_pmux>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
* Freescale i.MX7 Dual IOMUX Controller
|
||||
|
||||
Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
|
||||
and usage.
|
||||
|
||||
Required properties:
|
||||
- compatible: "fsl,imx7d-iomuxc"
|
||||
- fsl,pins: each entry consists of 6 integers and represents the mux and config
|
||||
setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
|
||||
input_val> are specified using a PIN_FUNC_ID macro, which can be found in
|
||||
imx7d-pinfunc.h under device tree source folder. The last integer CONFIG is
|
||||
the pad setting value like pull-up on this pin. Please refer to i.MX7 Dual
|
||||
Reference Manual for detailed CONFIG settings.
|
||||
|
||||
CONFIG bits definition:
|
||||
PAD_CTL_PUS_100K_DOWN (0 << 5)
|
||||
PAD_CTL_PUS_5K_UP (1 << 5)
|
||||
PAD_CTL_PUS_47K_UP (2 << 5)
|
||||
PAD_CTL_PUS_100K_UP (3 << 5)
|
||||
PAD_CTL_PUE (1 << 4)
|
||||
PAD_CTL_HYS (1 << 3)
|
||||
PAD_CTL_SRE_SLOW (1 << 2)
|
||||
PAD_CTL_SRE_FAST (0 << 2)
|
||||
PAD_CTL_DSE_X1 (0 << 0)
|
||||
PAD_CTL_DSE_X2 (1 << 0)
|
||||
PAD_CTL_DSE_X3 (2 << 0)
|
||||
PAD_CTL_DSE_X4 (3 << 0)
|
||||
|
|
@ -0,0 +1,23 @@
|
|||
Marvell Berlin reset controller
|
||||
===============================
|
||||
|
||||
Please also refer to reset.txt in this directory for common reset
|
||||
controller binding usage.
|
||||
|
||||
The reset controller node must be a sub-node of the chip controller
|
||||
node on Berlin SoCs.
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "marvell,berlin2-reset"
|
||||
- #reset-cells: must be set to 2
|
||||
|
||||
Example:
|
||||
|
||||
chip_rst: reset {
|
||||
compatible = "marvell,berlin2-reset";
|
||||
#reset-cells = <2>;
|
||||
};
|
||||
|
||||
&usb_phy0 {
|
||||
resets = <&chip_rst 0x104 12>;
|
||||
};
|
||||
|
|
@ -0,0 +1,19 @@
|
|||
Broadcom BCM63138 Processor Monitor Bus binding
|
||||
===============================================
|
||||
|
||||
Please also refer to reset.txt in this directory for common reset
|
||||
controller binding usage.
|
||||
|
||||
Require properties:
|
||||
|
||||
- compatible: must be "brcm,bcm63138-pmb"
|
||||
- reg: base register address and size for this bus controller
|
||||
- #reset-cells: must be 2 first cell is the address within the bus instance designated
|
||||
by the phandle, and the second is the number of zones for this peripheral
|
||||
|
||||
Example:
|
||||
pmb0: reset-controller@4800c0 {
|
||||
compatible = "brcm,bcm63138-pmb";
|
||||
reg = <0x4800c0 0x10>;
|
||||
#reset-cells = <2>;
|
||||
};
|
||||
|
|
@ -6,7 +6,8 @@ Required properties:
|
|||
* "samsung,s3c2416-rtc" - for controllers compatible with s3c2416 rtc.
|
||||
* "samsung,s3c2443-rtc" - for controllers compatible with s3c2443 rtc.
|
||||
* "samsung,s3c6410-rtc" - for controllers compatible with s3c6410 rtc.
|
||||
* "samsung,exynos3250-rtc" - for controllers compatible with exynos3250 rtc.
|
||||
* "samsung,exynos3250-rtc" - (deprecated) for controllers compatible with
|
||||
exynos3250 rtc (use "samsung,s3c6410-rtc").
|
||||
- reg: physical base address of the controller and length of memory mapped
|
||||
region.
|
||||
- interrupts: Two interrupt numbers to the cpu should be specified. First
|
||||
|
|
|
|||
|
|
@ -60,7 +60,7 @@ Example:
|
|||
|
||||
msiof0: spi@e6e20000 {
|
||||
compatible = "renesas,msiof-r8a7791";
|
||||
reg = <0 0xe6e20000 0 0x0064>, <0 0xe7e20000 0 0x0064>;
|
||||
reg = <0 0xe6e20000 0 0x0064>;
|
||||
interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
|
||||
dmas = <&dmac0 0x51>, <&dmac0 0x52>;
|
||||
|
|
|
|||
|
|
@ -6,6 +6,9 @@ Required properties:
|
|||
- interrupts : A list of 3 interrupts; one per timer channel.
|
||||
- clocks: phandle to the source clock
|
||||
|
||||
Optional properties:
|
||||
- timer-width: Bit width of the timer, necessary if not 16.
|
||||
|
||||
Example:
|
||||
|
||||
ttc0: ttc0@f8001000 {
|
||||
|
|
@ -14,4 +17,5 @@ ttc0: ttc0@f8001000 {
|
|||
compatible = "cdns,ttc";
|
||||
reg = <0xF8001000 0x1000>;
|
||||
clocks = <&cpu_clk 3>;
|
||||
timer-width = <32>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -5,6 +5,13 @@ OHCI
|
|||
Required properties:
|
||||
- compatible: Should be "atmel,at91rm9200-ohci" for USB controllers
|
||||
used in host mode.
|
||||
- reg: Address and length of the register set for the device
|
||||
- interrupts: Should contain ehci interrupt
|
||||
- clocks: Should reference the peripheral, host and system clocks
|
||||
- clock-names: Should contains two strings
|
||||
"ohci_clk" for the peripheral clock
|
||||
"hclk" for the host clock
|
||||
"uhpck" for the system clock
|
||||
- num-ports: Number of ports.
|
||||
- atmel,vbus-gpio: If present, specifies a gpio that needs to be
|
||||
activated for the bus to be powered.
|
||||
|
|
@ -14,6 +21,8 @@ Required properties:
|
|||
usb0: ohci@00500000 {
|
||||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00500000 0x100000>;
|
||||
clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
|
||||
clock-names = "ohci_clk", "hclk", "uhpck";
|
||||
interrupts = <20 4>;
|
||||
num-ports = <2>;
|
||||
};
|
||||
|
|
@ -23,11 +32,19 @@ EHCI
|
|||
Required properties:
|
||||
- compatible: Should be "atmel,at91sam9g45-ehci" for USB controllers
|
||||
used in host mode.
|
||||
- reg: Address and length of the register set for the device
|
||||
- interrupts: Should contain ehci interrupt
|
||||
- clocks: Should reference the peripheral and the UTMI clocks
|
||||
- clock-names: Should contains two strings
|
||||
"ehci_clk" for the peripheral clock
|
||||
"usb_clk" for the UTMI clock
|
||||
|
||||
usb1: ehci@00800000 {
|
||||
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
|
||||
reg = <0x00800000 0x100000>;
|
||||
interrupts = <22 4>;
|
||||
clocks = <&utmi>, <&uhphs_clk>;
|
||||
clock-names = "usb_clk", "ehci_clk";
|
||||
};
|
||||
|
||||
AT91 USB device controller
|
||||
|
|
@ -53,6 +70,8 @@ usb1: gadget@fffa4000 {
|
|||
compatible = "atmel,at91rm9200-udc";
|
||||
reg = <0xfffa4000 0x4000>;
|
||||
interrupts = <10 4>;
|
||||
clocks = <&udc_clk>, <&udpck>;
|
||||
clock-names = "pclk", "hclk";
|
||||
atmel,vbus-gpio = <&pioC 5 0>;
|
||||
};
|
||||
|
||||
|
|
@ -65,6 +84,10 @@ Required properties:
|
|||
"sama5d3-udc"
|
||||
- reg: Address and length of the register set for the device
|
||||
- interrupts: Should contain usba interrupt
|
||||
- clocks: Should reference the peripheral and host clocks
|
||||
- clock-names: Should contains two strings
|
||||
"pclk" for the peripheral clock
|
||||
"hclk" for the host clock
|
||||
- ep childnode: To specify the number of endpoints and their properties.
|
||||
|
||||
Optional properties:
|
||||
|
|
@ -86,6 +109,8 @@ usb2: gadget@fff78000 {
|
|||
reg = <0x00600000 0x80000
|
||||
0xfff78000 0x400>;
|
||||
interrupts = <27 4 0>;
|
||||
clocks = <&utmi>, <&udphs_clk>;
|
||||
clock-names = "hclk", "pclk";
|
||||
atmel,vbus-gpio = <&pioB 19 0>;
|
||||
|
||||
ep0 {
|
||||
|
|
|
|||
|
|
@ -40,6 +40,7 @@ calxeda Calxeda
|
|||
capella Capella Microsystems, Inc
|
||||
cavium Cavium, Inc.
|
||||
cdns Cadence Design Systems Inc.
|
||||
ceva Ceva, Inc.
|
||||
chipidea Chipidea, Inc
|
||||
chipone ChipOne
|
||||
chipspark ChipSPARK
|
||||
|
|
@ -52,6 +53,7 @@ cnxt Conexant Systems, Inc.
|
|||
cortina Cortina Systems, Inc.
|
||||
cosmic Cosmic Circuits
|
||||
crystalfontz Crystalfontz America, Inc.
|
||||
cubietech Cubietech, Ltd.
|
||||
dallas Maxim Integrated Products (formerly Dallas Semiconductor)
|
||||
davicom DAVICOM Semiconductor, Inc.
|
||||
delta Delta Electronics, Inc.
|
||||
|
|
@ -61,6 +63,7 @@ digilent Diglent, Inc.
|
|||
dlg Dialog Semiconductor
|
||||
dlink D-Link Corporation
|
||||
dmo Data Modul AG
|
||||
ea Embedded Artists AB
|
||||
ebv EBV Elektronik
|
||||
edt Emerging Display Technologies
|
||||
elan Elan Microelectronic Corp.
|
||||
|
|
@ -91,9 +94,11 @@ gumstix Gumstix, Inc.
|
|||
gw Gateworks Corporation
|
||||
hannstar HannStar Display Corporation
|
||||
haoyu Haoyu Microelectronic Co. Ltd.
|
||||
hardkernel Hardkernel Co., Ltd
|
||||
himax Himax Technologies, Inc.
|
||||
hisilicon Hisilicon Limited.
|
||||
hit Hitachi Ltd.
|
||||
hitex Hitex Development Tools
|
||||
honeywell Honeywell
|
||||
hp Hewlett Packard
|
||||
i2se I2SE GmbH
|
||||
|
|
@ -160,6 +165,7 @@ radxa Radxa
|
|||
raidsonic RaidSonic Technology GmbH
|
||||
ralink Mediatek/Ralink Technology Corp.
|
||||
ramtron Ramtron International
|
||||
raspberrypi Raspberry Pi Foundation
|
||||
realtek Realtek Semiconductor Corp.
|
||||
renesas Renesas Electronics Corporation
|
||||
richtek Richtek Technology Corporation
|
||||
|
|
@ -192,6 +198,7 @@ ste ST-Ericsson
|
|||
stericsson ST-Ericsson
|
||||
synology Synology, Inc.
|
||||
tbs TBS Technologies
|
||||
tcl Toby Churchill Ltd.
|
||||
thine THine Electronics, Inc.
|
||||
ti Texas Instruments
|
||||
tlm Trusted Logic Mobility
|
||||
|
|
@ -205,6 +212,7 @@ variscite Variscite Ltd.
|
|||
via VIA Technologies, Inc.
|
||||
virtio Virtual I/O Device Specification, developed by the OASIS consortium
|
||||
voipac Voipac Technologies s.r.o.
|
||||
wexler Wexler
|
||||
winbond Winbond Electronics corp.
|
||||
wlf Wolfson Microelectronics
|
||||
wm Wondermedia Technologies, Inc.
|
||||
|
|
|
|||
|
|
@ -20,9 +20,9 @@ dtb-$(CONFIG_SOC_SAM_V4_V5) += \
|
|||
tny_a9263.dtb \
|
||||
usb_a9263.dtb \
|
||||
at91-foxg20.dtb \
|
||||
at91-kizbox.dtb \
|
||||
at91sam9g20ek.dtb \
|
||||
at91sam9g20ek_2mmc.dtb \
|
||||
kizbox.dtb \
|
||||
tny_a9g20.dtb \
|
||||
usb_a9g20.dtb \
|
||||
usb_a9g20_lpw.dtb \
|
||||
|
|
@ -31,13 +31,16 @@ dtb-$(CONFIG_SOC_SAM_V4_V5) += \
|
|||
at91sam9n12ek.dtb \
|
||||
at91sam9rlek.dtb \
|
||||
at91-ariag25.dtb \
|
||||
at91-ariettag25.dtb \
|
||||
at91-cosino_mega2560.dtb \
|
||||
at91-kizboxmini.dtb \
|
||||
at91sam9g15ek.dtb \
|
||||
at91sam9g25ek.dtb \
|
||||
at91sam9g35ek.dtb \
|
||||
at91sam9x25ek.dtb \
|
||||
at91sam9x35ek.dtb
|
||||
dtb-$(CONFIG_SOC_SAM_V7) += \
|
||||
at91-kizbox2.dtb \
|
||||
at91-sama5d3_xplained.dtb \
|
||||
sama5d31ek.dtb \
|
||||
sama5d33ek.dtb \
|
||||
|
|
@ -56,13 +59,18 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
|
|||
bcm2835-rpi-b.dtb \
|
||||
bcm2835-rpi-b-plus.dtb
|
||||
dtb-$(CONFIG_ARCH_BCM_5301X) += \
|
||||
bcm4708-asus-rt-ac56u.dtb \
|
||||
bcm4708-asus-rt-ac68u.dtb \
|
||||
bcm4708-buffalo-wzr-1750dhp.dtb \
|
||||
bcm4708-luxul-xwc-1000.dtb \
|
||||
bcm4708-netgear-r6250.dtb \
|
||||
bcm4708-netgear-r6300-v2.dtb \
|
||||
bcm4708-smartrg-sr400ac.dtb \
|
||||
bcm47081-asus-rt-n18u.dtb \
|
||||
bcm47081-buffalo-wzr-600dhp2.dtb \
|
||||
bcm47081-buffalo-wzr-900dhp.dtb \
|
||||
bcm4709-asus-rt-ac87u.dtb \
|
||||
bcm4709-buffalo-wxr-1900dhp.dtb \
|
||||
bcm4709-netgear-r8000.dtb
|
||||
dtb-$(CONFIG_ARCH_BCM_63XX) += \
|
||||
bcm963138dvt.dtb
|
||||
|
|
@ -113,6 +121,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \
|
|||
exynos5420-peach-pit.dtb \
|
||||
exynos5420-smdk5420.dtb \
|
||||
exynos5422-odroidxu3.dtb \
|
||||
exynos5422-odroidxu3-lite.dtb \
|
||||
exynos5440-sd5v1.dtb \
|
||||
exynos5440-ssdk5440.dtb \
|
||||
exynos5800-peach-pi.dtb
|
||||
|
|
@ -201,6 +210,9 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
|
|||
kirkwood-ts219-6282.dtb \
|
||||
kirkwood-ts419-6281.dtb \
|
||||
kirkwood-ts419-6282.dtb
|
||||
dtb-$(CONFIG_ARCH_LPC18XX) += \
|
||||
lpc4350-hitex-eval.dtb \
|
||||
lpc4357-ea4357-devkit.dtb
|
||||
dtb-$(CONFIG_ARCH_LPC32XX) += \
|
||||
ea3250.dtb phy3250.dtb
|
||||
dtb-$(CONFIG_MACH_MESON6) += \
|
||||
|
|
@ -254,14 +266,18 @@ dtb-$(CONFIG_SOC_IMX53) += \
|
|||
imx53-tx53-x13x.dtb \
|
||||
imx53-voipac-bsb.dtb
|
||||
dtb-$(CONFIG_SOC_IMX6Q) += \
|
||||
imx6dl-apf6dev.dtb \
|
||||
imx6dl-aristainetos_4.dtb \
|
||||
imx6dl-aristainetos_7.dtb \
|
||||
imx6dl-aristainetos2_4.dtb \
|
||||
imx6dl-aristainetos2_7.dtb \
|
||||
imx6dl-cubox-i.dtb \
|
||||
imx6dl-dfi-fs700-m60.dtb \
|
||||
imx6dl-gw51xx.dtb \
|
||||
imx6dl-gw52xx.dtb \
|
||||
imx6dl-gw53xx.dtb \
|
||||
imx6dl-gw54xx.dtb \
|
||||
imx6dl-gw551x.dtb \
|
||||
imx6dl-gw552x.dtb \
|
||||
imx6dl-hummingboard.dtb \
|
||||
imx6dl-nitrogen6x.dtb \
|
||||
|
|
@ -277,6 +293,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
|||
imx6dl-udoo.dtb \
|
||||
imx6dl-wandboard.dtb \
|
||||
imx6dl-wandboard-revb1.dtb \
|
||||
imx6q-apf6dev.dtb \
|
||||
imx6q-arm2.dtb \
|
||||
imx6q-cm-fx6.dtb \
|
||||
imx6q-cubox-i.dtb \
|
||||
|
|
@ -288,6 +305,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
|||
imx6q-gw53xx.dtb \
|
||||
imx6q-gw5400-a.dtb \
|
||||
imx6q-gw54xx.dtb \
|
||||
imx6q-gw551x.dtb \
|
||||
imx6q-gw552x.dtb \
|
||||
imx6q-hummingboard.dtb \
|
||||
imx6q-nitrogen6x.dtb \
|
||||
|
|
@ -313,12 +331,15 @@ dtb-$(CONFIG_SOC_IMX6SX) += \
|
|||
imx6sx-sabreauto.dtb \
|
||||
imx6sx-sdb-reva.dtb \
|
||||
imx6sx-sdb.dtb
|
||||
dtb-$(CONFIG_SOC_IMX7D) += \
|
||||
imx7d-sdb.dtb
|
||||
dtb-$(CONFIG_SOC_LS1021A) += \
|
||||
ls1021a-qds.dtb \
|
||||
ls1021a-twr.dtb
|
||||
dtb-$(CONFIG_SOC_VF610) += \
|
||||
vf500-colibri-eval-v3.dtb \
|
||||
vf610-colibri-eval-v3.dtb \
|
||||
vf610m4-colibri.dtb \
|
||||
vf610-cosmic.dtb \
|
||||
vf610-twr.dtb
|
||||
dtb-$(CONFIG_ARCH_MXS) += \
|
||||
|
|
@ -360,6 +381,7 @@ dtb-$(CONFIG_ARCH_OMAP3) += \
|
|||
am3517-craneboard.dtb \
|
||||
am3517-evm.dtb \
|
||||
am3517_mt_ventoux.dtb \
|
||||
logicpd-torpedo-37xx-devkit.dtb \
|
||||
omap3430-sdp.dtb \
|
||||
omap3-beagle.dtb \
|
||||
omap3-beagle-xm.dtb \
|
||||
|
|
@ -406,9 +428,11 @@ dtb-$(CONFIG_ARCH_OMAP3) += \
|
|||
dtb-$(CONFIG_SOC_TI81XX) += \
|
||||
dm8168-evm.dtb
|
||||
dtb-$(CONFIG_SOC_AM33XX) += \
|
||||
am335x-baltos-ir5221.dtb \
|
||||
am335x-base0033.dtb \
|
||||
am335x-bone.dtb \
|
||||
am335x-boneblack.dtb \
|
||||
am335x-sl50.dtb \
|
||||
am335x-evm.dtb \
|
||||
am335x-evmsk.dtb \
|
||||
am335x-nano.dtb \
|
||||
|
|
@ -496,7 +520,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
|
|||
sh73a0-kzm9g.dtb
|
||||
dtb-$(CONFIG_ARCH_SOCFPGA) += \
|
||||
socfpga_arria5_socdk.dtb \
|
||||
socfpga_arria10_socdk.dtb \
|
||||
socfpga_arria10_socdk_sdmmc.dtb \
|
||||
socfpga_cyclone5_socdk.dtb \
|
||||
socfpga_cyclone5_sockit.dtb \
|
||||
socfpga_cyclone5_socrates.dtb \
|
||||
|
|
@ -520,32 +544,39 @@ dtb-$(CONFIG_ARCH_STI) += \
|
|||
stih416-b2020.dtb \
|
||||
stih416-b2020e.dtb \
|
||||
stih418-b2199.dtb
|
||||
dtb-$(CONFIG_ARCH_STM32)+= stm32f429-disco.dtb
|
||||
dtb-$(CONFIG_MACH_SUN4I) += \
|
||||
sun4i-a10-a1000.dtb \
|
||||
sun4i-a10-ba10-tvbox.dtb \
|
||||
sun4i-a10-chuwi-v7-cw0825.dtb \
|
||||
sun4i-a10-cubieboard.dtb \
|
||||
sun4i-a10-gemei-g9.dtb \
|
||||
sun4i-a10-hackberry.dtb \
|
||||
sun4i-a10-hyundai-a7hd.dtb \
|
||||
sun4i-a10-inet97fv2.dtb \
|
||||
sun4i-a10-jesurun-q5.dtb \
|
||||
sun4i-a10-marsboard.dtb \
|
||||
sun4i-a10-mini-xplus.dtb \
|
||||
sun4i-a10-mk802.dtb \
|
||||
sun4i-a10-mk802ii.dtb \
|
||||
sun4i-a10-hackberry.dtb \
|
||||
sun4i-a10-hyundai-a7hd.dtb \
|
||||
sun4i-a10-inet97fv2.dtb \
|
||||
sun4i-a10-olinuxino-lime.dtb \
|
||||
sun4i-a10-pcduino.dtb
|
||||
dtb-$(CONFIG_MACH_SUN5I) += \
|
||||
sun5i-a10s-auxtek-t004.dtb \
|
||||
sun5i-a10s-mk802.dtb \
|
||||
sun5i-a10s-olinuxino-micro.dtb \
|
||||
sun5i-a10s-r7-tv-dongle.dtb \
|
||||
sun5i-a13-hsg-h702.dtb \
|
||||
sun5i-a13-olinuxino.dtb \
|
||||
sun5i-a13-olinuxino-micro.dtb
|
||||
sun5i-a13-olinuxino-micro.dtb \
|
||||
sun5i-a13-utoo-p66.dtb
|
||||
dtb-$(CONFIG_MACH_SUN6I) += \
|
||||
sun6i-a31-app4-evb1.dtb \
|
||||
sun6i-a31-colombus.dtb \
|
||||
sun6i-a31-hummingbird.dtb \
|
||||
sun6i-a31-i7.dtb \
|
||||
sun6i-a31-m9.dtb \
|
||||
sun6i-a31-mele-a1000g-quad.dtb \
|
||||
sun6i-a31s-cs908.dtb
|
||||
dtb-$(CONFIG_MACH_SUN7I) += \
|
||||
sun7i-a20-bananapi.dtb \
|
||||
|
|
@ -555,15 +586,25 @@ dtb-$(CONFIG_MACH_SUN7I) += \
|
|||
sun7i-a20-hummingbird.dtb \
|
||||
sun7i-a20-i12-tvbox.dtb \
|
||||
sun7i-a20-m3.dtb \
|
||||
sun7i-a20-mk808c.dtb \
|
||||
sun7i-a20-olinuxino-lime.dtb \
|
||||
sun7i-a20-olinuxino-lime2.dtb \
|
||||
sun7i-a20-olinuxino-micro.dtb \
|
||||
sun7i-a20-pcduino3.dtb
|
||||
sun7i-a20-orangepi.dtb \
|
||||
sun7i-a20-orangepi-mini.dtb \
|
||||
sun7i-a20-pcduino3.dtb \
|
||||
sun7i-a20-pcduino3-nano.dtb \
|
||||
sun7i-a20-wexler-tab7200.dtb
|
||||
dtb-$(CONFIG_MACH_SUN8I) += \
|
||||
sun8i-a23-evb.dtb \
|
||||
sun8i-a23-ippo-q8h-v5.dtb \
|
||||
sun8i-a23-ippo-q8h-v1.2.dtb
|
||||
sun8i-a23-ippo-q8h-v1.2.dtb \
|
||||
sun8i-a33-et-q8-v1.6.dtb \
|
||||
sun8i-a33-ga10h-v1.1.dtb \
|
||||
sun8i-a33-sinlinx-sina33.dtb
|
||||
dtb-$(CONFIG_MACH_SUN9I) += \
|
||||
sun9i-a80-optimus.dtb
|
||||
sun9i-a80-optimus.dtb \
|
||||
sun9i-a80-cubieboard4.dtb
|
||||
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
|
||||
tegra20-harmony.dtb \
|
||||
tegra20-iris-512.dtb \
|
||||
|
|
@ -600,6 +641,11 @@ dtb-$(CONFIG_ARCH_U8500) += \
|
|||
ste-hrefv60plus-tvk.dtb \
|
||||
ste-ccu8540.dtb \
|
||||
ste-ccu9540.dtb
|
||||
dtb-$(CONFIG_ARCH_UNIPHIER) += \
|
||||
uniphier-ph1-sld3-ref.dtb \
|
||||
uniphier-ph1-ld4-ref.dtb \
|
||||
uniphier-ph1-pro4-ref.dtb \
|
||||
uniphier-ph1-sld8-ref.dtb
|
||||
dtb-$(CONFIG_ARCH_VERSATILE) += \
|
||||
versatile-ab.dtb \
|
||||
versatile-pb.dtb
|
||||
|
|
@ -624,6 +670,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
|
|||
zynq-zybo.dtb
|
||||
dtb-$(CONFIG_MACH_ARMADA_370) += \
|
||||
armada-370-db.dtb \
|
||||
armada-370-dlink-dns327l.dtb \
|
||||
armada-370-mirabox.dtb \
|
||||
armada-370-netgear-rn102.dtb \
|
||||
armada-370-netgear-rn104.dtb \
|
||||
|
|
@ -633,6 +680,8 @@ dtb-$(CONFIG_MACH_ARMADA_375) += \
|
|||
armada-375-db.dtb
|
||||
dtb-$(CONFIG_MACH_ARMADA_38X) += \
|
||||
armada-385-db-ap.dtb \
|
||||
armada-385-linksys-caiman.dtb \
|
||||
armada-385-linksys-cobra.dtb \
|
||||
armada-388-db.dtb \
|
||||
armada-388-gp.dtb \
|
||||
armada-388-rd.dtb
|
||||
|
|
@ -649,12 +698,12 @@ dtb-$(CONFIG_MACH_ARMADA_XP) += \
|
|||
armada-xp-openblocks-ax3-4.dtb \
|
||||
armada-xp-synology-ds414.dtb
|
||||
dtb-$(CONFIG_MACH_DOVE) += \
|
||||
dove-cm-a510.dtb \
|
||||
dove-cubox.dtb \
|
||||
dove-cubox-es.dtb \
|
||||
dove-d2plug.dtb \
|
||||
dove-d3plug.dtb \
|
||||
dove-dove-db.dtb
|
||||
dove-dove-db.dtb \
|
||||
dove-sbc-a510.dtb
|
||||
dtb-$(CONFIG_ARCH_MEDIATEK) += \
|
||||
mt6589-aquaris5.dtb \
|
||||
mt6592-evb.dtb \
|
||||
|
|
|
|||
|
|
@ -0,0 +1,532 @@
|
|||
/*
|
||||
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/*
|
||||
* VScom OnRISC
|
||||
* http://www.vscom.de
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "am33xx.dtsi"
|
||||
#include <dt-bindings/pwm/pwm.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
model = "OnRISC Baltos iR 5221";
|
||||
compatible = "vscom,onrisc", "ti,am33xx";
|
||||
|
||||
cpus {
|
||||
cpu@0 {
|
||||
cpu0-supply = <&vdd1_reg>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
||||
vbat: fixedregulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vbat";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
wl12xx_vmmc: fixedregulator@2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wl12xx_gpio>;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vwl1271";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
gpio = <&gpio3 8 0>;
|
||||
startup-delay-us = <70000>;
|
||||
enable-active-high;
|
||||
};
|
||||
};
|
||||
|
||||
&am33xx_pinmux {
|
||||
mmc2_pins: pinmux_mmc2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x020 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad8.mmc1_dat0_mux0 */
|
||||
0x024 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad9.mmc1_dat1_mux0 */
|
||||
0x028 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad10.mmc1_dat2_mux0 */
|
||||
0x02c (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad11.mmc1_dat3_mux0 */
|
||||
0x080 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk_mux0 */
|
||||
0x084 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd_mux0 */
|
||||
0x1e4 (PIN_INPUT_PULLUP | MUX_MODE7) /* emu0.gpio3[7] */
|
||||
>;
|
||||
};
|
||||
|
||||
wl12xx_gpio: pinmux_wl12xx_gpio {
|
||||
pinctrl-single,pins = <
|
||||
0x1e8 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* emu1.gpio3[8] */
|
||||
>;
|
||||
};
|
||||
|
||||
tps65910_pins: pinmux_tps65910_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x078 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_ben1.gpio1[28] */
|
||||
>;
|
||||
};
|
||||
|
||||
tca6416_pins: pinmux_tca6416_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x1b4 (PIN_INPUT_PULLUP | MUX_MODE7) /* xdma_event_intr1.gpio0[20] tca6416 stuff */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x158 0x2a /* spi0_d1.i2c1_sda_mux3, INPUT | MODE2 */
|
||||
0x15c 0x2a /* spi0_cs0.i2c1_scl_mux3, INPUT | MODE2 */
|
||||
>;
|
||||
};
|
||||
|
||||
dcan1_pins: pinmux_dcan1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x168 0x0a /* uart0_ctsn.dcan1_tx_mux0, OUTPUT | MODE2 */
|
||||
0x16c 0x2a /* uart0_rtsn.dcan1_rx_mux0, INPUT | MODE2 */
|
||||
>;
|
||||
};
|
||||
|
||||
uart0_pins: pinmux_uart0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart1_pins: pinmux_uart1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x180 0x28 /* uart1_rxd, INPUT | MODE0 */
|
||||
0x184 0x28 /* uart1_txd, INPUT | MODE0 */
|
||||
/*0x178 0x28*/ /* uart1_ctsn, INPUT | MODE0 */
|
||||
/*0x17c 0x08*/ /* uart1_rtsn, OUTPUT | MODE0 */
|
||||
0x178 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* uart1_ctsn, INPUT | MODE0 */
|
||||
0x17c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_rtsn, OUTPUT | MODE0 */
|
||||
0x0e0 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.gpio2[22] DTR */
|
||||
0x0e4 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.gpio2[23] DSR */
|
||||
0x0e8 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.gpio2[24] DCD */
|
||||
0x0ec (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.gpio2[25] RI */
|
||||
>;
|
||||
};
|
||||
|
||||
uart2_pins: pinmux_uart2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x150 0x29 /* spi0_sclk.uart2_rxd_mux3, INPUT | MODE1 */
|
||||
0x154 0x09 /* spi0_d0.uart2_txd_mux3, OUTPUT | MODE1 */
|
||||
/*0x188 0x2a*/ /* i2c0_sda.uart2_ctsn_mux0, INPUT | MODE2 */
|
||||
/*0x18c 0x2a*/ /* i2c0_scl.uart2_rtsn_mux0, INPUT | MODE2 */
|
||||
0x188 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* i2c0_sda.uart2_ctsn_mux0 */
|
||||
0x18c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* i2c0_scl.uart2_rtsn_mux0 */
|
||||
0x030 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad12.gpio1[12] DTR */
|
||||
0x034 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad13.gpio1[13] DSR */
|
||||
0x038 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad14.gpio1[14] DCD */
|
||||
0x03c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad15.gpio1[15] RI */
|
||||
|
||||
0x1a0 (PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkr.gpio3[18], INPUT_PULLDOWN | MODE7 */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_default: cpsw_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
|
||||
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_tx_en.rmii1_txen */
|
||||
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
|
||||
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
|
||||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_ref_clk.rmii1_refclk */
|
||||
|
||||
|
||||
/* Slave 2 */
|
||||
0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
|
||||
0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
|
||||
0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
|
||||
0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
|
||||
0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
|
||||
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
|
||||
0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
|
||||
0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
|
||||
0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
|
||||
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
|
||||
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
|
||||
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_sleep: cpsw_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 reset value */
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
|
||||
/* Slave 2 reset value*/
|
||||
0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_default: davinci_mdio_default {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO */
|
||||
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_sleep: davinci_mdio_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO reset value */
|
||||
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
nandflash_pins_s0: nandflash_pins_s0 {
|
||||
pinctrl-single,pins = <
|
||||
0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
|
||||
0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
|
||||
0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
|
||||
0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
|
||||
0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
|
||||
0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
|
||||
0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
|
||||
0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
|
||||
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
|
||||
0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
|
||||
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
|
||||
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
|
||||
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
|
||||
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
|
||||
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&elm {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&nandflash_pins_s0>;
|
||||
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
|
||||
status = "okay";
|
||||
|
||||
nand@0,0 {
|
||||
reg = <0 0 0>; /* CS0, offset 0 */
|
||||
nand-bus-width = <8>;
|
||||
ti,nand-ecc-opt = "bch8";
|
||||
ti,nand-xfer-type = "polled";
|
||||
|
||||
gpmc,device-nand = "true";
|
||||
gpmc,device-width = <1>;
|
||||
gpmc,sync-clk-ps = <0>;
|
||||
gpmc,cs-on-ns = <0>;
|
||||
gpmc,cs-rd-off-ns = <44>;
|
||||
gpmc,cs-wr-off-ns = <44>;
|
||||
gpmc,adv-on-ns = <6>;
|
||||
gpmc,adv-rd-off-ns = <34>;
|
||||
gpmc,adv-wr-off-ns = <44>;
|
||||
gpmc,we-on-ns = <0>;
|
||||
gpmc,we-off-ns = <40>;
|
||||
gpmc,oe-on-ns = <0>;
|
||||
gpmc,oe-off-ns = <54>;
|
||||
gpmc,access-ns = <64>;
|
||||
gpmc,rd-cycle-ns = <82>;
|
||||
gpmc,wr-cycle-ns = <82>;
|
||||
gpmc,wait-on-read = "true";
|
||||
gpmc,wait-on-write = "true";
|
||||
gpmc,bus-turnaround-ns = <0>;
|
||||
gpmc,cycle2cycle-delay-ns = <0>;
|
||||
gpmc,clk-activation-ns = <0>;
|
||||
gpmc,wait-monitoring-ns = <0>;
|
||||
gpmc,wr-access-ns = <40>;
|
||||
gpmc,wr-data-mux-bus-ns = <0>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
elm_id = <&elm>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
|
||||
dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
|
||||
dcd-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
|
||||
rng-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
|
||||
cts-gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
|
||||
rts-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
|
||||
dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
|
||||
dcd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
|
||||
rng-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
|
||||
cts-gpios = <&gpio3 5 GPIO_ACTIVE_LOW>;
|
||||
rts-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
|
||||
tps: tps@2d {
|
||||
reg = <0x2d>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <28 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&tps65910_pins>;
|
||||
};
|
||||
|
||||
at24@50 {
|
||||
compatible = "at24,24c02";
|
||||
pagesize = <8>;
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
tca6416: gpio@20 {
|
||||
compatible = "ti,tca6416";
|
||||
reg = <0x20>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <20 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&tca6416_pins>;
|
||||
};
|
||||
};
|
||||
|
||||
&usb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_ctrl_mod {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
status = "okay";
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
status = "okay";
|
||||
dr_mode = "otg";
|
||||
};
|
||||
|
||||
&cppi41dma {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
#include "tps65910.dtsi"
|
||||
|
||||
&tps {
|
||||
vcc1-supply = <&vbat>;
|
||||
vcc2-supply = <&vbat>;
|
||||
vcc3-supply = <&vbat>;
|
||||
vcc4-supply = <&vbat>;
|
||||
vcc5-supply = <&vbat>;
|
||||
vcc6-supply = <&vbat>;
|
||||
vcc7-supply = <&vbat>;
|
||||
vccio-supply = <&vbat>;
|
||||
|
||||
ti,en-ck32k-xtal = <1>;
|
||||
|
||||
regulators {
|
||||
vrtc_reg: regulator@0 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vio_reg: regulator@1 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd1_reg: regulator@2 {
|
||||
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <912500>;
|
||||
regulator-max-microvolt = <1312500>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd2_reg: regulator@3 {
|
||||
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <912500>;
|
||||
regulator-max-microvolt = <1150000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd3_reg: regulator@4 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdig1_reg: regulator@5 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdig2_reg: regulator@6 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vpll_reg: regulator@7 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdac_reg: regulator@8 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vaux1_reg: regulator@9 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vaux2_reg: regulator@10 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vaux33_reg: regulator@11 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vmmc_reg: regulator@12 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mac {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&cpsw_default>;
|
||||
pinctrl-1 = <&cpsw_sleep>;
|
||||
dual_emac = <1>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&davinci_mdio_default>;
|
||||
pinctrl-1 = <&davinci_mdio_sleep>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpsw_emac0 {
|
||||
phy_id = <&davinci_mdio>, <0>;
|
||||
phy-mode = "rmii";
|
||||
dual_emac_res_vlan = <1>;
|
||||
};
|
||||
|
||||
&cpsw_emac1 {
|
||||
phy_id = <&davinci_mdio>, <7>;
|
||||
phy-mode = "rgmii-txid";
|
||||
dual_emac_res_vlan = <2>;
|
||||
};
|
||||
|
||||
&phy_sel {
|
||||
rmii-clock-ext = <1>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
vmmc-supply = <&vmmc_reg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
status = "okay";
|
||||
vmmc-supply = <&wl12xx_vmmc>;
|
||||
ti,non-removable;
|
||||
bus-width = <4>;
|
||||
cap-power-off-card;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
wlcore: wlcore@2 {
|
||||
compatible = "ti,wl1835";
|
||||
reg = <2>;
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&sham {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&aes {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio0 {
|
||||
ti,no-reset-on-init;
|
||||
};
|
||||
|
||||
&dcan1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&dcan1_pins>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -81,6 +81,13 @@
|
|||
>;
|
||||
};
|
||||
|
||||
i2c2_pins: pinmux_i2c2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x178 (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
|
||||
0x17c (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
uart0_pins: pinmux_uart0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
|
|
@ -218,8 +225,67 @@
|
|||
reg = <0x24>;
|
||||
};
|
||||
|
||||
baseboard_eeprom: baseboard_eeprom@50 {
|
||||
compatible = "at,24c256";
|
||||
reg = <0x50>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
baseboard_data: baseboard_data@0 {
|
||||
reg = <0 0x100>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_pins>;
|
||||
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
|
||||
cape_eeprom0: cape_eeprom0@54 {
|
||||
compatible = "at,24c256";
|
||||
reg = <0x54>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cape0_data: cape_data@0 {
|
||||
reg = <0 0x100>;
|
||||
};
|
||||
};
|
||||
|
||||
cape_eeprom1: cape_eeprom1@55 {
|
||||
compatible = "at,24c256";
|
||||
reg = <0x55>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cape1_data: cape_data@0 {
|
||||
reg = <0 0x100>;
|
||||
};
|
||||
};
|
||||
|
||||
cape_eeprom2: cape_eeprom2@56 {
|
||||
compatible = "at,24c256";
|
||||
reg = <0x56>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cape2_data: cape_data@0 {
|
||||
reg = <0 0x100>;
|
||||
};
|
||||
};
|
||||
|
||||
cape_eeprom3: cape_eeprom3@57 {
|
||||
compatible = "at,24c256";
|
||||
reg = <0x57>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cape3_data: cape_data@0 {
|
||||
reg = <0 0x100>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
/include/ "tps65217.dtsi"
|
||||
|
||||
&tps {
|
||||
|
|
|
|||
|
|
@ -8,6 +8,7 @@
|
|||
/dts-v1/;
|
||||
|
||||
#include "am33xx.dtsi"
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
model = "TI AM335x EVM";
|
||||
|
|
@ -38,6 +39,20 @@
|
|||
regulator-boot-on;
|
||||
};
|
||||
|
||||
wlan_en_reg: fixedregulator@2 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "wlan-en-regulator";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
||||
/* WLAN_EN GPIO for this board - Bank1, pin16 */
|
||||
gpio = <&gpio1 16 0>;
|
||||
|
||||
/* WLAN card specific delay */
|
||||
startup-delay-us = <70000>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
matrix_keypad: matrix_keypad@0 {
|
||||
compatible = "gpio-matrix-keypad";
|
||||
debounce-delay-ms = <5>;
|
||||
|
|
@ -176,6 +191,15 @@
|
|||
>;
|
||||
};
|
||||
|
||||
uart1_pins: pinmux_uart1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x178 (PIN_INPUT | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */
|
||||
0x17C (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */
|
||||
0x180 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
|
||||
0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
clkout2_pin: pinmux_clkout2_pin {
|
||||
pinctrl-single,pins = <
|
||||
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
|
||||
|
|
@ -266,6 +290,25 @@
|
|||
>;
|
||||
};
|
||||
|
||||
mmc3_pins: pinmux_mmc3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x44 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a1.mmc2_dat0, INPUT_PULLUP | MODE3 */
|
||||
0x48 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a2.mmc2_dat1, INPUT_PULLUP | MODE3 */
|
||||
0x4C (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a3.mmc2_dat2, INPUT_PULLUP | MODE3 */
|
||||
0x78 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ben1.mmc2_dat3, INPUT_PULLUP | MODE3 */
|
||||
0x88 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_csn3.mmc2_cmd, INPUT_PULLUP | MODE3 */
|
||||
0x8C (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_clk.mmc2_clk, INPUT_PULLUP | MODE3 */
|
||||
>;
|
||||
};
|
||||
|
||||
wlan_pins: pinmux_wlan_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.gpio1_16 */
|
||||
0x19C (PIN_INPUT | MUX_MODE7) /* mcasp0_ahclkr.gpio3_17 */
|
||||
0x1AC (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahclkx.gpio3_21 */
|
||||
>;
|
||||
};
|
||||
|
||||
lcd_pins_s0: lcd_pins_s0 {
|
||||
pinctrl-single,pins = <
|
||||
0x20 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad8.lcd_data23 */
|
||||
|
|
@ -323,6 +366,13 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
|
|
@ -665,6 +715,37 @@
|
|||
cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
/* these are on the crossbar and are outlined in the
|
||||
xbar-event-map element */
|
||||
dmas = <&edma 12
|
||||
&edma 13>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "okay";
|
||||
vmmc-supply = <&wlan_en_reg>;
|
||||
bus-width = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc3_pins &wlan_pins>;
|
||||
ti,non-removable;
|
||||
ti,needs-special-hs-handling;
|
||||
cap-power-off-card;
|
||||
keep-power-in-suspend;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
wlcore: wlcore@0 {
|
||||
compatible = "ti,wl1835";
|
||||
reg = <2>;
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&edma {
|
||||
ti,edma-xbar-event-map = /bits/ 16 <1 12
|
||||
2 13>;
|
||||
};
|
||||
|
||||
&sham {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,482 @@
|
|||
/*
|
||||
* Copyright (C) 2015 Toby Churchill - http://www.toby-churchill.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
#include "am33xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Toby Churchill SL50 Series";
|
||||
compatible = "tcl,am335x-sl50", "ti,am33xx";
|
||||
|
||||
cpus {
|
||||
cpu@0 {
|
||||
cpu0-supply = <&dcdc2_reg>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&led_pins>;
|
||||
|
||||
led@0 {
|
||||
label = "sl50:green:usr0";
|
||||
gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@1 {
|
||||
label = "sl50:red:usr1";
|
||||
gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@2 {
|
||||
label = "sl50:green:usr2";
|
||||
gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@3 {
|
||||
label = "sl50:red:usr3";
|
||||
gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
backlight0: disp0 {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&ehrpwm1 0 500000 0>;
|
||||
brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>;
|
||||
default-brightness-level = <6>;
|
||||
};
|
||||
|
||||
backlight1: disp1 {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&ehrpwm1 1 500000 0>;
|
||||
brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>;
|
||||
default-brightness-level = <6>;
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "ti,da830-evm-audio";
|
||||
ti,model = "AM335x-SL50";
|
||||
ti,audio-codec = <&audio_codec>;
|
||||
ti,mcasp-controller = <&mcasp0>;
|
||||
ti,codec-clock-rate = <12000000>;
|
||||
ti,audio-routing =
|
||||
"Headphone Jack", "HPLOUT",
|
||||
"Headphone Jack", "HPROUT",
|
||||
"LINE1R", "Line In",
|
||||
"LINE1L", "Line In";
|
||||
};
|
||||
|
||||
emmc_pwrseq: pwrseq@0 {
|
||||
compatible = "mmc-pwrseq-emmc";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&emmc_pwrseq_pins>;
|
||||
reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
vmmcsd_fixed: fixedregulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmmcsd_fixed";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
&am33xx_pinmux {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&lwb_pins>;
|
||||
|
||||
led_pins: pinmux_led_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE7) /* gpmc_a5.gpio1_21 */
|
||||
AM33XX_IOPAD(0x858, PIN_OUTPUT | MUX_MODE7) /* gpmc_a6.gpio1_22 */
|
||||
AM33XX_IOPAD(0x85c, PIN_OUTPUT | MUX_MODE7) /* gpmc_a7.gpio1_23 */
|
||||
AM33XX_IOPAD(0x860, PIN_OUTPUT | MUX_MODE7) /* gpmc_a8.gpio1_24 */
|
||||
>;
|
||||
};
|
||||
|
||||
uart0_pins: pinmux_uart0_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart4_pins: pinmux_uart4_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* gpmc_wait0.uart4_rxd */
|
||||
AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* gpmc_wpn.uart4_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c0_pins: pinmux_i2c0_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rxd.i2c1_sda */
|
||||
AM33XX_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_txdi2c1_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c2_pins: pinmux_i2c2_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
|
||||
AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_default: cpsw_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
|
||||
AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
|
||||
AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
|
||||
AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
|
||||
AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
|
||||
AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
|
||||
AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
|
||||
AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
|
||||
AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
|
||||
AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
|
||||
AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
|
||||
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
|
||||
AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_sleep: cpsw_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 reset value */
|
||||
AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_default: davinci_mdio_default {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO */
|
||||
AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_sleep: davinci_mdio_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO reset value */
|
||||
AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
||||
>;
|
||||
};
|
||||
|
||||
emmc_pwrseq_pins: pinmux_emmc_pwrseq_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a4.gpio1_20 */
|
||||
>;
|
||||
};
|
||||
|
||||
emmc_pins: pinmux_emmc_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
|
||||
AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
|
||||
AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
|
||||
AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
|
||||
AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
|
||||
AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
|
||||
AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
|
||||
AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
|
||||
AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
|
||||
AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
|
||||
>;
|
||||
};
|
||||
|
||||
audio_pins: pinmux_audio_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
|
||||
AM33XX_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */
|
||||
AM33XX_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */
|
||||
AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr0.mcasp0_axr0 */
|
||||
AM33XX_IOPAD(0x99c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/
|
||||
>;
|
||||
};
|
||||
|
||||
ehrpwm1_pins: pinmux_ehrpwm1a_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE6) /* gpmc_a2.ehrpwm1a */
|
||||
AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE6) /* gpmc_a3.ehrpwm1b */
|
||||
>;
|
||||
};
|
||||
|
||||
lwb_pins: pinmux_lwb_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x9a4, PIN_OUTPUT | MUX_MODE7) /* SoundPA_en - mcasp0_fsr.gpio3_19 */
|
||||
AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE7) /* nKbdOnC - gpmc_ad10.gpio0_26 */
|
||||
AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE7) /* nKbdInt - gpmc_ad12.gpio1_12 */
|
||||
AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE7) /* nKbdReset - gpmc_ad13.gpio1_13 */
|
||||
AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE7) /* nDispReset - gpmc_ad14.gpio1_14 */
|
||||
AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7) /* USB1_enPower - gpmc_a1.gpio1_17 */
|
||||
/* AVR Programming - SPI Bus (bit bang) - Screen and Keyboard */
|
||||
AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE7) /* Kbd/Disp/BattMOSI spi0_d0.gpio0_3 */
|
||||
AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE7) /* Kbd/Disp/BattMISO spi0_d1.gpio0_4 */
|
||||
AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE7) /* Kbd/Disp/BattSCLK spi0_clk.gpio0_2 */
|
||||
/* PDI Bus - Battery system */
|
||||
AM33XX_IOPAD(0x840, PIN_INPUT_PULLUP | MUX_MODE7) /* nBattReset gpmc_a0.gpio1_16 */
|
||||
AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE7) /* BattPDIData gpmc_ad15.gpio1_15 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
|
||||
clock-frequency = <400000>;
|
||||
|
||||
tps: tps@24 {
|
||||
reg = <0x24>;
|
||||
};
|
||||
|
||||
eeprom: eeprom@50 {
|
||||
compatible = "at,24c256";
|
||||
reg = <0x50>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_pins>;
|
||||
|
||||
clock-frequency = <400000>;
|
||||
|
||||
audio_codec: tlv320aic3106@1b {
|
||||
status = "okay";
|
||||
compatible = "ti,tlv320aic3106";
|
||||
reg = <0x1b>;
|
||||
|
||||
AVDD-supply = <&ldo4_reg>;
|
||||
IOVDD-supply = <&ldo4_reg>;
|
||||
DRVDD-supply = <&ldo4_reg>;
|
||||
DVDD-supply = <&ldo3_reg>;
|
||||
};
|
||||
};
|
||||
|
||||
&usb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_ctrl_mod {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
status = "okay";
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
status = "okay";
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
&cppi41dma {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <&vmmcsd_fixed>;
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&emmc_pins>;
|
||||
bus-width = <8>;
|
||||
vmmc-supply = <&vmmcsd_fixed>;
|
||||
mmc-pwrseq = <&emmc_pwrseq>;
|
||||
};
|
||||
|
||||
&mcasp0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&audio_pins>;
|
||||
|
||||
op-mode = <0>; /* MCASP_ISS_MODE */
|
||||
tdm-slots = <2>;
|
||||
serial-dir = <
|
||||
2 0 1 0
|
||||
0 0 0 0
|
||||
0 0 0 0
|
||||
0 0 0 0
|
||||
>;
|
||||
tx-num-evt = <1>;
|
||||
rx-num-evt = <1>;
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart4_pins>;
|
||||
};
|
||||
|
||||
#include "tps65217.dtsi"
|
||||
|
||||
&tps {
|
||||
ti,pmic-shutdown-controller;
|
||||
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <7>; /* NNMI */
|
||||
|
||||
regulators {
|
||||
dcdc1_reg: regulator@0 {
|
||||
/* VDDS_DDR */
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <925000>;
|
||||
regulator-max-microvolt = <1325000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <925000>;
|
||||
regulator-max-microvolt = <1150000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
/* VRTC / VIO / VDDS*/
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
/* VDD_3V3AUX */
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
/* VDD_1V8 */
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
/* VDD_3V3A */
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cpsw_emac0 {
|
||||
phy_id = <&davinci_mdio>, <0>;
|
||||
phy-mode = "mii";
|
||||
};
|
||||
|
||||
&cpsw_emac1 {
|
||||
phy_id = <&davinci_mdio>, <1>;
|
||||
phy-mode = "mii";
|
||||
};
|
||||
|
||||
&mac {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&cpsw_default>;
|
||||
pinctrl-1 = <&cpsw_sleep>;
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&davinci_mdio_default>;
|
||||
pinctrl-1 = <&davinci_mdio_sleep>;
|
||||
};
|
||||
|
||||
&sham {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&aes {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&epwmss1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ehrpwm1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ehrpwm1_pins>;
|
||||
};
|
||||
|
|
@ -60,6 +60,17 @@
|
|||
dma-names = "tx", "rx";
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
omap3_pmx_core2: pinmux@480025d8 {
|
||||
compatible = "ti,omap3-padconf", "pinctrl-single";
|
||||
reg = <0x480025d8 0x24>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
pinctrl-single,register-width = <16>;
|
||||
pinctrl-single,function-mask = <0xff1f>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@
|
|||
|
||||
aliases {
|
||||
display0 = &lcd0;
|
||||
serial3 = &uart3;
|
||||
};
|
||||
|
||||
vmmcsd_fixed: fixedregulator-sd {
|
||||
|
|
@ -42,6 +43,15 @@
|
|||
gpio = <&gpio5 7 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
vmmcwl_fixed: fixedregulator-mmcwl {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmmcwl_fixed";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
gpio = <&gpio1 20 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
backlight {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
|
||||
|
|
@ -106,9 +116,21 @@
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* fixed 12MHz oscillator */
|
||||
refclk: oscillator {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&am43xx_pinmux {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&wlan_pins_default>;
|
||||
pinctrl-1 = <&wlan_pins_sleep>;
|
||||
|
||||
i2c0_pins: i2c0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
|
|
@ -340,6 +362,53 @@
|
|||
0x204 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data7 mode 0*/
|
||||
>;
|
||||
};
|
||||
|
||||
mmc3_pins_default: pinmux_mmc3_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x8c (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_clk.mmc2_clk */
|
||||
0x88 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_csn3.mmc2_cmd */
|
||||
0x44 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a1.mmc2_dat0 */
|
||||
0x48 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a2.mmc2_dat1 */
|
||||
0x4c (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a3.mmc2_dat2 */
|
||||
0x78 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be1n.mmc2_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc3_pins_sleep: pinmux_mmc3_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x8c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_clk.mmc2_clk */
|
||||
0x88 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn3.mmc2_cmd */
|
||||
0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a1.mmc2_dat0 */
|
||||
0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a2.mmc2_dat1 */
|
||||
0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a3.mmc2_dat2 */
|
||||
0x78 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_be1n.mmc2_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
wlan_pins_default: pinmux_wlan_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a4.gpio1_20 WL_EN */
|
||||
0x5c (PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* gpmc_a7.gpio1_23 WL_IRQ*/
|
||||
0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.gpio1_16 BT_EN*/
|
||||
>;
|
||||
};
|
||||
|
||||
wlan_pins_sleep: pinmux_wlan_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a4.gpio1_20 WL_EN */
|
||||
0x5c (PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* gpmc_a7.gpio1_23 WL_IRQ*/
|
||||
0x40 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a0.gpio1_16 BT_EN*/
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x228 (PIN_INPUT | MUX_MODE0) /* uart3_rxd.uart3_rxd */
|
||||
0x22c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_txd.uart3_txd */
|
||||
0x230 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_ctsn.uart3_ctsn */
|
||||
0x234 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_rtsn.uart3_rtsn */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
|
|
@ -403,6 +472,21 @@
|
|||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
ov2659@30 {
|
||||
compatible = "ovti,ov2659";
|
||||
reg = <0x30>;
|
||||
|
||||
clocks = <&refclk 0>;
|
||||
clock-names = "xvclk";
|
||||
|
||||
port {
|
||||
ov2659_0: endpoint {
|
||||
remote-endpoint = <&vpfe1_ep>;
|
||||
link-frequencies = /bits/ 64 <70000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
|
|
@ -422,6 +506,21 @@
|
|||
touchscreen-size-x = <1024>;
|
||||
touchscreen-size-y = <600>;
|
||||
};
|
||||
|
||||
ov2659@30 {
|
||||
compatible = "ovti,ov2659";
|
||||
reg = <0x30>;
|
||||
|
||||
clocks = <&refclk 0>;
|
||||
clock-names = "xvclk";
|
||||
|
||||
port {
|
||||
ov2659_1: endpoint {
|
||||
remote-endpoint = <&vpfe0_ep>;
|
||||
link-frequencies = /bits/ 64 <70000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&epwmss0 {
|
||||
|
|
@ -446,6 +545,10 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -468,6 +571,43 @@
|
|||
cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
status = "okay";
|
||||
/* these are on the crossbar and are outlined in the
|
||||
xbar-event-map element */
|
||||
dmas = <&edma 30
|
||||
&edma 31>;
|
||||
dma-names = "tx", "rx";
|
||||
vmmc-supply = <&vmmcwl_fixed>;
|
||||
bus-width = <4>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&mmc3_pins_default>;
|
||||
pinctrl-1 = <&mmc3_pins_sleep>;
|
||||
cap-power-off-card;
|
||||
keep-power-in-suspend;
|
||||
ti,non-removable;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
wlcore: wlcore@0 {
|
||||
compatible = "ti,wl1835";
|
||||
reg = <2>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&edma {
|
||||
ti,edma-xbar-event-map = /bits/ 16 <1 30
|
||||
2 31>;
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins>;
|
||||
};
|
||||
|
||||
&usb2_phy1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -625,7 +765,7 @@
|
|||
|
||||
port {
|
||||
vpfe0_ep: endpoint {
|
||||
/* remote-endpoint = <&sensor>; add once we have it */
|
||||
remote-endpoint = <&ov2659_1>;
|
||||
ti,am437x-vpfe-interface = <0>;
|
||||
bus-width = <8>;
|
||||
hsync-active = <0>;
|
||||
|
|
@ -642,7 +782,7 @@
|
|||
|
||||
port {
|
||||
vpfe1_ep: endpoint {
|
||||
/* remote-endpoint = <&sensor>; add once we have it */
|
||||
remote-endpoint = <&ov2659_0>;
|
||||
ti,am437x-vpfe-interface = <0>;
|
||||
bus-width = <8>;
|
||||
hsync-active = <0>;
|
||||
|
|
|
|||
|
|
@ -162,7 +162,7 @@
|
|||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "mx25l25635e";
|
||||
compatible = "mx25l25635e", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,357 @@
|
|||
/*
|
||||
* Device Tree file for D-Link DNS-327L
|
||||
*
|
||||
* Copyright (C) 2015, Andrew Andrianov <andrew@ncrmnt.org>
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of the
|
||||
* License, or (at your option) any later version.
|
||||
*
|
||||
* This file is distributed in the hope that it will be useful
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* Or, alternatively
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/* Remaining unsolved:
|
||||
* There's still some unknown device on i2c address 0x13
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "armada-370.dtsi"
|
||||
|
||||
/ {
|
||||
model = "D-Link DNS-327L";
|
||||
compatible = "dlink,dns327l",
|
||||
"marvell,armada370",
|
||||
"marvell,armada-370-xp";
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart0;
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MiB */
|
||||
};
|
||||
|
||||
soc {
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
|
||||
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
sata@a0000 {
|
||||
nr-ports = <2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb@50000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
nand@d0000 {
|
||||
status = "okay";
|
||||
num-cs = <1>;
|
||||
marvell,nand-keep-config;
|
||||
marvell,nand-enable-arbiter;
|
||||
nand-on-flash-bbt;
|
||||
nand-ecc-strength = <4>;
|
||||
nand-ecc-step-size = <512>;
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
/* 1.0 MiB */
|
||||
reg = <0x0000000 0x100000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
label = "u-boot-env";
|
||||
/* 128 KiB */
|
||||
reg = <0x100000 0x20000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@120000 {
|
||||
label = "uImage";
|
||||
/* 7 MiB */
|
||||
reg = <0x120000 0x700000>;
|
||||
};
|
||||
|
||||
partition@820000 {
|
||||
label = "ubifs";
|
||||
/* ~ 84 MiB */
|
||||
reg = <0x820000 0x54e0000>;
|
||||
};
|
||||
|
||||
/* Hardcoded into stock bootloader */
|
||||
partition@5d00000 {
|
||||
label = "failsafe-uImage";
|
||||
/* 5 MiB */
|
||||
reg = <0x5d00000 0x500000>;
|
||||
};
|
||||
|
||||
partition@6200000 {
|
||||
label = "failsafe-fs";
|
||||
/* 29 MiB */
|
||||
reg = <0x6200000 0x1d00000>;
|
||||
};
|
||||
|
||||
partition@7f00000 {
|
||||
label = "bbt";
|
||||
/* 1 MiB for BBT */
|
||||
reg = <0x7f00000 0x100000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
pinctrl-0 = <
|
||||
&backup_button_pin
|
||||
&power_button_pin
|
||||
&reset_button_pin>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
power-button {
|
||||
label = "Power Button";
|
||||
linux,code = <KEY_POWER>;
|
||||
gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
backup-button {
|
||||
label = "Backup Button";
|
||||
linux,code = <KEY_COPY>;
|
||||
gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
reset-button {
|
||||
label = "Reset Button";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio-leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-0 = <
|
||||
&sata_l_amber_pin
|
||||
&sata_r_amber_pin
|
||||
&backup_led_pin
|
||||
/* Ensure these are managed by hardware */
|
||||
&sata_l_white_pin
|
||||
&sata_r_white_pin>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
|
||||
sata-r-amber-pin {
|
||||
label = "dns327l:amber:sata-r";
|
||||
gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "keep";
|
||||
};
|
||||
|
||||
sata-l-amber-pin {
|
||||
label = "dns327l:amber:sata-l";
|
||||
gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "keep";
|
||||
};
|
||||
|
||||
backup-led-pin {
|
||||
label = "dns327l:white:usb";
|
||||
gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "keep";
|
||||
};
|
||||
};
|
||||
|
||||
regulators {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
usb_power: regulator@1 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <1>;
|
||||
pinctrl-0 = <&xhci_pwr_pin>;
|
||||
pinctrl-names = "default";
|
||||
regulator-name = "USB3.0 Port Power";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
enable-active-high;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
sata_r_power: regulator@2 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <2>;
|
||||
pinctrl-0 = <&sata_r_pwr_pin>;
|
||||
pinctrl-names = "default";
|
||||
regulator-name = "SATA-R Power";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
startup-delay-us = <2000000>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
sata_l_power: regulator@3 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <3>;
|
||||
pinctrl-0 = <&sata_l_pwr_pin>;
|
||||
pinctrl-names = "default";
|
||||
regulator-name = "SATA-L Power";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
startup-delay-us = <4000000>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
sata_l_white_pin: sata-l-white-pin {
|
||||
marvell,pins = "mpp57";
|
||||
marvell,function = "sata0";
|
||||
};
|
||||
|
||||
sata_r_white_pin: sata-r-white-pin {
|
||||
marvell,pins = "mpp55";
|
||||
marvell,function = "sata1";
|
||||
};
|
||||
|
||||
sata_r_amber_pin: sata-r-amber-pin {
|
||||
marvell,pins = "mpp52";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
sata_l_amber_pin: sata-l-amber-pin {
|
||||
marvell,pins = "mpp53";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
backup_led_pin: backup-led-pin {
|
||||
marvell,pins = "mpp61";
|
||||
marvell,function = "gpo";
|
||||
};
|
||||
|
||||
xhci_pwr_pin: xhci-pwr-pin {
|
||||
marvell,pins = "mpp13";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
sata_r_pwr_pin: sata-r-pwr-pin {
|
||||
marvell,pins = "mpp54";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
sata_l_pwr_pin: sata-l-pwr-pin {
|
||||
marvell,pins = "mpp56";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
uart1_pins: uart1-pins {
|
||||
marvell,pins = "mpp60", "mpp61";
|
||||
marvell,function = "uart1";
|
||||
};
|
||||
|
||||
power_button_pin: power-button-pin {
|
||||
marvell,pins = "mpp65";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
backup_button_pin: backup-button-pin {
|
||||
marvell,pins = "mpp63";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
reset_button_pin: reset-button-pin {
|
||||
marvell,pins = "mpp64";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
/* Serial console */
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to Weltrend MCU */
|
||||
&uart1 {
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mdio {
|
||||
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
|
||||
reg = <0>;
|
||||
marvell,reg-init = <0x0 0x16 0x0 0x0002>,
|
||||
<0x0 0x19 0x0 0x0077>,
|
||||
<0x0 0x18 0x0 0x5747>;
|
||||
};
|
||||
};
|
||||
|
||||
ð1 {
|
||||
phy = <&phy0>;
|
||||
phy-mode = "rgmii-id";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
compatible = "marvell,mv64xxx-i2c";
|
||||
clock-frequency = <100000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -92,7 +92,7 @@
|
|||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "micron,n25q064";
|
||||
compatible = "micron,n25q064", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <20000000>;
|
||||
|
||||
|
|
|
|||
|
|
@ -149,7 +149,6 @@
|
|||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
compatible = "marvell,armada-370-spi", "marvell,orion-spi";
|
||||
reg = <0x10600 0x28>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -160,7 +159,6 @@
|
|||
};
|
||||
|
||||
spi1: spi@10680 {
|
||||
compatible = "marvell,armada-370-spi", "marvell,orion-spi";
|
||||
reg = <0x10680 0x28>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
|
|||
|
|
@ -139,11 +139,15 @@
|
|||
* board level if a different configuration is used.
|
||||
*/
|
||||
spi0: spi@10600 {
|
||||
compatible = "marvell,armada-370-spi",
|
||||
"marvell,orion-spi";
|
||||
pinctrl-0 = <&spi0_pins1>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
spi1: spi@10680 {
|
||||
compatible = "marvell,armada-370-spi",
|
||||
"marvell,orion-spi";
|
||||
pinctrl-0 = <&spi1_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -81,7 +81,7 @@
|
|||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "n25q128a13";
|
||||
compatible = "n25q128a13", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <108000000>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -238,7 +238,8 @@
|
|||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
compatible = "marvell,orion-spi";
|
||||
compatible = "marvell,armada-375-spi",
|
||||
"marvell,orion-spi";
|
||||
reg = <0x10600 0x50>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -249,7 +250,8 @@
|
|||
};
|
||||
|
||||
spi1: spi@10680 {
|
||||
compatible = "marvell,orion-spi";
|
||||
compatible = "marvell,armada-375-spi",
|
||||
"marvell,orion-spi";
|
||||
reg = <0x10680 0x50>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
|
|||
|
|
@ -70,7 +70,7 @@
|
|||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "st,m25p128";
|
||||
compatible = "st,m25p128", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <54000000>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,114 @@
|
|||
/*
|
||||
* Device Tree include for the Linksys WRT1200AC (Caiman)
|
||||
*
|
||||
* Copyright (C) 2015 Imre Kaloz <kaloz@openwrt.org>
|
||||
*
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without
|
||||
* any warranty of any kind, whether express or implied.
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "armada-385-linksys.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Linksys WRT1200AC";
|
||||
compatible = "linksys,caiman", "linksys,armada385", "marvell,armada385",
|
||||
"marvell,armada380";
|
||||
|
||||
soc {
|
||||
internal-regs{
|
||||
i2c@11000 {
|
||||
|
||||
pca9635@68 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
wan_amber@0 {
|
||||
label = "caiman:amber:wan";
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
wan_white@1 {
|
||||
label = "caiman:white:wan";
|
||||
reg = <0x1>;
|
||||
};
|
||||
|
||||
wlan_2g@2 {
|
||||
label = "caiman:white:wlan_2g";
|
||||
reg = <0x2>;
|
||||
};
|
||||
|
||||
wlan_5g@3 {
|
||||
label = "caiman:white:wlan_5g";
|
||||
reg = <0x3>;
|
||||
};
|
||||
|
||||
usb2@5 {
|
||||
label = "caiman:white:usb2";
|
||||
reg = <0x5>;
|
||||
};
|
||||
|
||||
usb3_1@6 {
|
||||
label = "caiman:white:usb3_1";
|
||||
reg = <0x6>;
|
||||
};
|
||||
|
||||
usb3_2@7 {
|
||||
label = "caiman:white:usb3_2";
|
||||
reg = <0x7>;
|
||||
};
|
||||
|
||||
wps_white@8 {
|
||||
label = "caiman:white:wps";
|
||||
reg = <0x8>;
|
||||
};
|
||||
|
||||
wps_amber@9 {
|
||||
label = "caiman:amber:wps";
|
||||
reg = <0x9>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio-leds {
|
||||
power {
|
||||
label = "caiman:white:power";
|
||||
};
|
||||
|
||||
sata {
|
||||
label = "caiman:white:sata";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,114 @@
|
|||
/*
|
||||
* Device Tree file for the Linksys WRT1900ACv2 (Cobra)
|
||||
*
|
||||
* Copyright (C) 2015 Imre Kaloz <kaloz@openwrt.org>
|
||||
*
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without
|
||||
* any warranty of any kind, whether express or implied.
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "armada-385-linksys.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Linksys WRT1900ACv2";
|
||||
compatible = "linksys,cobra", "linksys,armada385", "marvell,armada385",
|
||||
"marvell,armada380";
|
||||
|
||||
soc {
|
||||
internal-regs{
|
||||
i2c@11000 {
|
||||
|
||||
pca9635@68 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
wan_amber@0 {
|
||||
label = "cobra:amber:wan";
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
wan_white@1 {
|
||||
label = "cobra:white:wan";
|
||||
reg = <0x1>;
|
||||
};
|
||||
|
||||
wlan_2g@2 {
|
||||
label = "cobra:white:wlan_2g";
|
||||
reg = <0x2>;
|
||||
};
|
||||
|
||||
wlan_5g@3 {
|
||||
label = "cobra:white:wlan_5g";
|
||||
reg = <0x3>;
|
||||
};
|
||||
|
||||
usb2@5 {
|
||||
label = "cobra:white:usb2";
|
||||
reg = <0x5>;
|
||||
};
|
||||
|
||||
usb3_1@6 {
|
||||
label = "cobra:white:usb3_1";
|
||||
reg = <0x6>;
|
||||
};
|
||||
|
||||
usb3_2@7 {
|
||||
label = "cobra:white:usb3_2";
|
||||
reg = <0x7>;
|
||||
};
|
||||
|
||||
wps_white@8 {
|
||||
label = "cobra:white:wps";
|
||||
reg = <0x8>;
|
||||
};
|
||||
|
||||
wps_amber@9 {
|
||||
label = "cobra:amber:wps";
|
||||
reg = <0x9>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio-leds {
|
||||
power {
|
||||
label = "cobra:white:power";
|
||||
};
|
||||
|
||||
sata {
|
||||
label = "cobra:white:sata";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,332 @@
|
|||
/*
|
||||
* Device Tree include file for Armada 385 based Linksys boards
|
||||
*
|
||||
* Copyright (C) 2015 Imre Kaloz <kaloz@openwrt.org>
|
||||
*
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without
|
||||
* any warranty of any kind, whether express or implied.
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include "armada-385.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Linksys boards based on Armada 385";
|
||||
compatible = "linksys,armada385", "marvell,armada385",
|
||||
"marvell,armada380";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
|
||||
soc {
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
|
||||
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
|
||||
|
||||
internal-regs {
|
||||
|
||||
spi@10600 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c@11000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
status = "okay";
|
||||
|
||||
tmp421@4c {
|
||||
compatible = "ti,tmp421";
|
||||
reg = <0x4c>;
|
||||
};
|
||||
|
||||
pca9635@68 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "nxp,pca9635";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
/* J10: VCC, NC, RX, NC, TX, GND */
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
status = "okay";
|
||||
phy-mode = "rgmii-id";
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@34000 {
|
||||
status = "okay";
|
||||
phy-mode = "sgmii";
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
mdio {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sata@a8000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* USB part of the eSATA/USB 2.0 port */
|
||||
usb@50000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb3@f8000 {
|
||||
status = "okay";
|
||||
usb-phy = <&usb3_phy>;
|
||||
};
|
||||
|
||||
flash@d0000 {
|
||||
status = "okay";
|
||||
num-cs = <1>;
|
||||
marvell,nand-keep-config;
|
||||
marvell,nand-enable-arbiter;
|
||||
nand-on-flash-bbt;
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
reg = <0x0000000 0x200000>; /* 2MB */
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
label = "u_env";
|
||||
reg = <0x200000 0x40000>; /* 256KB */
|
||||
};
|
||||
|
||||
partition@140000 {
|
||||
label = "s_env";
|
||||
reg = <0x240000 0x40000>; /* 256KB */
|
||||
};
|
||||
|
||||
partition@900000 {
|
||||
label = "devinfo";
|
||||
reg = <0x900000 0x100000>; /* 1MB */
|
||||
read-only;
|
||||
};
|
||||
|
||||
/* kernel1 overlaps with rootfs1 by design */
|
||||
partition@a00000 {
|
||||
label = "kernel1";
|
||||
reg = <0xa00000 0x2800000>; /* 40MB */
|
||||
};
|
||||
|
||||
partition@1000000 {
|
||||
label = "rootfs1";
|
||||
reg = <0x1000000 0x2200000>; /* 34MB */
|
||||
};
|
||||
|
||||
/* kernel2 overlaps with rootfs2 by design */
|
||||
partition@3200000 {
|
||||
label = "kernel2";
|
||||
reg = <0x3200000 0x2800000>; /* 40MB */
|
||||
};
|
||||
|
||||
partition@3800000 {
|
||||
label = "rootfs2";
|
||||
reg = <0x3800000 0x2200000>; /* 34MB */
|
||||
};
|
||||
|
||||
/*
|
||||
* 38MB, last MB is for the BBT, not writable
|
||||
*/
|
||||
partition@5a00000 {
|
||||
label = "syscfg";
|
||||
reg = <0x5a00000 0x2600000>;
|
||||
};
|
||||
|
||||
/*
|
||||
* Unused area between "s_env" and "devinfo".
|
||||
* Moved here because otherwise the renumbered
|
||||
* partitions would break the bootloader
|
||||
* supplied bootargs
|
||||
*/
|
||||
partition@180000 {
|
||||
label = "unused_area";
|
||||
reg = <0x280000 0x680000>; /* 6.5MB */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
pcie@1,0 {
|
||||
/* Marvell 88W8864, 5GHz-only */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
/* Marvell 88W8864, 2GHz-only */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb3_phy: usb3_phy {
|
||||
compatible = "usb-nop-xceiv";
|
||||
vcc-supply = <®_xhci0_vbus>;
|
||||
};
|
||||
|
||||
reg_xhci0_vbus: xhci0-vbus {
|
||||
compatible = "regulator-fixed";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&xhci0_vbus_pins>;
|
||||
regulator-name = "xhci0-vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
enable-active-high;
|
||||
gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-0 = <&keys_pin>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
button@1 {
|
||||
label = "WPS";
|
||||
linux,code = <KEY_WPS_BUTTON>;
|
||||
gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
button@2 {
|
||||
label = "Factory Reset Button";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio-leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-0 = <&power_led_pin &sata_led_pin>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
power {
|
||||
gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "on";
|
||||
};
|
||||
|
||||
sata {
|
||||
gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
dsa@0 {
|
||||
compatible = "marvell,dsa";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dsa,ethernet = <ð2>;
|
||||
dsa,mii-bus = <&mdio>;
|
||||
|
||||
switch@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x0 0>; /* MDIO address 0, switch 0 in tree */
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan4";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "wan";
|
||||
};
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "cpu";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
keys_pin: keys-pin {
|
||||
marvell,pins = "mpp24", "mpp47";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
power_led_pin: power-led-pin {
|
||||
marvell,pins = "mpp55";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
sata_led_pin: sata-led-pin {
|
||||
marvell,pins = "mpp54";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
xhci0_vbus_pins: xhci0-vbus-pins {
|
||||
marvell,pins = "mpp50";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
|
@ -73,7 +73,7 @@
|
|||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "w25q32";
|
||||
compatible = "w25q32", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <108000000>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -69,7 +69,7 @@
|
|||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "st,m25p128";
|
||||
compatible = "st,m25p128", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <50000000>;
|
||||
m25p,fast-read;
|
||||
|
|
|
|||
|
|
@ -74,7 +74,7 @@
|
|||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "st,m25p128";
|
||||
compatible = "st,m25p128", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <108000000>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -167,7 +167,8 @@
|
|||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
compatible = "marvell,orion-spi";
|
||||
compatible = "marvell,armada-380-spi",
|
||||
"marvell,orion-spi";
|
||||
reg = <0x10600 0x50>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -178,7 +179,8 @@
|
|||
};
|
||||
|
||||
spi1: spi@10680 {
|
||||
compatible = "marvell,orion-spi";
|
||||
compatible = "marvell,armada-380-spi",
|
||||
"marvell,orion-spi";
|
||||
reg = <0x10680 0x50>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -495,7 +497,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
mdio@72004 {
|
||||
mdio: mdio@72004 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "marvell,orion-mdio";
|
||||
|
|
|
|||
|
|
@ -73,7 +73,7 @@
|
|||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "n25q128a13";
|
||||
compatible = "n25q128a13", "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <108000000>;
|
||||
|
||||
|
|
|
|||
|
|
@ -128,7 +128,8 @@
|
|||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
compatible = "marvell,orion-spi";
|
||||
compatible = "marvell,armada-390-spi",
|
||||
"marvell,orion-spi";
|
||||
reg = <0x10600 0x50>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -139,7 +140,8 @@
|
|||
};
|
||||
|
||||
spi1: spi@10680 {
|
||||
compatible = "marvell,orion-spi";
|
||||
compatible = "marvell,armada-390-spi",
|
||||
"marvell,orion-spi";
|
||||
reg = <0x10680 0x50>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
|
|||
|
|
@ -140,7 +140,7 @@
|
|||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "n25q128a13";
|
||||
compatible = "n25q128a13", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <108000000>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -222,7 +222,7 @@
|
|||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "m25p64";
|
||||
compatible = "m25p64", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <20000000>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -227,7 +227,7 @@
|
|||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "n25q128a13";
|
||||
compatible = "n25q128a13", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <108000000>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -114,7 +114,7 @@
|
|||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "micron,n25q064";
|
||||
compatible = "micron,n25q064", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <20000000>;
|
||||
|
||||
|
|
|
|||
|
|
@ -85,10 +85,18 @@
|
|||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
compatible = "marvell,armada-xp-spi",
|
||||
"marvell,orion-spi";
|
||||
pinctrl-0 = <&spi0_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
spi1: spi@10680 {
|
||||
compatible = "marvell,armada-xp-spi",
|
||||
"marvell,orion-spi";
|
||||
};
|
||||
|
||||
|
||||
i2c0: i2c@11000 {
|
||||
compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
|
||||
reg = <0x11000 0x100>;
|
||||
|
|
|
|||
|
|
@ -8,6 +8,12 @@
|
|||
reg = <0xe000e100 0xc00>;
|
||||
};
|
||||
|
||||
systick: timer@e000e010 {
|
||||
compatible = "arm,armv7m-systick";
|
||||
reg = <0xe000e010 0x10>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,79 @@
|
|||
/*
|
||||
* Device Tree file for Arietta G25
|
||||
* This device tree is minimal, to activate more peripherals, see:
|
||||
* http://dts.acmesystems.it/arietta/
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9g25.dtsi"
|
||||
/ {
|
||||
model = "Acme Systems Arietta G25";
|
||||
compatible = "acme,ariettag25", "atmel,at91sam9x5", "atmel,at91sam9";
|
||||
|
||||
aliases {
|
||||
serial0 = &dbgu;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x8000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
main_xtal {
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
mmc0: mmc@f0008000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_mmc0_slot0_clk_cmd_dat0
|
||||
&pinctrl_mmc0_slot0_dat1_3>;
|
||||
status = "okay";
|
||||
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
usb2: gadget@f803c000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
rtc@fffffeb0 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00600000 {
|
||||
status = "okay";
|
||||
num-ports = <3>;
|
||||
};
|
||||
|
||||
usb1: ehci@00700000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
arietta_led {
|
||||
label = "arietta_led";
|
||||
gpios = <&pioB 8 GPIO_ACTIVE_HIGH>; /* PB8 */
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,159 @@
|
|||
/*
|
||||
* at91-kizbox.dts - Device Tree file for Overkiz Kizbox board
|
||||
*
|
||||
* Copyright (C) 2012-2014 Boris BREZILLON <b.brezillon@overkiz.com>
|
||||
* 2014-2015 Gaël PORTAY <g.portay@overkiz.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9g20.dtsi"
|
||||
#include <dt-bindings/pwm/pwm.h>
|
||||
|
||||
/ {
|
||||
model = "Overkiz Kizbox";
|
||||
compatible = "overkiz,kizbox", "atmel,at91sam9g20", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "ubi.mtd=ubi";
|
||||
stdout-path = &dbgu;
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x2000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <18432000>;
|
||||
};
|
||||
|
||||
main_xtal {
|
||||
clock-frequency = <18432000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
macb0: ethernet@fffc4000 {
|
||||
phy-mode = "mii";
|
||||
pinctrl-0 = <&pinctrl_macb_rmii
|
||||
&pinctrl_macb_rmii_mii_alt>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart3: serial@fffd0000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
watchdog@fffffd40 {
|
||||
timeout-sec = <15>;
|
||||
atmel,max-heartbeat-sec = <16>;
|
||||
atmel,min-heartbeat-sec = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00500000 {
|
||||
num-ports = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
status = "okay";
|
||||
|
||||
bootstrap@0 {
|
||||
label = "bootstrap";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
|
||||
ubi@20000 {
|
||||
label = "ubi";
|
||||
reg = <0x20000 0x7fe0000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
reset {
|
||||
label = "PB_RST";
|
||||
gpios = <&pioB 30 GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <0x100>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
user {
|
||||
label = "PB_USER";
|
||||
gpios = <&pioB 31 GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <0x101>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
};
|
||||
|
||||
i2c@0 {
|
||||
status = "okay";
|
||||
|
||||
rtc: pcf8563@51 {
|
||||
compatible = "nxp,pcf8563";
|
||||
reg = <0x51>;
|
||||
};
|
||||
};
|
||||
|
||||
pwm_leds {
|
||||
compatible = "pwm-leds";
|
||||
|
||||
network_green {
|
||||
label = "pwm:green:network";
|
||||
pwms = <&tcb_pwm 2 10000000 PWM_POLARITY_INVERTED>;
|
||||
max-brightness = <255>;
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
|
||||
network_red {
|
||||
label = "pwm:red:network";
|
||||
pwms = <&tcb_pwm 4 10000000 PWM_POLARITY_INVERTED>;
|
||||
max-brightness = <255>;
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
|
||||
user_green {
|
||||
label = "pwm:green:user";
|
||||
pwms = <&tcb_pwm 0 10000000 PWM_POLARITY_INVERTED>;
|
||||
max-brightness = <255>;
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
|
||||
user_red {
|
||||
label = "pwm:red:user";
|
||||
pwms = <&tcb_pwm 1 10000000 PWM_POLARITY_INVERTED>;
|
||||
max-brightness = <255>;
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
};
|
||||
|
||||
tcb_pwm: pwm {
|
||||
compatible = "atmel,tcb-pwm";
|
||||
#pwm-cells = <3>;
|
||||
tc-block = <1>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_tcb1_tioa0
|
||||
&pinctrl_tcb1_tioa1
|
||||
&pinctrl_tcb1_tioa2
|
||||
&pinctrl_tcb1_tiob0>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,216 @@
|
|||
/*
|
||||
* at91-kizbox2.dts - Device Tree file for Overkiz Kizbox 2 board
|
||||
*
|
||||
* Copyright (C) 2014 Gaël PORTAY <g.portay@overkiz.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "sama5d31.dtsi"
|
||||
#include <dt-bindings/pwm/pwm.h>
|
||||
|
||||
/ {
|
||||
model = "Overkiz Kizbox 2";
|
||||
compatible = "overkiz,kizbox2", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
|
||||
|
||||
chosen {
|
||||
bootargs = "ubi.mtd=ubi";
|
||||
stdout-path = &dbgu;
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x10000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
main_xtal {
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
i2c1: i2c@f0018000 {
|
||||
status = "okay";
|
||||
|
||||
pmic: act8865@5b {
|
||||
compatible = "active-semi,act8865";
|
||||
reg = <0x5b>;
|
||||
status = "okay";
|
||||
|
||||
regulators {
|
||||
vcc_1v8_reg: DCDC_REG1 {
|
||||
regulator-name = "VCC_1V8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vcc_1v2_reg: DCDC_REG2 {
|
||||
regulator-name = "VCC_1V2";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vcc_3v3_reg: DCDC_REG3 {
|
||||
regulator-name = "VCC_3V3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vddfuse_reg: LDO_REG1 {
|
||||
regulator-name = "FUSE_2V5";
|
||||
regulator-min-microvolt = <2500000>;
|
||||
regulator-max-microvolt = <2500000>;
|
||||
};
|
||||
|
||||
vddana_reg: LDO_REG2 {
|
||||
regulator-name = "VDDANA";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vled_reg: LDO_REG3 {
|
||||
regulator-name = "VLED";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
v3v8_rf_reg: LDO_REG4 {
|
||||
regulator-name = "V3V8_RF";
|
||||
regulator-min-microvolt = <3800000>;
|
||||
regulator-max-microvolt = <3800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usart0: serial@f001c000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart1: serial@f0020000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pwm0: pwm@f002c000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm0_pwmh0_1
|
||||
&pinctrl_pwm0_pwmh1_1
|
||||
&pinctrl_pwm0_pwmh2_0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
adc0: adc@f8018000 {
|
||||
atmel,adc-vref = <3333>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart2: serial@f8020000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
macb1: ethernet@f802c000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
dbgu: serial@ffffee00 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
watchdog@fffffe40 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
usb1: ohci@00600000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb2: ehci@00700000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
nand0: nand@60000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
atmel,has-pmecc;
|
||||
atmel,pmecc-cap = <4>;
|
||||
atmel,pmecc-sector-size = <512>;
|
||||
nand-on-flash-bbt;
|
||||
status = "okay";
|
||||
|
||||
bootstrap@0 {
|
||||
label = "bootstrap";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
|
||||
ubi@20000 {
|
||||
label = "ubi";
|
||||
reg = <0x20000 0x7fe0000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
prog {
|
||||
label = "PB_PROG";
|
||||
gpios = <&pioE 27 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x102>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
reset {
|
||||
label = "PB_RST";
|
||||
gpios = <&pioE 29 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x100>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
user {
|
||||
label = "PB_USER";
|
||||
gpios = <&pioE 31 GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <0x101>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
};
|
||||
|
||||
pwm_leds {
|
||||
compatible = "pwm-leds";
|
||||
|
||||
blue {
|
||||
label = "pwm:blue:user";
|
||||
pwms = <&pwm0 2 10000000 0>;
|
||||
max-brightness = <255>;
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
|
||||
green {
|
||||
label = "pwm:green:user";
|
||||
pwms = <&pwm0 1 10000000 0>;
|
||||
max-brightness = <255>;
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
|
||||
red {
|
||||
label = "pwm:red:user";
|
||||
pwms = <&pwm0 0 10000000 0>;
|
||||
max-brightness = <255>;
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,129 @@
|
|||
/*
|
||||
* at91-kizboxmini.dts - Device Tree file for Overkiz Kizbox mini board
|
||||
*
|
||||
* Copyright (C) 2014 Gaël PORTAY <g.portay@overkiz.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9g25.dtsi"
|
||||
#include <dt-bindings/pwm/pwm.h>
|
||||
|
||||
/ {
|
||||
model = "Overkiz Kizbox mini";
|
||||
compatible = "overkiz,kizboxmini", "atmel,at91sam9g25", "atmel,at91sam9x5", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "ubi.mtd=ubi";
|
||||
stdout-path = &dbgu;
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x8000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
main_xtal {
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
usart0: serial@f801c000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
macb0: ethernet@f802c000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pwm0: pwm@f8034000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm0_pwm0_1
|
||||
&pinctrl_pwm0_pwm1_1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
watchdog@fffffe40 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00600000 {
|
||||
num-ports = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb1: ehci@00700000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
atmel,has-pmecc;
|
||||
atmel,pmecc-cap = <4>;
|
||||
atmel,pmecc-sector-size = <512>;
|
||||
nand-on-flash-bbt;
|
||||
status = "okay";
|
||||
|
||||
bootstrap@0 {
|
||||
label = "bootstrap";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
|
||||
ubi@20000 {
|
||||
label = "ubi";
|
||||
reg = <0x20000 0x7fe0000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
prog {
|
||||
label = "PB_PROG";
|
||||
gpios = <&pioC 17 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x102>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
reset {
|
||||
label = "PB_RST";
|
||||
gpios = <&pioC 16 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x100>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
};
|
||||
|
||||
pwm_leds {
|
||||
compatible = "pwm-leds";
|
||||
|
||||
green {
|
||||
label = "pwm:green:user";
|
||||
pwms = <&pwm0 0 10000000 0>;
|
||||
max-brightness = <255>;
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
|
||||
red {
|
||||
label = "pwm:red:user";
|
||||
pwms = <&pwm0 1 10000000 0>;
|
||||
max-brightness = <255>;
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -14,7 +14,7 @@
|
|||
compatible = "atmel,sama5d3-xplained", "atmel,sama5d3", "atmel,sama5";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
@ -35,6 +35,8 @@
|
|||
apb {
|
||||
mmc0: mmc@f0000000 {
|
||||
pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7 &pinctrl_mmc0_cd>;
|
||||
vmmc-supply = <&vcc_mmc0_reg>;
|
||||
vqmmc-supply = <&vcc_3v3_reg>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
|
|
@ -43,6 +45,17 @@
|
|||
};
|
||||
};
|
||||
|
||||
mmc1: mmc@f8000000 {
|
||||
vmmc-supply = <&vcc_3v3_reg>;
|
||||
vqmmc-supply = <&vcc_3v3_reg>;
|
||||
status = "disabled";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioE 1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
spi0: spi@f0004000 {
|
||||
cs-gpios = <&pioD 13 0>, <0>, <0>, <&pioD 16 0>;
|
||||
status = "okay";
|
||||
|
|
@ -105,7 +118,13 @@
|
|||
|
||||
macb0: ethernet@f0028000 {
|
||||
phy-mode = "rgmii";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
ethernet-phy@7 {
|
||||
reg = <0x7>;
|
||||
};
|
||||
};
|
||||
|
||||
pwm0: pwm@f002c000 {
|
||||
|
|
@ -215,12 +234,6 @@
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
pmc: pmc@fffffc00 {
|
||||
main: mainck {
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@60000000 {
|
||||
|
|
@ -284,6 +297,14 @@
|
|||
};
|
||||
};
|
||||
|
||||
vcc_mmc0_reg: fixedregulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
gpio = <&pioE 2 GPIO_ACTIVE_LOW>;
|
||||
regulator-name = "mmc0-card-supply";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
|
|
|
|||
|
|
@ -50,7 +50,8 @@
|
|||
compatible = "atmel,sama5d4-xplained", "atmel,sama5d4", "atmel,sama5";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 ignore_loglevel earlyprintk";
|
||||
bootargs = "ignore_loglevel earlyprintk";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
@ -106,6 +107,8 @@
|
|||
mmc1: mmc@fc000000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>;
|
||||
vmmc-supply = <&vcc_mmc1_reg>;
|
||||
vqmmc-supply = <&vcc_3v3_reg>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
|
|
@ -122,6 +125,11 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
spi1: spi@fc018000 {
|
||||
cs-gpios = <&pioB 21 0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
adc0: adc@fc034000 {
|
||||
atmel,adc-vref = <3300>;
|
||||
status = "okay";
|
||||
|
|
@ -238,4 +246,22 @@
|
|||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
|
||||
vcc_3v3_reg: fixedregulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VCC 3V3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vcc_mmc1_reg: fixedregulator@1 {
|
||||
compatible = "regulator-fixed";
|
||||
gpio = <&pioE 4 GPIO_ACTIVE_LOW>;
|
||||
regulator-name = "VDD MCI1";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vcc_3v3_reg>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -50,7 +50,8 @@
|
|||
compatible = "atmel,sama5d4ek", "atmel,sama5d4", "atmel,sama5";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 ignore_loglevel earlyprintk";
|
||||
bootargs = "ignore_loglevel earlyprintk";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
@ -108,8 +109,8 @@
|
|||
mmc0: mmc@f8000000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
|
||||
slot@1 {
|
||||
reg = <1>;
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioE 5 0>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -940,8 +940,8 @@
|
|||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00300000 0x100000>;
|
||||
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&usb>, <&ohci_clk>, <&ohci_clk>, <&uhpck>;
|
||||
clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
|
||||
clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>;
|
||||
clock-names = "ohci_clk", "hclk", "uhpck";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -12,6 +12,10 @@
|
|||
model = "Atmel AT91RM9200 evaluation kit";
|
||||
compatible = "atmel,at91rm9200ek", "atmel,at91rm9200";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x4000000>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1008,8 +1008,8 @@
|
|||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00500000 0x100000>;
|
||||
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&usb>, <&ohci_clk>, <&ohci_clk>, <&uhpck>;
|
||||
clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
|
||||
clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>;
|
||||
clock-names = "ohci_clk", "hclk", "uhpck";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -75,8 +75,8 @@
|
|||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00500000 0x100000>;
|
||||
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&usb>, <&ohci_clk>, <&hclk0>, <&uhpck>;
|
||||
clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
|
||||
clocks = <&ohci_clk>, <&hclk0>, <&uhpck>;
|
||||
clock-names = "ohci_clk", "hclk", "uhpck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -13,7 +13,8 @@
|
|||
compatible = "atmel,at91sam9261ek", "atmel,at91sam9261", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 rootfstype=ubifs ubi.mtd=5 root=ubi0:rootfs rw";
|
||||
bootargs = "rootfstype=ubifs ubi.mtd=5 root=ubi0:rootfs rw";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
|||
|
|
@ -1010,8 +1010,8 @@
|
|||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00a00000 0x100000>;
|
||||
interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&usb>, <&ohci_clk>, <&ohci_clk>, <&uhpck>;
|
||||
clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
|
||||
clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>;
|
||||
clock-names = "ohci_clk", "hclk", "uhpck";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -13,7 +13,8 @@
|
|||
compatible = "atmel,at91sam9263ek", "atmel,at91sam9263", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";
|
||||
bootargs = "mem=64M root=/dev/mtdblock5 rw rootfstype=ubifs";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
|||
|
|
@ -10,7 +10,8 @@
|
|||
/ {
|
||||
|
||||
chosen {
|
||||
bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";
|
||||
bootargs = "mem=64M root=/dev/mtdblock5 rw rootfstype=ubifs";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
|||
|
|
@ -1291,8 +1291,8 @@
|
|||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00700000 0x100000>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
|
||||
clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
|
||||
clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
|
||||
clock-names = "ohci_clk", "hclk", "uhpck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -1300,8 +1300,8 @@
|
|||
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
|
||||
reg = <0x00800000 0x100000>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&utmi>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
|
||||
clock-names = "usb_clk", "ehci_clk", "hclk", "uhpck";
|
||||
clocks = <&utmi>, <&uhphs_clk>;
|
||||
clock-names = "usb_clk", "ehci_clk";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -15,7 +15,8 @@
|
|||
compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2";
|
||||
bootargs = "mem=64M root=/dev/mtdblock1 rw rootfstype=jffs2";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
|||
|
|
@ -949,9 +949,8 @@
|
|||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00500000 0x00100000>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>,
|
||||
<&uhpck>;
|
||||
clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
|
||||
clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
|
||||
clock-names = "ohci_clk", "hclk", "uhpck";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -14,7 +14,8 @@
|
|||
compatible = "atmel,at91sam9n12ek", "atmel,at91sam9n12", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2";
|
||||
bootargs = "root=/dev/mtdblock1 rw rootfstype=jffs2";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
|
|||
|
|
@ -1065,13 +1065,6 @@
|
|||
};
|
||||
};
|
||||
|
||||
rtc@fffffeb0 {
|
||||
compatible = "atmel,at91rm9200-rtc";
|
||||
reg = <0xfffffeb0 0x40>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
rtc@fffffd20 {
|
||||
compatible = "atmel,at91sam9260-rtt";
|
||||
reg = <0xfffffd20 0x10>;
|
||||
|
|
@ -1085,6 +1078,14 @@
|
|||
reg = <0xfffffd60 0x10>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
rtc@fffffe00 {
|
||||
compatible = "atmel,at91rm9200-rtc";
|
||||
reg = <0xfffffe00 0x40>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -13,7 +13,8 @@
|
|||
compatible = "atmel,at91sam9rlek", "atmel,at91sam9rl", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 rootfstype=ubifs root=ubi0:rootfs ubi.mtd=5 rw";
|
||||
bootargs = "rootfstype=ubifs root=ubi0:rootfs ubi.mtd=5 rw";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
|
|
@ -181,13 +182,11 @@
|
|||
};
|
||||
};
|
||||
|
||||
pmc: pmc@fffffc00 {
|
||||
main: mainck {
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
watchdog@fffffd40 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
watchdog@fffffd40 {
|
||||
rtc@fffffe00 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -505,7 +505,7 @@
|
|||
|
||||
pinctrl_usart1_sck: usart1_sck-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
|
||||
<AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -694,6 +694,52 @@
|
|||
};
|
||||
};
|
||||
|
||||
pwm0 {
|
||||
pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 18 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 19 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 20 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 21 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
tcb0 {
|
||||
pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
|
||||
atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
|
|
@ -1176,8 +1222,8 @@
|
|||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00600000 0x100000>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
|
||||
clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
|
||||
clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
|
||||
clock-names = "ohci_clk", "hclk", "uhpck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -1185,8 +1231,8 @@
|
|||
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
|
||||
reg = <0x00700000 0x100000>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&utmi>, <&uhphs_clk>, <&uhpck>;
|
||||
clock-names = "usb_clk", "ehci_clk", "uhpck";
|
||||
clocks = <&utmi>, <&uhphs_clk>;
|
||||
clock-names = "usb_clk", "ehci_clk";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -13,7 +13,8 @@
|
|||
compatible = "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
|
||||
bootargs = "root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
ahb {
|
||||
|
|
|
|||
|
|
@ -18,11 +18,6 @@
|
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public
|
||||
* License along with this file; if not, write to the Free
|
||||
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
|
|
|
|||
|
|
@ -212,6 +212,18 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
nand: nand@18046000 {
|
||||
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
|
||||
reg = <0x18046000 0x600>, <0xf8105408 0x600>, <0x18046f00 0x20>;
|
||||
reg-names = "nand", "iproc-idm", "iproc-ext";
|
||||
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
brcm,nand-has-wp;
|
||||
};
|
||||
|
||||
gic: interrupt-controller@19021000 {
|
||||
compatible = "arm,cortex-a9-gic";
|
||||
#interrupt-cells = <3>;
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/dts-v1/;
|
||||
/include/ "bcm2835-rpi.dtsi"
|
||||
#include "bcm2835-rpi.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "raspberrypi,model-b-plus", "brcm,bcm2835";
|
||||
|
|
@ -25,6 +25,6 @@
|
|||
/* I2S interface */
|
||||
i2s_alt0: i2s_alt0 {
|
||||
brcm,pins = <18 19 20 21>;
|
||||
brcm,function = <4>; /* alt0 */
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/dts-v1/;
|
||||
/include/ "bcm2835-rpi.dtsi"
|
||||
#include "bcm2835-rpi.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "raspberrypi,model-b", "brcm,bcm2835";
|
||||
|
|
@ -18,6 +18,6 @@
|
|||
/* I2S interface */
|
||||
i2s_alt2: i2s_alt2 {
|
||||
brcm,pins = <28 29 30 31>;
|
||||
brcm,function = <6>; /* alt2 */
|
||||
brcm,function = <BCM2835_FSEL_ALT2>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/include/ "bcm2835.dtsi"
|
||||
#include "bcm2835.dtsi"
|
||||
|
||||
/ {
|
||||
memory {
|
||||
|
|
@ -21,17 +21,17 @@
|
|||
|
||||
gpioout: gpioout {
|
||||
brcm,pins = <6>;
|
||||
brcm,function = <1>; /* GPIO out */
|
||||
brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
||||
};
|
||||
|
||||
alt0: alt0 {
|
||||
brcm,pins = <0 1 2 3 4 5 7 8 9 10 11 14 15 40 45>;
|
||||
brcm,function = <4>; /* alt0 */
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
|
||||
alt3: alt3 {
|
||||
brcm,pins = <48 49 50 51 52 53>;
|
||||
brcm,function = <7>; /* alt3 */
|
||||
brcm,function = <BCM2835_FSEL_ALT3>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,5 @@
|
|||
/include/ "skeleton.dtsi"
|
||||
#include <dt-bindings/pinctrl/bcm2835.h>
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "brcm,bcm2835";
|
||||
|
|
@ -14,6 +15,7 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x7e000000 0x20000000 0x02000000>;
|
||||
dma-ranges = <0x40000000 0x00000000 0x20000000>;
|
||||
|
||||
timer@7e003000 {
|
||||
compatible = "brcm,bcm2835-system-timer";
|
||||
|
|
@ -60,6 +62,13 @@
|
|||
reg = <0x7e104000 0x10>;
|
||||
};
|
||||
|
||||
mailbox: mailbox@7e00b800 {
|
||||
compatible = "brcm,bcm2835-mbox";
|
||||
reg = <0x7e00b880 0x40>;
|
||||
interrupts = <0 1>;
|
||||
#mbox-cells = <0>;
|
||||
};
|
||||
|
||||
gpio: gpio@7e200000 {
|
||||
compatible = "brcm,bcm2835-gpio";
|
||||
reg = <0x7e200000 0xb4>;
|
||||
|
|
@ -112,7 +121,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@20205000 {
|
||||
i2c0: i2c@7e205000 {
|
||||
compatible = "brcm,bcm2835-i2c";
|
||||
reg = <0x7e205000 0x1000>;
|
||||
interrupts = <2 21>;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,97 @@
|
|||
/*
|
||||
* Broadcom BCM470X / BCM5301X ARM platform code.
|
||||
* DTS for Asus RT-AC56U
|
||||
*
|
||||
* Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com>
|
||||
*
|
||||
* Licensed under the GNU/GPL. See COPYING for details.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "bcm4708.dtsi"
|
||||
#include "bcm5301x-nand-cs0-bch8.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "asus,rt-ac56u", "brcm,bcm4708";
|
||||
model = "Asus RT-AC56U (BCM4708)";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x00000000 0x08000000>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
usb3 {
|
||||
label = "bcm53xx:blue:usb3";
|
||||
gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
wan {
|
||||
label = "bcm53xx:blue:wan";
|
||||
gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
lan {
|
||||
label = "bcm53xx:blue:lan";
|
||||
gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
power {
|
||||
label = "bcm53xx:blue:power";
|
||||
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
|
||||
all {
|
||||
label = "bcm53xx:blue:all";
|
||||
gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
|
||||
2ghz {
|
||||
label = "bcm53xx:blue:2ghz";
|
||||
gpios = <&chipcommon 6 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
|
||||
usb2 {
|
||||
label = "bcm53xx:blue:usb2";
|
||||
gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
rfkill {
|
||||
label = "WiFi";
|
||||
linux,code = <KEY_RFKILL>;
|
||||
gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
restart {
|
||||
label = "Reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
wps {
|
||||
label = "WPS";
|
||||
linux,code = <KEY_WPS_BUTTON>;
|
||||
gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,84 @@
|
|||
/*
|
||||
* Broadcom BCM470X / BCM5301X ARM platform code.
|
||||
* DTS for Asus RT-AC68U
|
||||
*
|
||||
* Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com>
|
||||
*
|
||||
* Licensed under the GNU/GPL. See COPYING for details.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "bcm4708.dtsi"
|
||||
#include "bcm5301x-nand-cs0-bch8.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "asus,rt-ac68u", "brcm,bcm4708";
|
||||
model = "Asus RT-AC68U (BCM4708)";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x00000000 0x08000000>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
usb2 {
|
||||
label = "bcm53xx:blue:usb2";
|
||||
gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
power {
|
||||
label = "bcm53xx:blue:power";
|
||||
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
|
||||
logo {
|
||||
label = "bcm53xx:white:logo";
|
||||
gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
|
||||
usb3 {
|
||||
label = "bcm53xx:blue:usb3";
|
||||
gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
brightness {
|
||||
label = "Backlight";
|
||||
linux,code = <KEY_BRIGHTNESS_ZERO>;
|
||||
gpios = <&chipcommon 5 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
wps {
|
||||
label = "WPS";
|
||||
linux,code = <KEY_WPS_BUTTON>;
|
||||
gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
restart {
|
||||
label = "Reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
rfkill {
|
||||
label = "WiFi";
|
||||
linux,code = <KEY_RFKILL>;
|
||||
gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -10,6 +10,7 @@
|
|||
/dts-v1/;
|
||||
|
||||
#include "bcm4708.dtsi"
|
||||
#include "bcm5301x-nand-cs0-bch8.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "buffalo,wzr-1750dhp", "brcm,bcm4708";
|
||||
|
|
@ -47,6 +48,12 @@
|
|||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
usb {
|
||||
label = "bcm53xx:blue:usb";
|
||||
gpios = <&hc595 0 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
power0 {
|
||||
label = "bcm53xx:red:power";
|
||||
gpios = <&hc595 1 GPIO_ACTIVE_HIGH>;
|
||||
|
|
|
|||
|
|
@ -10,6 +10,7 @@
|
|||
/dts-v1/;
|
||||
|
||||
#include "bcm4708.dtsi"
|
||||
#include "bcm5301x-nand-cs0-bch8.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "luxul,xwc-1000", "brcm,bcm4708";
|
||||
|
|
@ -23,12 +24,8 @@
|
|||
reg = <0x00000000 0x08000000>;
|
||||
};
|
||||
|
||||
axi@18000000 {
|
||||
nand@28000 {
|
||||
reg = <0x00028000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
nand: nand@18028000 {
|
||||
nandcs@0 {
|
||||
partition@0 {
|
||||
label = "ubi";
|
||||
reg = <0x00000000 0x08000000>;
|
||||
|
|
|
|||
|
|
@ -10,6 +10,7 @@
|
|||
/dts-v1/;
|
||||
|
||||
#include "bcm4708.dtsi"
|
||||
#include "bcm5301x-nand-cs0-bch8.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "netgear,r6250v1", "brcm,bcm4708";
|
||||
|
|
|
|||
|
|
@ -10,6 +10,7 @@
|
|||
/dts-v1/;
|
||||
|
||||
#include "bcm4708.dtsi"
|
||||
#include "bcm5301x-nand-cs0-bch8.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "netgear,r6300v2", "brcm,bcm4708";
|
||||
|
|
|
|||
|
|
@ -0,0 +1,120 @@
|
|||
/*
|
||||
* Broadcom BCM470X / BCM5301X arm platform code.
|
||||
* DTS for SmartRG SR400ac
|
||||
*
|
||||
* Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com>
|
||||
*
|
||||
* Licensed under the GNU/GPL. See COPYING for details.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "bcm4708.dtsi"
|
||||
#include "bcm5301x-nand-cs0-bch8.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "smartrg,sr400ac", "brcm,bcm4708";
|
||||
model = "SmartRG SR400ac";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x00000000 0x08000000>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
power-white {
|
||||
label = "bcm53xx:white:power";
|
||||
gpios = <&chipcommon 1 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
|
||||
power-amber {
|
||||
label = "bcm53xx:amber:power";
|
||||
gpios = <&chipcommon 2 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
usb2 {
|
||||
label = "bcm53xx:white:usb2";
|
||||
gpios = <&chipcommon 3 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
usb3-white {
|
||||
label = "bcm53xx:white:usb3";
|
||||
gpios = <&chipcommon 4 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
usb3-green {
|
||||
label = "bcm53xx:green:usb3";
|
||||
gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
wps {
|
||||
label = "bcm53xx:white:wps";
|
||||
gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
status-red {
|
||||
label = "bcm53xx:red:status";
|
||||
gpios = <&chipcommon 8 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
status-green {
|
||||
label = "bcm53xx:green:status";
|
||||
gpios = <&chipcommon 9 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
status-blue {
|
||||
label = "bcm53xx:blue:status";
|
||||
gpios = <&chipcommon 10 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
wan-white {
|
||||
label = "bcm53xx:white:wan";
|
||||
gpios = <&chipcommon 12 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
wan-red {
|
||||
label = "bcm53xx:red:wan";
|
||||
gpios = <&chipcommon 13 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
rfkill {
|
||||
label = "WiFi";
|
||||
linux,code = <KEY_RFKILL>;
|
||||
gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
wps {
|
||||
label = "WPS";
|
||||
linux,code = <KEY_WPS_BUTTON>;
|
||||
gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
restart {
|
||||
label = "Reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -10,6 +10,7 @@
|
|||
/dts-v1/;
|
||||
|
||||
#include "bcm47081.dtsi"
|
||||
#include "bcm5301x-nand-cs0-bch8.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "asus,rt-n18u", "brcm,bcm47081", "brcm,bcm4708";
|
||||
|
|
|
|||
|
|
@ -10,6 +10,7 @@
|
|||
/dts-v1/;
|
||||
|
||||
#include "bcm47081.dtsi"
|
||||
#include "bcm5301x-nand-cs0-bch8.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "buffalo,wzr-600dhp2", "brcm,bcm47081", "brcm,bcm4708";
|
||||
|
|
|
|||
|
|
@ -10,6 +10,7 @@
|
|||
/dts-v1/;
|
||||
|
||||
#include "bcm47081.dtsi"
|
||||
#include "bcm5301x-nand-cs0-bch8.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "buffalo,wzr-900dhp", "brcm,bcm47081", "brcm,bcm4708";
|
||||
|
|
|
|||
|
|
@ -0,0 +1,65 @@
|
|||
/*
|
||||
* Broadcom BCM470X / BCM5301X ARM platform code.
|
||||
* DTS for Asus RT-AC87U
|
||||
*
|
||||
* Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com>
|
||||
*
|
||||
* Licensed under the GNU/GPL. See COPYING for details.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "bcm4708.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "asus,rt-ac87u", "brcm,bcm4709", "brcm,bcm4708";
|
||||
model = "Asus RT-AC87U";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x00000000 0x08000000>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
wps {
|
||||
label = "bcm53xx:blue:wps";
|
||||
gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
power {
|
||||
label = "bcm53xx:blue:power";
|
||||
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
|
||||
wan {
|
||||
label = "bcm53xx:red:wan";
|
||||
gpios = <&chipcommon 5 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
wps {
|
||||
label = "WPS";
|
||||
linux,code = <KEY_WPS_BUTTON>;
|
||||
gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
restart {
|
||||
label = "Reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,128 @@
|
|||
/*
|
||||
* Broadcom BCM470X / BCM5301X ARM platform code.
|
||||
* DTS for Buffalo WXR-1900DHP
|
||||
*
|
||||
* Copyright (C) 2015 Felix Fietkau <nbd@openwrt.org>
|
||||
*
|
||||
* Licensed under the GNU/GPL. See COPYING for details.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "bcm4708.dtsi"
|
||||
#include "bcm5301x-nand-cs0-bch8.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "buffalo,wxr-1900dhp", "brcm,bcm4709", "brcm,bcm4708";
|
||||
model = "Buffalo WXR-1900DHP";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x00000000 0x08000000>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
usb {
|
||||
label = "bcm53xx:green:usb";
|
||||
gpios = <&chipcommon 4 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
power-amber {
|
||||
label = "bcm53xx:amber:power";
|
||||
gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
power-white {
|
||||
label = "bcm53xx:white:power";
|
||||
gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
|
||||
router-amber {
|
||||
label = "bcm53xx:amber:router";
|
||||
gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
router-white {
|
||||
label = "bcm53xx:white:router";
|
||||
gpios = <&chipcommon 8 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
wan-amber {
|
||||
label = "bcm53xx:amber:wan";
|
||||
gpios = <&chipcommon 9 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
wan-white {
|
||||
label = "bcm53xx:white:wan";
|
||||
gpios = <&chipcommon 10 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
wireless-amber {
|
||||
label = "bcm53xx:amber:wireless";
|
||||
gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
|
||||
wireless-white {
|
||||
label = "bcm53xx:white:wireless";
|
||||
gpios = <&chipcommon 12 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-off";
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
power {
|
||||
label = "Power";
|
||||
linux,code = <KEY_POWER>;
|
||||
gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
restart {
|
||||
label = "Reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
aoss {
|
||||
label = "AOSS";
|
||||
linux,code = <KEY_WPS_BUTTON>;
|
||||
gpios = <&chipcommon 16 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
/* Commit mode set by switch? */
|
||||
mode {
|
||||
label = "Mode";
|
||||
linux,code = <KEY_SETUP>;
|
||||
gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
/* Switch: AP mode */
|
||||
sw_ap {
|
||||
label = "AP";
|
||||
linux,code = <BTN_0>;
|
||||
gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
eject {
|
||||
label = "USB eject";
|
||||
linux,code = <KEY_EJECTCD>;
|
||||
gpios = <&chipcommon 20 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -10,6 +10,7 @@
|
|||
/dts-v1/;
|
||||
|
||||
#include "bcm4708.dtsi"
|
||||
#include "bcm5301x-nand-cs0-bch8.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "netgear,r8000", "brcm,bcm4709", "brcm,bcm4708";
|
||||
|
|
|
|||
|
|
@ -0,0 +1,24 @@
|
|||
/*
|
||||
* Broadcom BCM470X / BCM5301X Nand chip defaults.
|
||||
*
|
||||
* This should be included if the NAND controller is on chip select 0
|
||||
* and uses 8 bit ECC.
|
||||
*
|
||||
* Copyright (C) 2015 Hauke Mehrtens <hauke@hauke-m.de>
|
||||
*
|
||||
* Licensed under the GNU/GPL. See COPYING for details.
|
||||
*/
|
||||
|
||||
/ {
|
||||
nand@18028000 {
|
||||
nandcs@0 {
|
||||
compatible = "brcm,nandcs";
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
nand-ecc-strength = <8>;
|
||||
nand-ecc-step-size = <512>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -108,6 +108,30 @@
|
|||
/* ChipCommon */
|
||||
<0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
||||
/* PCIe Controller 0 */
|
||||
<0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
||||
/* PCIe Controller 1 */
|
||||
<0x00013000 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00013000 1 &gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00013000 2 &gic GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00013000 3 &gic GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00013000 4 &gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00013000 5 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
||||
/* PCIe Controller 2 */
|
||||
<0x00014000 0 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00014000 1 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00014000 2 &gic GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00014000 3 &gic GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00014000 4 &gic GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00014000 5 &gic GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
||||
/* USB 2.0 Controller */
|
||||
<0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
||||
|
|
@ -143,4 +167,16 @@
|
|||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
nand: nand@18028000 {
|
||||
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
|
||||
reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;
|
||||
reg-names = "nand", "iproc-idm", "iproc-ext";
|
||||
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
brcm,nand-has-wp;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -26,6 +26,7 @@
|
|||
compatible = "arm,cortex-a9";
|
||||
next-level-cache = <&L2>;
|
||||
reg = <0>;
|
||||
enable-method = "brcm,bcm63138";
|
||||
};
|
||||
|
||||
cpu@1 {
|
||||
|
|
@ -33,6 +34,8 @@
|
|||
compatible = "arm,cortex-a9";
|
||||
next-level-cache = <&L2>;
|
||||
reg = <1>;
|
||||
enable-method = "brcm,bcm63138";
|
||||
resets = <&pmb0 4 1>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -105,6 +108,18 @@
|
|||
reg = <0x1e620 0x20>;
|
||||
interrupts = <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
pmb0: reset-controller@4800c0 {
|
||||
compatible = "brcm,bcm63138-pmb";
|
||||
reg = <0x4800c0 0x10>;
|
||||
#reset-cells = <2>;
|
||||
};
|
||||
|
||||
pmb1: reset-controller@4800e0 {
|
||||
compatible = "brcm,bcm63138-pmb";
|
||||
reg = <0x4800e0 0x10>;
|
||||
#reset-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
/* Legacy UBUS base */
|
||||
|
|
@ -114,6 +129,11 @@
|
|||
#size-cells = <1>;
|
||||
ranges = <0 0xfffe8000 0x8100>;
|
||||
|
||||
timer: timer@80 {
|
||||
compatible = "brcm,bcm6328-timer", "syscon";
|
||||
reg = <0x80 0x3c>;
|
||||
};
|
||||
|
||||
serial0: serial@600 {
|
||||
compatible = "brcm,bcm6345-uart";
|
||||
reg = <0x600 0x1b>;
|
||||
|
|
@ -131,5 +151,28 @@
|
|||
clock-names = "periph";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
nand: nand@2000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.0", "brcm,brcmnand";
|
||||
reg = <0x2000 0x600>, <0xf0 0x10>;
|
||||
reg-names = "nand", "nand-int-base";
|
||||
status = "disabled";
|
||||
interrupts = <GIC_SPI 38 0>;
|
||||
interrupt-names = "nand";
|
||||
};
|
||||
|
||||
bootlut: bootlut@8000 {
|
||||
compatible = "brcm,bcm63138-bootlut";
|
||||
reg = <0x8000 0x50>;
|
||||
};
|
||||
|
||||
reboot {
|
||||
compatible = "syscon-reboot";
|
||||
regmap = <&timer>;
|
||||
offset = <0x34>;
|
||||
mask = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -12,3 +12,26 @@
|
|||
<0x00 0x80000000 0x00 0x40000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&nand {
|
||||
status = "okay";
|
||||
|
||||
nandcs@1 {
|
||||
compatible = "brcm,nandcs";
|
||||
reg = <1>;
|
||||
nand-ecc-step-size = <512>;
|
||||
nand-ecc-strength = <8>;
|
||||
nand-on-flash-bbt;
|
||||
|
||||
#size-cells = <2>;
|
||||
#address-cells = <2>;
|
||||
|
||||
flash1.rootfs0@0 {
|
||||
reg = <0x0 0x0 0x0 0x80000000>;
|
||||
};
|
||||
|
||||
flash1.rootfs1@80000000 {
|
||||
reg = <0x0 0x80000000 0x0 0x80000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -108,6 +108,65 @@
|
|||
brcm,int-map-mask = <0x25c>, <0x7000000>;
|
||||
brcm,int-fwd-mask = <0x70000>;
|
||||
};
|
||||
|
||||
hif_intr2_intc: interrupt-controller@3e1000 {
|
||||
compatible = "brcm,l2-intc";
|
||||
reg = <0x3e1000 0x30>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupts = <GIC_SPI 0x20 0x0>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupt-names = "hif";
|
||||
};
|
||||
|
||||
nand: nand@3e2800 {
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "brcm,brcmnand-v7.1", "brcm,brcmnand";
|
||||
reg-names = "nand", "flash-dma";
|
||||
reg = <0x3e2800 0x600>, <0x3e3000 0x2c>;
|
||||
interrupt-parent = <&hif_intr2_intc>;
|
||||
interrupts = <24>, <4>;
|
||||
interrupt-names = "nand_ctlrdy", "flash_dma_done";
|
||||
};
|
||||
|
||||
sata@45a000 {
|
||||
compatible = "brcm,bcm7445-ahci", "brcm,sata3-ahci";
|
||||
reg-names = "ahci", "top-ctrl";
|
||||
reg = <0x45a000 0xa9c>, <0x458040 0x24>;
|
||||
interrupts = <GIC_SPI 30 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
sata0: sata-port@0 {
|
||||
reg = <0>;
|
||||
phys = <&sata_phy0>;
|
||||
};
|
||||
|
||||
sata1: sata-port@1 {
|
||||
reg = <1>;
|
||||
phys = <&sata_phy1>;
|
||||
};
|
||||
};
|
||||
|
||||
sata_phy: sata-phy@458100 {
|
||||
compatible = "brcm,bcm7445-sata-phy", "brcm,phy-sata3";
|
||||
reg = <0x458100 0x1f00>;
|
||||
reg-names = "phy";
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
|
||||
sata_phy0: sata-phy@0 {
|
||||
reg = <0>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
sata_phy1: sata-phy@1 {
|
||||
reg = <1>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
smpboot {
|
||||
|
|
|
|||
|
|
@ -58,4 +58,20 @@
|
|||
uart3: serial@18023000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
nand: nand@18046000 {
|
||||
nandcs@1 {
|
||||
compatible = "brcm,nandcs";
|
||||
reg = <0>;
|
||||
nand-on-flash-bbt;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
nand-ecc-strength = <24>;
|
||||
nand-ecc-step-size = <1024>;
|
||||
|
||||
brcm,nand-oob-sector-size = <27>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -28,3 +28,15 @@
|
|||
&serial1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&nand {
|
||||
status = "okay";
|
||||
|
||||
nandcs@0 {
|
||||
compatible = "brcm,nandcs";
|
||||
reg = <0>;
|
||||
nand-ecc-strength = <4>;
|
||||
nand-ecc-step-size = <512>;
|
||||
brcm,nand-oob-sectors-size = <16>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue