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drm/i915/gen9: Implement WaDisableSDEUnitClockGating 

v2: Add stepping check for WaDisableSDEUnitClockGating.

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
[danvet: Rebase.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
hifive-unleashed-5.1
Hoath, Nicholas 2015-02-05 10:47:21 +00:00 committed by Daniel Vetter
parent 8424171e13
commit 3dcd020a8e
1 changed files with 8 additions and 6 deletions
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14
drivers/gpu/drm/i915/intel_pm.c
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@ -56,12 +56,14 @@ static void gen9_init_clock_gating(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
/*
* WaDisableSDEUnitClockGating:skl
* This seems to be a pre-production w/a.
*/
I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
if (INTEL_REVID(dev) == SKL_REVID_A0) {
/*
* WaDisableSDEUnitClockGating:skl
* This seems to be a pre-production w/a.
*/
I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
}
/* Wa4x4STCOptimizationDisable:skl */
I915_WRITE(CACHE_MODE_1,