drm/i915/chv: Remove pre-production workarounds
-WaDisableDopClockGating:chv -WaDisableSamplerPowerBypass:chv -WaDisableGunitClockGating:chv -WaDisableFfDopClockGating:chv -WaDisableDopClockGating:chv v2: Remove pre-production WA instead of restricting them based on revision id (Ville) For: VIZ-4090 Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -6958,18 +6958,6 @@ static void cherryview_init_clock_gating(struct drm_device *dev)
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/* WaDisableSDEUnitClockGating:chv */
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/* WaDisableSDEUnitClockGating:chv */
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I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
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I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
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GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
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GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
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/* WaDisableGunitClockGating:chv (pre-production hw) */
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I915_WRITE(VLV_GUNIT_CLOCK_GATE, I915_READ(VLV_GUNIT_CLOCK_GATE) |
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GINT_DIS);
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/* WaDisableFfDopClockGating:chv (pre-production hw) */
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I915_WRITE(GEN6_RC_SLEEP_PSMI_CONTROL,
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_MASKED_BIT_ENABLE(GEN8_FF_DOP_CLOCK_GATE_DISABLE));
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/* WaDisableDopClockGating:chv (pre-production hw) */
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I915_WRITE(GEN6_UCGCTL1, I915_READ(GEN6_UCGCTL1) |
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GEN6_EU_TCUNIT_CLOCK_GATE_DISABLE);
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}
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}
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static void g4x_init_clock_gating(struct drm_device *dev)
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static void g4x_init_clock_gating(struct drm_device *dev)
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@ -795,14 +795,6 @@ static int chv_init_workarounds(struct intel_engine_cs *ring)
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WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN,
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WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN,
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STALL_DOP_GATING_DISABLE);
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STALL_DOP_GATING_DISABLE);
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/* WaDisableDopClockGating:chv (pre-production hw) */
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WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2,
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DOP_CLOCK_GATING_DISABLE);
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/* WaDisableSamplerPowerBypass:chv (pre-production hw) */
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WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN3,
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GEN8_SAMPLER_POWER_BYPASS_DIS);
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return 0;
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return 0;
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}
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}
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