drm/radeon/kms: add support for msi
Try to enable msi on chips that support it. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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ebbe1cb936
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@ -186,7 +186,7 @@ static inline uint32_t r100_irq_ack(struct radeon_device *rdev)
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int r100_irq_process(struct radeon_device *rdev)
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{
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uint32_t status;
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uint32_t status, msi_rearm;
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status = r100_irq_ack(rdev);
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if (!status) {
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@ -209,6 +209,21 @@ int r100_irq_process(struct radeon_device *rdev)
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}
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status = r100_irq_ack(rdev);
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}
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if (rdev->msi_enabled) {
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switch (rdev->family) {
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case CHIP_RS400:
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case CHIP_RS480:
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msi_rearm = RREG32(RADEON_AIC_CNTL) & ~RS400_MSI_REARM;
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WREG32(RADEON_AIC_CNTL, msi_rearm);
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WREG32(RADEON_AIC_CNTL, msi_rearm | RS400_MSI_REARM);
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break;
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default:
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msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN;
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WREG32(RADEON_MSI_REARM_EN, msi_rearm);
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WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN);
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break;
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}
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}
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return IRQ_HANDLED;
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}
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@ -784,6 +784,7 @@ struct radeon_device {
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const struct firmware *me_fw; /* all family ME firmware */
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const struct firmware *pfp_fw; /* r6/700 PFP firmware */
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struct r600_blit r600_blit;
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int msi_enabled; /* msi enabled */
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};
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int radeon_device_init(struct radeon_device *rdev,
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@ -92,6 +92,13 @@ int radeon_irq_kms_init(struct radeon_device *rdev)
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if (r) {
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return r;
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}
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/* enable msi */
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rdev->msi_enabled = 0;
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if (rdev->family >= CHIP_RV380) {
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int ret = pci_enable_msi(rdev->pdev);
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if (!ret)
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rdev->msi_enabled = 1;
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}
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drm_irq_install(rdev->ddev);
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rdev->irq.installed = true;
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DRM_INFO("radeon: irq initialized.\n");
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@ -103,5 +110,7 @@ void radeon_irq_kms_fini(struct radeon_device *rdev)
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if (rdev->irq.installed) {
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rdev->irq.installed = false;
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drm_irq_uninstall(rdev->ddev);
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if (rdev->msi_enabled)
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pci_disable_msi(rdev->pdev);
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}
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}
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@ -290,6 +290,8 @@
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#define RADEON_BUS_CNTL 0x0030
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# define RADEON_BUS_MASTER_DIS (1 << 6)
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# define RADEON_BUS_BIOS_DIS_ROM (1 << 12)
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# define RS600_BUS_MASTER_DIS (1 << 14)
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# define RS600_MSI_REARM (1 << 20) /* rs600/rs690/rs740 */
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# define RADEON_BUS_RD_DISCARD_EN (1 << 24)
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# define RADEON_BUS_RD_ABORT_EN (1 << 25)
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# define RADEON_BUS_MSTR_DISCONNECT_EN (1 << 28)
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@ -297,6 +299,9 @@
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# define RADEON_BUS_READ_BURST (1 << 30)
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#define RADEON_BUS_CNTL1 0x0034
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# define RADEON_BUS_WAIT_ON_LOCK_EN (1 << 4)
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/* rv370/rv380, rv410, r423/r430/r480, r5xx */
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#define RADEON_MSI_REARM_EN 0x0160
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# define RV370_MSI_REARM_EN (1 << 0)
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/* #define RADEON_PCIE_INDEX 0x0030 */
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/* #define RADEON_PCIE_DATA 0x0034 */
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@ -3311,6 +3316,7 @@
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#define RADEON_AIC_CNTL 0x01d0
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# define RADEON_PCIGART_TRANSLATE_EN (1 << 0)
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# define RADEON_DIS_OUT_OF_PCI_GART_ACCESS (1 << 1)
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# define RS400_MSI_REARM (1 << 3) /* rs400/rs480 */
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#define RADEON_AIC_LO_ADDR 0x01dc
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#define RADEON_AIC_PT_BASE 0x01d8
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#define RADEON_AIC_HI_ADDR 0x01e0
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@ -242,7 +242,7 @@ void rs600_irq_disable(struct radeon_device *rdev)
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int rs600_irq_process(struct radeon_device *rdev)
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{
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uint32_t status;
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uint32_t status, msi_rearm;
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uint32_t r500_disp_int;
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status = rs600_irq_ack(rdev, &r500_disp_int);
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@ -260,6 +260,22 @@ int rs600_irq_process(struct radeon_device *rdev)
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drm_handle_vblank(rdev->ddev, 1);
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status = rs600_irq_ack(rdev, &r500_disp_int);
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}
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if (rdev->msi_enabled) {
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switch (rdev->family) {
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case CHIP_RS600:
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case CHIP_RS690:
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case CHIP_RS740:
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msi_rearm = RREG32(RADEON_BUS_CNTL) & ~RS600_MSI_REARM;
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WREG32(RADEON_BUS_CNTL, msi_rearm);
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WREG32(RADEON_BUS_CNTL, msi_rearm | RS600_MSI_REARM);
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break;
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default:
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msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN;
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WREG32(RADEON_MSI_REARM_EN, msi_rearm);
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WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN);
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break;
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}
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}
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return IRQ_HANDLED;
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}
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