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scsi: csiostor: Prefer pcie_capability_read_word() 

Commit 8c0d3a02c1 ("PCI: Add accessors for PCI Express Capability") added
accessors for the PCI Express Capability so that drivers didn't need to be
aware of differences between v1 and v2 of the PCI Express Capability.

Replace pci_read_config_word() and pci_write_config_word() calls with
pcie_capability_read_word() and pcie_capability_write_word().

Signed-off-by: Frederick Lawler <fred@fredlawl.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
alistair/sunxi64-5.4-dsi
Frederick Lawler 2019-07-17 21:07:43 -05:00 committed by Martin K. Petersen
parent 1d4f4a5e50
commit 3e76ca9561
1 changed files with 2 additions and 6 deletions
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8
drivers/scsi/csiostor/csio_wr.c
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@ -1316,7 +1316,6 @@ csio_wr_fixup_host_params(struct csio_hw *hw)
u32 fl_align = clsz < 32 ? 32 : clsz;
u32 pack_align;
u32 ingpad, ingpack;
int pcie_cap;
csio_wr_reg32(hw, HOSTPAGESIZEPF0_V(s_hps) | HOSTPAGESIZEPF1_V(s_hps) |
HOSTPAGESIZEPF2_V(s_hps) | HOSTPAGESIZEPF3_V(s_hps) |
@ -1347,8 +1346,7 @@ csio_wr_fixup_host_params(struct csio_hw *hw)
* multiple of the Maximum Payload Size.
*/
pack_align = fl_align;
pcie_cap = pci_find_capability(hw->pdev, PCI_CAP_ID_EXP);
if (pcie_cap) {
if (pci_is_pcie(hw->pdev)) {
u32 mps, mps_log;
u16 devctl;
@ -1356,9 +1354,7 @@ csio_wr_fixup_host_params(struct csio_hw *hw)
* [bits 7:5] encodes sizes as powers of 2 starting at
* 128 bytes.
*/
pci_read_config_word(hw->pdev,
pcie_cap + PCI_EXP_DEVCTL,
&devctl);
pcie_capability_read_word(hw->pdev, PCI_EXP_DEVCTL, &devctl);
mps_log = ((devctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5) + 7;
mps = 1 << mps_log;
if (mps > pack_align)