crypto: caam - add support for gcm(aes)
Add support for AES working in Galois Counter Mode. There is a limitation related to IV size, similar to the one present in SW implementation (crypto/gcm.c): The only IV size allowed is 12 bytes. It will be padded by HW to the right with 0x0000_0001 (up to 16 bytes - AES block size), according to the GCM specification. Signed-off-by: Tudor Ambarus <tudor.ambarus@freescale.com> Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
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61daf055ea
commit
3ef8d945d0
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@ -74,6 +74,10 @@
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#define DESC_AEAD_NULL_ENC_LEN (DESC_AEAD_NULL_BASE + 14 * CAAM_CMD_SZ)
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#define DESC_AEAD_NULL_DEC_LEN (DESC_AEAD_NULL_BASE + 17 * CAAM_CMD_SZ)
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#define DESC_GCM_BASE (3 * CAAM_CMD_SZ)
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#define DESC_GCM_ENC_LEN (DESC_GCM_BASE + 23 * CAAM_CMD_SZ)
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#define DESC_GCM_DEC_LEN (DESC_GCM_BASE + 19 * CAAM_CMD_SZ)
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#define DESC_ABLKCIPHER_BASE (3 * CAAM_CMD_SZ)
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#define DESC_ABLKCIPHER_ENC_LEN (DESC_ABLKCIPHER_BASE + \
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20 * CAAM_CMD_SZ)
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@ -630,6 +634,236 @@ static int aead_setauthsize(struct crypto_aead *authenc,
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return 0;
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}
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static int gcm_set_sh_desc(struct crypto_aead *aead)
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{
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struct aead_tfm *tfm = &aead->base.crt_aead;
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struct caam_ctx *ctx = crypto_aead_ctx(aead);
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struct device *jrdev = ctx->jrdev;
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bool keys_fit_inline = false;
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u32 *key_jump_cmd, *zero_payload_jump_cmd,
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*zero_assoc_jump_cmd1, *zero_assoc_jump_cmd2;
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u32 *desc;
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if (!ctx->enckeylen || !ctx->authsize)
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return 0;
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/*
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* AES GCM encrypt shared descriptor
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* Job Descriptor and Shared Descriptor
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* must fit into the 64-word Descriptor h/w Buffer
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*/
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if (DESC_GCM_ENC_LEN + DESC_JOB_IO_LEN +
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ctx->enckeylen <= CAAM_DESC_BYTES_MAX)
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keys_fit_inline = true;
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desc = ctx->sh_desc_enc;
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init_sh_desc(desc, HDR_SHARE_SERIAL);
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/* skip key loading if they are loaded due to sharing */
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key_jump_cmd = append_jump(desc, JUMP_JSL | JUMP_TEST_ALL |
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JUMP_COND_SHRD | JUMP_COND_SELF);
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if (keys_fit_inline)
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append_key_as_imm(desc, (void *)ctx->key, ctx->enckeylen,
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ctx->enckeylen, CLASS_1 | KEY_DEST_CLASS_REG);
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else
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append_key(desc, ctx->key_dma, ctx->enckeylen,
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CLASS_1 | KEY_DEST_CLASS_REG);
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set_jump_tgt_here(desc, key_jump_cmd);
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/* class 1 operation */
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append_operation(desc, ctx->class1_alg_type |
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OP_ALG_AS_INITFINAL | OP_ALG_ENCRYPT);
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/* cryptlen = seqoutlen - authsize */
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append_math_sub_imm_u32(desc, REG3, SEQOUTLEN, IMM, ctx->authsize);
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/* assoclen + cryptlen = seqinlen - ivsize */
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append_math_sub_imm_u32(desc, REG2, SEQINLEN, IMM, tfm->ivsize);
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/* assoclen = (assoclen + cryptlen) - cryptlen */
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append_math_sub(desc, REG1, REG2, REG3, CAAM_CMD_SZ);
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/* if cryptlen is ZERO jump to zero-payload commands */
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append_math_add(desc, VARSEQOUTLEN, ZERO, REG3, CAAM_CMD_SZ);
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zero_payload_jump_cmd = append_jump(desc, JUMP_TEST_ALL |
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JUMP_COND_MATH_Z);
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/* read IV */
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append_seq_fifo_load(desc, tfm->ivsize, FIFOLD_CLASS_CLASS1 |
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FIFOLD_TYPE_IV | FIFOLD_TYPE_FLUSH1);
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/* if assoclen is ZERO, skip reading the assoc data */
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append_math_add(desc, VARSEQINLEN, ZERO, REG1, CAAM_CMD_SZ);
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zero_assoc_jump_cmd1 = append_jump(desc, JUMP_TEST_ALL |
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JUMP_COND_MATH_Z);
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/* read assoc data */
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append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS1 | FIFOLDST_VLF |
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FIFOLD_TYPE_AAD | FIFOLD_TYPE_FLUSH1);
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set_jump_tgt_here(desc, zero_assoc_jump_cmd1);
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append_math_add(desc, VARSEQINLEN, ZERO, REG3, CAAM_CMD_SZ);
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/* write encrypted data */
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append_seq_fifo_store(desc, 0, FIFOST_TYPE_MESSAGE_DATA | FIFOLDST_VLF);
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/* read payload data */
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append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS1 | FIFOLDST_VLF |
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FIFOLD_TYPE_MSG | FIFOLD_TYPE_LAST1);
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/* jump the zero-payload commands */
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append_jump(desc, JUMP_TEST_ALL | 7);
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/* zero-payload commands */
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set_jump_tgt_here(desc, zero_payload_jump_cmd);
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/* if assoclen is ZERO, jump to IV reading - is the only input data */
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append_math_add(desc, VARSEQINLEN, ZERO, REG1, CAAM_CMD_SZ);
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zero_assoc_jump_cmd2 = append_jump(desc, JUMP_TEST_ALL |
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JUMP_COND_MATH_Z);
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/* read IV */
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append_seq_fifo_load(desc, tfm->ivsize, FIFOLD_CLASS_CLASS1 |
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FIFOLD_TYPE_IV | FIFOLD_TYPE_FLUSH1);
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/* read assoc data */
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append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS1 | FIFOLDST_VLF |
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FIFOLD_TYPE_AAD | FIFOLD_TYPE_LAST1);
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/* jump to ICV writing */
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append_jump(desc, JUMP_TEST_ALL | 2);
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/* read IV - is the only input data */
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set_jump_tgt_here(desc, zero_assoc_jump_cmd2);
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append_seq_fifo_load(desc, tfm->ivsize, FIFOLD_CLASS_CLASS1 |
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FIFOLD_TYPE_IV | FIFOLD_TYPE_FLUSH1 |
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FIFOLD_TYPE_LAST1);
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/* write ICV */
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append_seq_store(desc, ctx->authsize, LDST_CLASS_1_CCB |
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LDST_SRCDST_BYTE_CONTEXT);
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ctx->sh_desc_enc_dma = dma_map_single(jrdev, desc,
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desc_bytes(desc),
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DMA_TO_DEVICE);
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if (dma_mapping_error(jrdev, ctx->sh_desc_enc_dma)) {
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dev_err(jrdev, "unable to map shared descriptor\n");
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return -ENOMEM;
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}
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#ifdef DEBUG
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print_hex_dump(KERN_ERR, "gcm enc shdesc@"__stringify(__LINE__)": ",
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DUMP_PREFIX_ADDRESS, 16, 4, desc,
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desc_bytes(desc), 1);
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#endif
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/*
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* Job Descriptor and Shared Descriptors
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* must all fit into the 64-word Descriptor h/w Buffer
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*/
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keys_fit_inline = false;
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if (DESC_GCM_DEC_LEN + DESC_JOB_IO_LEN +
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ctx->enckeylen <= CAAM_DESC_BYTES_MAX)
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keys_fit_inline = true;
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desc = ctx->sh_desc_dec;
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init_sh_desc(desc, HDR_SHARE_SERIAL);
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/* skip key loading if they are loaded due to sharing */
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key_jump_cmd = append_jump(desc, JUMP_JSL |
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JUMP_TEST_ALL | JUMP_COND_SHRD |
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JUMP_COND_SELF);
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if (keys_fit_inline)
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append_key_as_imm(desc, (void *)ctx->key, ctx->enckeylen,
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ctx->enckeylen, CLASS_1 | KEY_DEST_CLASS_REG);
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else
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append_key(desc, ctx->key_dma, ctx->enckeylen,
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CLASS_1 | KEY_DEST_CLASS_REG);
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set_jump_tgt_here(desc, key_jump_cmd);
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/* class 1 operation */
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append_operation(desc, ctx->class1_alg_type |
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OP_ALG_AS_INITFINAL | OP_ALG_DECRYPT | OP_ALG_ICV_ON);
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/* assoclen + cryptlen = seqinlen - ivsize - icvsize */
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append_math_sub_imm_u32(desc, REG3, SEQINLEN, IMM,
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ctx->authsize + tfm->ivsize);
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/* assoclen = (assoclen + cryptlen) - cryptlen */
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append_math_sub(desc, REG2, SEQOUTLEN, REG0, CAAM_CMD_SZ);
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append_math_sub(desc, REG1, REG3, REG2, CAAM_CMD_SZ);
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/* read IV */
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append_seq_fifo_load(desc, tfm->ivsize, FIFOLD_CLASS_CLASS1 |
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FIFOLD_TYPE_IV | FIFOLD_TYPE_FLUSH1);
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/* jump to zero-payload command if cryptlen is zero */
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append_math_add(desc, VARSEQOUTLEN, ZERO, REG2, CAAM_CMD_SZ);
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zero_payload_jump_cmd = append_jump(desc, JUMP_TEST_ALL |
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JUMP_COND_MATH_Z);
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append_math_add(desc, VARSEQINLEN, ZERO, REG1, CAAM_CMD_SZ);
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/* if asoclen is ZERO, skip reading assoc data */
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zero_assoc_jump_cmd1 = append_jump(desc, JUMP_TEST_ALL |
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JUMP_COND_MATH_Z);
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/* read assoc data */
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append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS1 | FIFOLDST_VLF |
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FIFOLD_TYPE_AAD | FIFOLD_TYPE_FLUSH1);
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set_jump_tgt_here(desc, zero_assoc_jump_cmd1);
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append_math_add(desc, VARSEQINLEN, ZERO, REG2, CAAM_CMD_SZ);
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/* store encrypted data */
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append_seq_fifo_store(desc, 0, FIFOST_TYPE_MESSAGE_DATA | FIFOLDST_VLF);
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/* read payload data */
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append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS1 | FIFOLDST_VLF |
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FIFOLD_TYPE_MSG | FIFOLD_TYPE_FLUSH1);
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/* jump the zero-payload commands */
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append_jump(desc, JUMP_TEST_ALL | 4);
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/* zero-payload command */
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set_jump_tgt_here(desc, zero_payload_jump_cmd);
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/* if assoclen is ZERO, jump to ICV reading */
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append_math_add(desc, VARSEQINLEN, ZERO, REG1, CAAM_CMD_SZ);
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zero_assoc_jump_cmd2 = append_jump(desc, JUMP_TEST_ALL |
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JUMP_COND_MATH_Z);
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/* read assoc data */
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append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS1 | FIFOLDST_VLF |
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FIFOLD_TYPE_AAD | FIFOLD_TYPE_FLUSH1);
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set_jump_tgt_here(desc, zero_assoc_jump_cmd2);
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/* read ICV */
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append_seq_fifo_load(desc, ctx->authsize, FIFOLD_CLASS_CLASS1 |
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FIFOLD_TYPE_ICV | FIFOLD_TYPE_LAST1);
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ctx->sh_desc_dec_dma = dma_map_single(jrdev, desc,
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desc_bytes(desc),
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DMA_TO_DEVICE);
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if (dma_mapping_error(jrdev, ctx->sh_desc_dec_dma)) {
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dev_err(jrdev, "unable to map shared descriptor\n");
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return -ENOMEM;
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}
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#ifdef DEBUG
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print_hex_dump(KERN_ERR, "gcm dec shdesc@"__stringify(__LINE__)": ",
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DUMP_PREFIX_ADDRESS, 16, 4, desc,
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desc_bytes(desc), 1);
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#endif
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return 0;
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}
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static int gcm_setauthsize(struct crypto_aead *authenc, unsigned int authsize)
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{
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struct caam_ctx *ctx = crypto_aead_ctx(authenc);
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ctx->authsize = authsize;
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gcm_set_sh_desc(authenc);
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return 0;
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}
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static u32 gen_split_aead_key(struct caam_ctx *ctx, const u8 *key_in,
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u32 authkeylen)
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{
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@ -703,6 +937,36 @@ badkey:
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return -EINVAL;
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}
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static int gcm_setkey(struct crypto_aead *aead,
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const u8 *key, unsigned int keylen)
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{
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struct caam_ctx *ctx = crypto_aead_ctx(aead);
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struct device *jrdev = ctx->jrdev;
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int ret = 0;
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#ifdef DEBUG
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print_hex_dump(KERN_ERR, "key in @"__stringify(__LINE__)": ",
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DUMP_PREFIX_ADDRESS, 16, 4, key, keylen, 1);
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#endif
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memcpy(ctx->key, key, keylen);
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ctx->key_dma = dma_map_single(jrdev, ctx->key, keylen,
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DMA_TO_DEVICE);
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if (dma_mapping_error(jrdev, ctx->key_dma)) {
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dev_err(jrdev, "unable to map key i/o memory\n");
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return -ENOMEM;
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}
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ctx->enckeylen = keylen;
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ret = gcm_set_sh_desc(aead);
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if (ret) {
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dma_unmap_single(jrdev, ctx->key_dma, ctx->enckeylen,
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DMA_TO_DEVICE);
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}
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return ret;
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}
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static int ablkcipher_setkey(struct crypto_ablkcipher *ablkcipher,
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const u8 *key, unsigned int keylen)
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{
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@ -1088,6 +1352,7 @@ static void init_aead_job(u32 *sh_desc, dma_addr_t ptr,
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u32 out_options = 0, in_options;
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dma_addr_t dst_dma, src_dma;
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int len, sec4_sg_index = 0;
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bool is_gcm = false;
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#ifdef DEBUG
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debug("assoclen %d cryptlen %d authsize %d\n",
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@ -1106,11 +1371,19 @@ static void init_aead_job(u32 *sh_desc, dma_addr_t ptr,
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desc_bytes(sh_desc), 1);
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#endif
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if (((ctx->class1_alg_type & OP_ALG_ALGSEL_MASK) ==
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OP_ALG_ALGSEL_AES) &&
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((ctx->class1_alg_type & OP_ALG_AAI_MASK) == OP_ALG_AAI_GCM))
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is_gcm = true;
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len = desc_len(sh_desc);
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init_job_desc_shared(desc, ptr, len, HDR_SHARE_DEFER | HDR_REVERSE);
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if (all_contig) {
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src_dma = sg_dma_address(req->assoc);
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if (is_gcm)
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src_dma = edesc->iv_dma;
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else
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src_dma = sg_dma_address(req->assoc);
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in_options = 0;
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} else {
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src_dma = edesc->sec4_sg_dma;
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@ -1292,6 +1565,7 @@ static struct aead_edesc *aead_edesc_alloc(struct aead_request *req,
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int ivsize = crypto_aead_ivsize(aead);
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int sec4_sg_index, sec4_sg_len = 0, sec4_sg_bytes;
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unsigned int authsize = ctx->authsize;
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bool is_gcm = false;
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assoc_nents = sg_count(req->assoc, req->assoclen, &assoc_chained);
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@ -1326,15 +1600,31 @@ static struct aead_edesc *aead_edesc_alloc(struct aead_request *req,
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return ERR_PTR(-ENOMEM);
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}
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/* Check if data are contiguous */
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if (assoc_nents || sg_dma_address(req->assoc) + req->assoclen !=
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iv_dma || src_nents || iv_dma + ivsize !=
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sg_dma_address(req->src)) {
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all_contig = false;
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if (((ctx->class1_alg_type & OP_ALG_ALGSEL_MASK) ==
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OP_ALG_ALGSEL_AES) &&
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((ctx->class1_alg_type & OP_ALG_AAI_MASK) == OP_ALG_AAI_GCM))
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is_gcm = true;
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/*
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* Check if data are contiguous.
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* GCM expected input sequence: IV, AAD, text
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* All other - expected input sequence: AAD, IV, text
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*/
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if (is_gcm)
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all_contig = (!assoc_nents &&
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iv_dma + ivsize == sg_dma_address(req->assoc) &&
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!src_nents && sg_dma_address(req->assoc) +
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req->assoclen == sg_dma_address(req->src));
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else
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all_contig = (!assoc_nents && sg_dma_address(req->assoc) +
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req->assoclen == iv_dma && !src_nents &&
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iv_dma + ivsize == sg_dma_address(req->src));
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if (!all_contig) {
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assoc_nents = assoc_nents ? : 1;
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src_nents = src_nents ? : 1;
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sec4_sg_len = assoc_nents + 1 + src_nents;
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}
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sec4_sg_len += dst_nents;
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sec4_sg_bytes = sec4_sg_len * sizeof(struct sec4_sg_entry);
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@ -1361,14 +1651,26 @@ static struct aead_edesc *aead_edesc_alloc(struct aead_request *req,
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sec4_sg_index = 0;
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if (!all_contig) {
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sg_to_sec4_sg(req->assoc,
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(assoc_nents ? : 1),
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edesc->sec4_sg +
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sec4_sg_index, 0);
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sec4_sg_index += assoc_nents ? : 1;
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if (!is_gcm) {
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sg_to_sec4_sg(req->assoc,
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(assoc_nents ? : 1),
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edesc->sec4_sg +
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sec4_sg_index, 0);
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sec4_sg_index += assoc_nents ? : 1;
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}
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dma_to_sec4_sg_one(edesc->sec4_sg + sec4_sg_index,
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iv_dma, ivsize, 0);
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sec4_sg_index += 1;
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if (is_gcm) {
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sg_to_sec4_sg(req->assoc,
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(assoc_nents ? : 1),
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edesc->sec4_sg +
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sec4_sg_index, 0);
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sec4_sg_index += assoc_nents ? : 1;
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}
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sg_to_sec4_sg_last(req->src,
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(src_nents ? : 1),
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edesc->sec4_sg +
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@ -2309,6 +2611,24 @@ static struct caam_alg_template driver_algs[] = {
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OP_ALG_AAI_HMAC_PRECOMP,
|
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.alg_op = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC,
|
||||
},
|
||||
/* Galois Counter Mode */
|
||||
{
|
||||
.name = "gcm(aes)",
|
||||
.driver_name = "gcm-aes-caam",
|
||||
.blocksize = 1,
|
||||
.type = CRYPTO_ALG_TYPE_AEAD,
|
||||
.template_aead = {
|
||||
.setkey = gcm_setkey,
|
||||
.setauthsize = gcm_setauthsize,
|
||||
.encrypt = aead_encrypt,
|
||||
.decrypt = aead_decrypt,
|
||||
.givencrypt = NULL,
|
||||
.geniv = "<built-in>",
|
||||
.ivsize = 12,
|
||||
.maxauthsize = AES_BLOCK_SIZE,
|
||||
},
|
||||
.class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_GCM,
|
||||
},
|
||||
/* ablkcipher descriptor */
|
||||
{
|
||||
.name = "cbc(aes)",
|
||||
|
|
Loading…
Reference in a new issue