RDMA/bnxt_re: Add HW workaround for avoiding stall for UD QPs
HW stalls out after 0x800000 WQEs are posted for UD QPs. To workaround this problem, driver will send a modify_qp cmd to the HW at around the halfway mark(0x400000) so that FW can accordingly modify the QP context in the HW to prevent this stall. This workaround needs to be done for UD, QP1 and Raw Ethertype packets. Added a counter to keep track of WQEs posted during post_send. Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com> Signed-off-by: Selvin Xavier <selvin.xavier@broadcom.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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@ -56,6 +56,8 @@
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#define BNXT_RE_MAX_SRQC_COUNT (64 * 1024)
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#define BNXT_RE_MAX_CQ_COUNT (64 * 1024)
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#define BNXT_RE_UD_QP_HW_STALL 0x400000
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struct bnxt_re_work {
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struct work_struct work;
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unsigned long event;
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@ -2075,6 +2075,22 @@ static int bnxt_re_copy_wr_payload(struct bnxt_re_dev *rdev,
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return payload_sz;
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}
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static void bnxt_ud_qp_hw_stall_workaround(struct bnxt_re_qp *qp)
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{
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if ((qp->ib_qp.qp_type == IB_QPT_UD ||
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qp->ib_qp.qp_type == IB_QPT_GSI ||
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qp->ib_qp.qp_type == IB_QPT_RAW_ETHERTYPE) &&
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qp->qplib_qp.wqe_cnt == BNXT_RE_UD_QP_HW_STALL) {
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int qp_attr_mask;
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struct ib_qp_attr qp_attr;
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qp_attr_mask = IB_QP_STATE;
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qp_attr.qp_state = IB_QPS_RTS;
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bnxt_re_modify_qp(&qp->ib_qp, &qp_attr, qp_attr_mask, NULL);
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qp->qplib_qp.wqe_cnt = 0;
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}
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}
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static int bnxt_re_post_send_shadow_qp(struct bnxt_re_dev *rdev,
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struct bnxt_re_qp *qp,
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struct ib_send_wr *wr)
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@ -2120,6 +2136,7 @@ bad:
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wr = wr->next;
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}
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bnxt_qplib_post_send_db(&qp->qplib_qp);
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bnxt_ud_qp_hw_stall_workaround(qp);
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spin_unlock_irqrestore(&qp->sq_lock, flags);
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return rc;
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}
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@ -2216,6 +2233,7 @@ bad:
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wr = wr->next;
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}
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bnxt_qplib_post_send_db(&qp->qplib_qp);
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bnxt_ud_qp_hw_stall_workaround(qp);
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spin_unlock_irqrestore(&qp->sq_lock, flags);
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return rc;
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@ -1298,6 +1298,9 @@ int bnxt_qplib_post_send(struct bnxt_qplib_qp *qp,
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}
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sq->hwq.prod++;
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qp->wqe_cnt++;
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done:
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return rc;
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}
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@ -250,6 +250,7 @@ struct bnxt_qplib_qp {
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u8 timeout;
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u8 retry_cnt;
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u8 rnr_retry;
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u64 wqe_cnt;
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u32 min_rnr_timer;
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u32 max_rd_atomic;
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u32 max_dest_rd_atomic;
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