From 162dedd39dcc6eca3fc0d29cf19658c6c13b840e Mon Sep 17 00:00:00 2001 From: Thomas Renninger Date: Fri, 3 Apr 2009 06:34:00 -0700 Subject: [PATCH 1/8] PCI quirk: disable MSI on VIA VT3364 chipsets Without this patch, Broadcom BCM5906 Ethernet controllers set up via MSI cause the machine to hang. Tejun agreed that the best is to blacklist the whole chipset and after adding it, seeing the other VIA quirks disabling MSI, this very much looks like the right way. Cc: Signed-off-by: Thomas Renninger Signed-off-by: Jesse Barnes --- drivers/pci/quirks.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 0254741bece0..3067673d54f6 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -2033,6 +2033,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RS400_200, quirk_di DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RS480, quirk_disable_all_msi); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT3336, quirk_disable_all_msi); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT3351, quirk_disable_all_msi); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT3364, quirk_disable_all_msi); /* Disable MSI on chipsets that are known to not support it */ static void __devinit quirk_disable_msi(struct pci_dev *dev) From 044cd80942e47b9de0915b627902adf05c52377f Mon Sep 17 00:00:00 2001 From: Yinghai Lu Date: Sat, 18 Apr 2009 01:43:46 -0700 Subject: [PATCH 2/8] x86/PCI: don't call e820_all_mapped with -1 in the mmconfig case e820_all_mapped need end is (addr + size) instead of (addr + size - 1) Cc: stable@kernel.org Acked-by: Ingo Molnar Signed-off-by: Yinghai Lu Signed-off-by: Jesse Barnes --- arch/x86/pci/mmconfig-shared.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c index 905bb526b133..5fa10bb9604f 100644 --- a/arch/x86/pci/mmconfig-shared.c +++ b/arch/x86/pci/mmconfig-shared.c @@ -375,7 +375,7 @@ static acpi_status __init check_mcfg_resource(struct acpi_resource *res, if (!fixmem32) return AE_OK; if ((mcfg_res->start >= fixmem32->address) && - (mcfg_res->end < (fixmem32->address + + (mcfg_res->end <= (fixmem32->address + fixmem32->address_length))) { mcfg_res->flags = 1; return AE_CTRL_TERMINATE; @@ -392,7 +392,7 @@ static acpi_status __init check_mcfg_resource(struct acpi_resource *res, return AE_OK; if ((mcfg_res->start >= address.minimum) && - (mcfg_res->end < (address.minimum + address.address_length))) { + (mcfg_res->end <= (address.minimum + address.address_length))) { mcfg_res->flags = 1; return AE_CTRL_TERMINATE; } @@ -439,7 +439,7 @@ static int __init is_mmconf_reserved(check_reserved_t is_reserved, u64 old_size = size; int valid = 0; - while (!is_reserved(addr, addr + size - 1, E820_RESERVED)) { + while (!is_reserved(addr, addr + size, E820_RESERVED)) { size >>= 1; if (size < (16UL<<20)) break; From 0bb1be3e30bfc3e09fa0ff1e887ac7da4a16c3a2 Mon Sep 17 00:00:00 2001 From: Matthew Wilcox Date: Thu, 16 Apr 2009 13:31:10 -0600 Subject: [PATCH 3/8] x86/PCI: Move set_pci_bus_resources_arch_default into arch/x86 Commit 30a18d6c3f1e774de656ebd8ff219d53e2ba4029 introduced a new function to set the PCI bus resources. Unfortunately, neither the author, nor the committers seemed to know that we already have somewhere to do that -- pcibios_fixup_bus(). This patch moves the hook (used only by the K8 code) into x86-specific code where it should have been in the first place. Cc: Yinghai Lu Signed-off-by: Matthew Wilcox Acked-by: Ingo Molnar Signed-off-by: Jesse Barnes --- arch/x86/pci/common.c | 7 ++++++- drivers/pci/probe.c | 6 ------ 2 files changed, 6 insertions(+), 7 deletions(-) diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c index 8c362b96b644..f80ece51305d 100644 --- a/arch/x86/pci/common.c +++ b/arch/x86/pci/common.c @@ -142,15 +142,20 @@ static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev) } } +void __attribute__((weak)) set_pci_bus_resources_arch_default(struct pci_bus *b) +{ +} + /* * Called after each bus is probed, but before its children * are examined. */ -void __devinit pcibios_fixup_bus(struct pci_bus *b) +void __devinit pcibios_fixup_bus(struct pci_bus *b) { struct pci_dev *dev; + set_pci_bus_resources_arch_default(b); pci_read_bridge_bases(b); list_for_each_entry(dev, &b->devices, bus_list) pcibios_fixup_device_resources(dev); diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 8eb50dffb78a..e3c3e081b834 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -1118,10 +1118,6 @@ unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus) return max; } -void __attribute__((weak)) set_pci_bus_resources_arch_default(struct pci_bus *b) -{ -} - struct pci_bus * pci_create_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata) { @@ -1180,8 +1176,6 @@ struct pci_bus * pci_create_bus(struct device *parent, b->resource[0] = &ioport_resource; b->resource[1] = &iomem_resource; - set_pci_bus_resources_arch_default(b); - return b; dev_create_file_err: From 0e94ecd098347874e776f7818728613a335880d1 Mon Sep 17 00:00:00 2001 From: Yinghai Lu Date: Sat, 18 Apr 2009 10:11:25 -0700 Subject: [PATCH 4/8] x86/PCI: set_pci_bus_resources_arch_default cleanups Rename set_pci_bus_resources_arch_default to x86_pci_root_bus_res_quirks, move the weak version from common.c to i386.c, and before calling, make sure it's a root bus. Reviewed-by: Matthew Wilcox Signed-off-by: Yinghai Lu Signed-off-by: Jesse Barnes --- arch/x86/include/asm/topology.h | 2 +- arch/x86/pci/amd_bus.c | 2 +- arch/x86/pci/common.c | 8 +++----- arch/x86/pci/i386.c | 4 ++++ 4 files changed, 9 insertions(+), 7 deletions(-) diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h index 892b119dba6f..f44b49abca49 100644 --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h @@ -200,7 +200,7 @@ static inline void arch_fix_phys_package_id(int num, u32 slot) } struct pci_bus; -void set_pci_bus_resources_arch_default(struct pci_bus *b); +void x86_pci_root_bus_res_quirks(struct pci_bus *b); #ifdef CONFIG_SMP #define mc_capable() (cpumask_weight(cpu_core_mask(0)) != nr_cpu_ids) diff --git a/arch/x86/pci/amd_bus.c b/arch/x86/pci/amd_bus.c index 9bb09823b362..e121ee050f7c 100644 --- a/arch/x86/pci/amd_bus.c +++ b/arch/x86/pci/amd_bus.c @@ -94,7 +94,7 @@ struct pci_root_info { static int pci_root_num; static struct pci_root_info pci_root_info[PCI_ROOT_NR]; -void set_pci_bus_resources_arch_default(struct pci_bus *b) +void x86_pci_root_bus_res_quirks(struct pci_bus *b) { int i; int j; diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c index f80ece51305d..2202b6257b82 100644 --- a/arch/x86/pci/common.c +++ b/arch/x86/pci/common.c @@ -142,10 +142,6 @@ static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev) } } -void __attribute__((weak)) set_pci_bus_resources_arch_default(struct pci_bus *b) -{ -} - /* * Called after each bus is probed, but before its children * are examined. @@ -155,7 +151,9 @@ void __devinit pcibios_fixup_bus(struct pci_bus *b) { struct pci_dev *dev; - set_pci_bus_resources_arch_default(b); + /* root bus? */ + if (!b->parent) + x86_pci_root_bus_res_quirks(b); pci_read_bridge_bases(b); list_for_each_entry(dev, &b->devices, bus_list) pcibios_fixup_device_resources(dev); diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c index f1817f71e009..a85bef20a3b9 100644 --- a/arch/x86/pci/i386.c +++ b/arch/x86/pci/i386.c @@ -238,6 +238,10 @@ void __init pcibios_resource_survey(void) */ fs_initcall(pcibios_assign_resources); +void __weak x86_pci_root_bus_res_quirks(struct pci_bus *b) +{ +} + /* * If we set up a device for bus mastering, we need to check the latency * timer as certain crappy BIOSes forget to set it properly. From 681bf597215c62bd6f5ae1180a58a38997122b5b Mon Sep 17 00:00:00 2001 From: Yinghai Lu Date: Mon, 13 Apr 2009 18:28:54 -0700 Subject: [PATCH 5/8] PCI: cleanup debug output resources Remove outputs for 0 sized resources and indicate prefetchability. Signed-off-by: Yinghai Lu Signed-off-by: Jesse Barnes --- drivers/pci/setup-bus.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 8d9da9d30a61..a00f85471b6e 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -536,11 +536,13 @@ static void pci_bus_dump_res(struct pci_bus *bus) for (i = 0; i < PCI_BUS_NUM_RESOURCES; i++) { struct resource *res = bus->resource[i]; - if (!res) + if (!res || !res->end) continue; dev_printk(KERN_DEBUG, &bus->dev, "resource %d %s %pR\n", i, - (res->flags & IORESOURCE_IO) ? "io: " : "mem:", res); + (res->flags & IORESOURCE_IO) ? "io: " : + ((res->flags & IORESOURCE_PREFETCH)? "pref mem":"mem:"), + res); } } From cffb2fafb726c898fec1c5ae33717741f94fda83 Mon Sep 17 00:00:00 2001 From: Randy Dunlap Date: Fri, 10 Apr 2009 15:17:50 -0700 Subject: [PATCH 6/8] docbooks: add/fix PCI kernel-doc Add drivers/pci/*.c source files to DocBook/kernel-api.tmpl and update those pci/*.c source files that need kernel-doc fixes. Signed-off-by: Randy Dunlap Signed-off-by: Jesse Barnes --- Documentation/DocBook/kernel-api.tmpl | 6 +++++- drivers/pci/access.c | 4 ++-- drivers/pci/htirq.c | 1 + drivers/pci/pci-sysfs.c | 12 ++++++++---- drivers/pci/slot.c | 4 ++-- 5 files changed, 18 insertions(+), 9 deletions(-) diff --git a/Documentation/DocBook/kernel-api.tmpl b/Documentation/DocBook/kernel-api.tmpl index d6ac5d61820e..44b3def961a2 100644 --- a/Documentation/DocBook/kernel-api.tmpl +++ b/Documentation/DocBook/kernel-api.tmpl @@ -190,16 +190,20 @@ X!Ekernel/module.c !Edrivers/pci/pci.c !Edrivers/pci/pci-driver.c !Edrivers/pci/remove.c -!Edrivers/pci/pci-acpi.c !Edrivers/pci/search.c !Edrivers/pci/msi.c !Edrivers/pci/bus.c +!Edrivers/pci/access.c +!Edrivers/pci/irq.c +!Edrivers/pci/htirq.c !Edrivers/pci/probe.c +!Edrivers/pci/slot.c !Edrivers/pci/rom.c !Edrivers/pci/iov.c +!Idrivers/pci/pci-sysfs.c PCI Hotplug Support Library !Edrivers/pci/hotplug/pci_hotplug_core.c diff --git a/drivers/pci/access.c b/drivers/pci/access.c index 64dd7df90e62..0f3706512686 100644 --- a/drivers/pci/access.c +++ b/drivers/pci/access.c @@ -87,8 +87,8 @@ EXPORT_SYMBOL(pci_read_vpd); * pci_write_vpd - Write entry to Vital Product Data * @dev: pci device struct * @pos: offset in vpd space - * @count: number of bytes to read - * @val: value to write + * @count: number of bytes to write + * @buf: buffer containing write data * */ ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf) diff --git a/drivers/pci/htirq.c b/drivers/pci/htirq.c index bf7d6ce9bbb3..6808d8333ecc 100644 --- a/drivers/pci/htirq.c +++ b/drivers/pci/htirq.c @@ -158,6 +158,7 @@ int ht_create_irq(struct pci_dev *dev, int idx) /** * ht_destroy_irq - destroy an irq created with ht_create_irq + * @irq: irq to be destroyed * * This reverses ht_create_irq removing the specified irq from * existence. The irq should be free before this happens. diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c index a7eb1b46a5a8..85ebd02a64a7 100644 --- a/drivers/pci/pci-sysfs.c +++ b/drivers/pci/pci-sysfs.c @@ -492,6 +492,7 @@ write_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr, /** * pci_read_legacy_io - read byte(s) from legacy I/O port space * @kobj: kobject corresponding to file to read from + * @bin_attr: struct bin_attribute for this file * @buf: buffer to store results * @off: offset into legacy I/O port space * @count: number of bytes to read @@ -517,6 +518,7 @@ pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr, /** * pci_write_legacy_io - write byte(s) to legacy I/O port space * @kobj: kobject corresponding to file to read from + * @bin_attr: struct bin_attribute for this file * @buf: buffer containing value to be written * @off: offset into legacy I/O port space * @count: number of bytes to write @@ -733,9 +735,9 @@ pci_mmap_resource_wc(struct kobject *kobj, struct bin_attribute *attr, /** * pci_remove_resource_files - cleanup resource files - * @dev: dev to cleanup + * @pdev: dev to cleanup * - * If we created resource files for @dev, remove them from sysfs and + * If we created resource files for @pdev, remove them from sysfs and * free their resources. */ static void @@ -793,9 +795,9 @@ static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine) /** * pci_create_resource_files - create resource files in sysfs for @dev - * @dev: dev in question + * @pdev: dev in question * - * Walk the resources in @dev creating files for each resource available. + * Walk the resources in @pdev creating files for each resource available. */ static int pci_create_resource_files(struct pci_dev *pdev) { @@ -829,6 +831,7 @@ void __weak pci_remove_resource_files(struct pci_dev *dev) { return; } /** * pci_write_rom - used to enable access to the PCI ROM display * @kobj: kernel object handle + * @bin_attr: struct bin_attribute for this file * @buf: user input * @off: file offset * @count: number of byte in input @@ -852,6 +855,7 @@ pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr, /** * pci_read_rom - read a PCI ROM * @kobj: kernel object handle + * @bin_attr: struct bin_attribute for this file * @buf: where to put the data we read from the ROM * @off: file offset * @count: number of bytes to read diff --git a/drivers/pci/slot.c b/drivers/pci/slot.c index 21189447e545..fe95ce20bcbd 100644 --- a/drivers/pci/slot.c +++ b/drivers/pci/slot.c @@ -264,8 +264,8 @@ EXPORT_SYMBOL_GPL(pci_create_slot); /** * pci_renumber_slot - update %struct pci_slot -> number - * @slot - %struct pci_slot to update - * @slot_nr - new number for slot + * @slot: &struct pci_slot to update + * @slot_nr: new number for slot * * The primary purpose of this interface is to allow callers who earlier * created a placeholder slot in pci_create_slot() by passing a -1 as From b10ceb5530df7ee6e81f92910589a34dd3e5690b Mon Sep 17 00:00:00 2001 From: Yinghai Lu Date: Mon, 20 Apr 2009 18:35:40 -0700 Subject: [PATCH 7/8] x86/PCI: don't bother with root quirks if _CRS is used It will be overwriten later if _CRS is used, so don't bother to set it. Signed-off-by: Yinghai Lu Signed-off-by: Jesse Barnes --- arch/x86/pci/amd_bus.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/x86/pci/amd_bus.c b/arch/x86/pci/amd_bus.c index e121ee050f7c..f893d6a6e803 100644 --- a/arch/x86/pci/amd_bus.c +++ b/arch/x86/pci/amd_bus.c @@ -100,6 +100,10 @@ void x86_pci_root_bus_res_quirks(struct pci_bus *b) int j; struct pci_root_info *info; + /* don't go for it if _CRS is used */ + if (pci_probe & PCI_USE__CRS) + return; + /* if only one root bus, don't need to anything */ if (pci_root_num < 2) return; From 1b6b8ce2ac372ea1f2065b89228ede105eb68dc5 Mon Sep 17 00:00:00 2001 From: Yu Zhao Date: Thu, 9 Apr 2009 14:57:39 +0800 Subject: [PATCH 8/8] PCI: only save/restore existent registers in the PCIe capability PCIe 1.1 base neither requires the endpoint to implement the entire PCIe capability structure nor specifies default values of registers that are not implemented by the device. So we only save and restore registers that must be implemented by different device types if the device PCIe capability version is 1. PCIe 1.1 Capability Structure Expansion ECN and PCIe 2.0 requires all registers in the PCIe capability to be either implemented or hardwired to 0. Their PCIe capability version is 2. Signed-off-by: Yu Zhao Signed-off-by: Jesse Barnes --- drivers/pci/pci.c | 70 ++++++++++++++++++++++++++++++++-------- include/linux/pci_regs.h | 1 + 2 files changed, 57 insertions(+), 14 deletions(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 16fd0d4c3166..34bf0fdf5047 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -681,11 +681,34 @@ EXPORT_SYMBOL(pci_choose_state); #define PCI_EXP_SAVE_REGS 7 +#define pcie_cap_has_devctl(type, flags) 1 +#define pcie_cap_has_lnkctl(type, flags) \ + ((flags & PCI_EXP_FLAGS_VERS) > 1 || \ + (type == PCI_EXP_TYPE_ROOT_PORT || \ + type == PCI_EXP_TYPE_ENDPOINT || \ + type == PCI_EXP_TYPE_LEG_END)) +#define pcie_cap_has_sltctl(type, flags) \ + ((flags & PCI_EXP_FLAGS_VERS) > 1 || \ + ((type == PCI_EXP_TYPE_ROOT_PORT) || \ + (type == PCI_EXP_TYPE_DOWNSTREAM && \ + (flags & PCI_EXP_FLAGS_SLOT)))) +#define pcie_cap_has_rtctl(type, flags) \ + ((flags & PCI_EXP_FLAGS_VERS) > 1 || \ + (type == PCI_EXP_TYPE_ROOT_PORT || \ + type == PCI_EXP_TYPE_RC_EC)) +#define pcie_cap_has_devctl2(type, flags) \ + ((flags & PCI_EXP_FLAGS_VERS) > 1) +#define pcie_cap_has_lnkctl2(type, flags) \ + ((flags & PCI_EXP_FLAGS_VERS) > 1) +#define pcie_cap_has_sltctl2(type, flags) \ + ((flags & PCI_EXP_FLAGS_VERS) > 1) + static int pci_save_pcie_state(struct pci_dev *dev) { int pos, i = 0; struct pci_cap_saved_state *save_state; u16 *cap; + u16 flags; pos = pci_find_capability(dev, PCI_CAP_ID_EXP); if (pos <= 0) @@ -698,13 +721,22 @@ static int pci_save_pcie_state(struct pci_dev *dev) } cap = (u16 *)&save_state->data[0]; - pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &cap[i++]); - pci_read_config_word(dev, pos + PCI_EXP_LNKCTL, &cap[i++]); - pci_read_config_word(dev, pos + PCI_EXP_SLTCTL, &cap[i++]); - pci_read_config_word(dev, pos + PCI_EXP_RTCTL, &cap[i++]); - pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &cap[i++]); - pci_read_config_word(dev, pos + PCI_EXP_LNKCTL2, &cap[i++]); - pci_read_config_word(dev, pos + PCI_EXP_SLTCTL2, &cap[i++]); + pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &flags); + + if (pcie_cap_has_devctl(dev->pcie_type, flags)) + pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &cap[i++]); + if (pcie_cap_has_lnkctl(dev->pcie_type, flags)) + pci_read_config_word(dev, pos + PCI_EXP_LNKCTL, &cap[i++]); + if (pcie_cap_has_sltctl(dev->pcie_type, flags)) + pci_read_config_word(dev, pos + PCI_EXP_SLTCTL, &cap[i++]); + if (pcie_cap_has_rtctl(dev->pcie_type, flags)) + pci_read_config_word(dev, pos + PCI_EXP_RTCTL, &cap[i++]); + if (pcie_cap_has_devctl2(dev->pcie_type, flags)) + pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &cap[i++]); + if (pcie_cap_has_lnkctl2(dev->pcie_type, flags)) + pci_read_config_word(dev, pos + PCI_EXP_LNKCTL2, &cap[i++]); + if (pcie_cap_has_sltctl2(dev->pcie_type, flags)) + pci_read_config_word(dev, pos + PCI_EXP_SLTCTL2, &cap[i++]); return 0; } @@ -714,6 +746,7 @@ static void pci_restore_pcie_state(struct pci_dev *dev) int i = 0, pos; struct pci_cap_saved_state *save_state; u16 *cap; + u16 flags; save_state = pci_find_saved_cap(dev, PCI_CAP_ID_EXP); pos = pci_find_capability(dev, PCI_CAP_ID_EXP); @@ -721,13 +754,22 @@ static void pci_restore_pcie_state(struct pci_dev *dev) return; cap = (u16 *)&save_state->data[0]; - pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, cap[i++]); - pci_write_config_word(dev, pos + PCI_EXP_LNKCTL, cap[i++]); - pci_write_config_word(dev, pos + PCI_EXP_SLTCTL, cap[i++]); - pci_write_config_word(dev, pos + PCI_EXP_RTCTL, cap[i++]); - pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, cap[i++]); - pci_write_config_word(dev, pos + PCI_EXP_LNKCTL2, cap[i++]); - pci_write_config_word(dev, pos + PCI_EXP_SLTCTL2, cap[i++]); + pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &flags); + + if (pcie_cap_has_devctl(dev->pcie_type, flags)) + pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, cap[i++]); + if (pcie_cap_has_lnkctl(dev->pcie_type, flags)) + pci_write_config_word(dev, pos + PCI_EXP_LNKCTL, cap[i++]); + if (pcie_cap_has_sltctl(dev->pcie_type, flags)) + pci_write_config_word(dev, pos + PCI_EXP_SLTCTL, cap[i++]); + if (pcie_cap_has_rtctl(dev->pcie_type, flags)) + pci_write_config_word(dev, pos + PCI_EXP_RTCTL, cap[i++]); + if (pcie_cap_has_devctl2(dev->pcie_type, flags)) + pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, cap[i++]); + if (pcie_cap_has_lnkctl2(dev->pcie_type, flags)) + pci_write_config_word(dev, pos + PCI_EXP_LNKCTL2, cap[i++]); + if (pcie_cap_has_sltctl2(dev->pcie_type, flags)) + pci_write_config_word(dev, pos + PCI_EXP_SLTCTL2, cap[i++]); } diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h index e4d08c1b2e0b..616bf8b3c8b5 100644 --- a/include/linux/pci_regs.h +++ b/include/linux/pci_regs.h @@ -376,6 +376,7 @@ #define PCI_EXP_TYPE_DOWNSTREAM 0x6 /* Downstream Port */ #define PCI_EXP_TYPE_PCI_BRIDGE 0x7 /* PCI/PCI-X Bridge */ #define PCI_EXP_TYPE_RC_END 0x9 /* Root Complex Integrated Endpoint */ +#define PCI_EXP_TYPE_RC_EC 0x10 /* Root Complex Event Collector */ #define PCI_EXP_FLAGS_SLOT 0x0100 /* Slot implemented */ #define PCI_EXP_FLAGS_IRQ 0x3e00 /* Interrupt message number */ #define PCI_EXP_DEVCAP 4 /* Device capabilities */