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powerpc/fsl: update crypto node definition and device tree instances 

delete obsolete device-type property, delete model property
(use compatible property instead), prepend "fsl," to Freescale
specific properties. Add nodes to device trees that are missing them,
and fix broken property values in other trees.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
hifive-unleashed-5.1
Kim Phillips 2008-07-08 19:13:33 -05:00 committed by Kumar Gala
parent d0fc2eaaf4
commit 3fd44736db
27 changed files with 268 additions and 143 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

68
Documentation/powerpc/dts-bindings/fsl/sec.txt 100644
View File

@ -0,0 +1,68 @@
Freescale SoC SEC Security Engines
Required properties:
- compatible : Should contain entries for this and backward compatible
SEC versions, high to low, e.g., "fsl,sec2.1", "fsl,sec2.0"
- reg : Offset and length of the register set for the device
- interrupts : the SEC's interrupt number
- fsl,num-channels : An integer representing the number of channels
available.
- fsl,channel-fifo-len : An integer representing the number of
descriptor pointers each channel fetch fifo can hold.
- fsl,exec-units-mask : The bitmask representing what execution units
(EUs) are available. It's a single 32-bit cell. EU information
should be encoded following the SEC's Descriptor Header Dword
EU_SEL0 field documentation, i.e. as follows:
bit 0 = reserved - should be 0
bit 1 = set if SEC has the ARC4 EU (AFEU)
bit 2 = set if SEC has the DES/3DES EU (DEU)
bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
bit 4 = set if SEC has the random number generator EU (RNG)
bit 5 = set if SEC has the public key EU (PKEU)
bit 6 = set if SEC has the AES EU (AESU)
bit 7 = set if SEC has the Kasumi EU (KEU)
bit 8 = set if SEC has the CRC EU (CRCU)
bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B)
remaining bits are reserved for future SEC EUs.
- fsl,descriptor-types-mask : The bitmask representing what descriptors
are available. It's a single 32-bit cell. Descriptor type information
should be encoded following the SEC's Descriptor Header Dword DESC_TYPE
field documentation, i.e. as follows:
bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type
bit 1 = set if SEC supports the ipsec_esp descriptor type
bit 2 = set if SEC supports the common_nonsnoop desc. type
bit 3 = set if SEC supports the 802.11i AES ccmp desc. type
bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type
bit 5 = set if SEC supports the srtp descriptor type
bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type
bit 7 = set if SEC supports the pkeu_assemble descriptor type
bit 8 = set if SEC supports the aesu_key_expand_output desc.type
bit 9 = set if SEC supports the pkeu_ptmul descriptor type
bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
..and so on and so forth.
Optional properties:
- interrupt-parent : the phandle for the interrupt controller that
services interrupts for this device.
Example:
/* MPC8548E */
crypto@30000 {
compatible = "fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <29 2>;
interrupt-parent = <&mpic>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0xfe>;
fsl,descriptor-types-mask = <0x12b0ebf>;
};

21
arch/powerpc/boot/dts/mpc8272ads.dts
View File

@ -237,22 +237,15 @@
compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic";
};
/* May need to remove if on a part without crypto engine */
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "fsl,mpc8272-talitos-sec2",
"fsl,talitos-sec2",
"fsl,talitos",
"talitos";
reg = <0x30000 0x10000>;
interrupts = <11 8>;
compatible = "fsl,sec1.0";
reg = <0x40000 0x13000>;
interrupts = <47 0x8>;
interrupt-parent = <&PIC>;
num-channels = <4>;
channel-fifo-len = <24>;
exec-units-mask = <0x7e>;
/* desc mask is for rev1.x, we need runtime fixup for >=2.x */
descriptor-types-mask = <0x1010ebf>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x7e>;
fsl,descriptor-types-mask = <0x1010415>;
};
};

15
arch/powerpc/boot/dts/mpc8313erdb.dts
View File

@ -254,17 +254,14 @@
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
reg = <0x30000 0x7000>;
compatible = "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
/* Rev. 2.2 */
num-channels = <1>;
channel-fifo-len = <24>;
exec-units-mask = <0x0000004c>;
descriptor-types-mask = <0x0122003f>;
fsl,num-channels = <1>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x4c>;
fsl,descriptor-types-mask = <0x0122003f>;
};
/* IPIC

15
arch/powerpc/boot/dts/mpc8315erdb.dts
View File

@ -241,17 +241,16 @@
};
crypto@30000 {
model = "SEC3";
device_type = "crypto";
compatible = "talitos";
compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0",
"fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
"fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
/* Rev. 3.0 geometry */
num-channels = <4>;
channel-fifo-len = <24>;
exec-units-mask = <0x000001fe>;
descriptor-types-mask = <0x03ab0ebf>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x97c>;
fsl,descriptor-types-mask = <0x3ab0abf>;
};
sata@18000 {

15
arch/powerpc/boot/dts/mpc832x_mds.dts
View File

@ -150,17 +150,14 @@
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
reg = <0x30000 0x7000>;
compatible = "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
/* Rev. 2.2 */
num-channels = <1>;
channel-fifo-len = <24>;
exec-units-mask = <0x0000004c>;
descriptor-types-mask = <0x0122003f>;
fsl,num-channels = <1>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x4c>;
fsl,descriptor-types-mask = <0x0122003f>;
};
ipic: pic@700 {

15
arch/powerpc/boot/dts/mpc832x_rdb.dts
View File

@ -128,17 +128,14 @@
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
reg = <0x30000 0x7000>;
compatible = "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
/* Rev. 2.2 */
num-channels = <1>;
channel-fifo-len = <24>;
exec-units-mask = <0x0000004c>;
descriptor-types-mask = <0x0122003f>;
fsl,num-channels = <1>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x4c>;
fsl,descriptor-types-mask = <0x0122003f>;
};
ipic:pic@700 {

12
arch/powerpc/boot/dts/mpc8349emitx.dts
View File

@ -213,16 +213,14 @@
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
compatible = "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
num-channels = <4>;
channel-fifo-len = <24>;
exec-units-mask = <0x0000007e>;
descriptor-types-mask = <0x01010ebf>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x7e>;
fsl,descriptor-types-mask = <0x01010ebf>;
};
ipic: pic@700 {

12
arch/powerpc/boot/dts/mpc8349emitxgp.dts
View File

@ -186,16 +186,14 @@
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
compatible = "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
num-channels = <4>;
channel-fifo-len = <24>;
exec-units-mask = <0x0000007e>;
descriptor-types-mask = <0x01010ebf>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x7e>;
fsl,descriptor-types-mask = <0x01010ebf>;
};
ipic: pic@700 {

15
arch/powerpc/boot/dts/mpc834x_mds.dts
View File

@ -228,20 +228,15 @@
interrupt-parent = <&ipic>;
};
/* May need to remove if on a part without crypto engine */
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
compatible = "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
num-channels = <4>;
channel-fifo-len = <24>;
exec-units-mask = <0x0000007e>;
/* desc mask is for rev2.0,
* we need runtime fixup for >2.0 */
descriptor-types-mask = <0x01010ebf>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x7e>;
fsl,descriptor-types-mask = <0x01010ebf>;
};
/* IPIC

13
arch/powerpc/boot/dts/mpc836x_mds.dts
View File

@ -154,17 +154,14 @@
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
compatible = "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
num-channels = <4>;
channel-fifo-len = <24>;
exec-units-mask = <0x0000007e>;
/* desc mask is for rev1.x, we need runtime fixup for >=2.x */
descriptor-types-mask = <0x01010ebf>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x7e>;
fsl,descriptor-types-mask = <0x01010ebf>;
};
ipic: pic@700 {

13
arch/powerpc/boot/dts/mpc8377_mds.dts
View File

@ -269,16 +269,15 @@
};
crypto@30000 {
model = "SEC3";
compatible = "talitos";
compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
"fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
/* Rev. 3.0 geometry */
num-channels = <4>;
channel-fifo-len = <24>;
exec-units-mask = <0x000001fe>;
descriptor-types-mask = <0x03ab0ebf>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x9fe>;
fsl,descriptor-types-mask = <0x3ab0ebf>;
};
sdhc@2e000 {

14
arch/powerpc/boot/dts/mpc8377_rdb.dts
View File

@ -248,17 +248,15 @@
};
crypto@30000 {
model = "SEC3";
device_type = "crypto";
compatible = "talitos";
compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
"fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
/* Rev. 3.0 geometry */
num-channels = <4>;
channel-fifo-len = <24>;
exec-units-mask = <0x000001fe>;
descriptor-types-mask = <0x03ab0ebf>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x9fe>;
fsl,descriptor-types-mask = <0x3ab0ebf>;
};
sata@18000 {

13
arch/powerpc/boot/dts/mpc8378_mds.dts
View File

@ -269,16 +269,15 @@
};
crypto@30000 {
model = "SEC3";
compatible = "talitos";
compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
"fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
/* Rev. 3.0 geometry */
num-channels = <4>;
channel-fifo-len = <24>;
exec-units-mask = <0x000001fe>;
descriptor-types-mask = <0x03ab0ebf>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x9fe>;
fsl,descriptor-types-mask = <0x3ab0ebf>;
};
sdhc@2e000 {

14
arch/powerpc/boot/dts/mpc8378_rdb.dts
View File

@ -248,17 +248,15 @@
};
crypto@30000 {
model = "SEC3";
device_type = "crypto";
compatible = "talitos";
compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
"fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
/* Rev. 3.0 geometry */
num-channels = <4>;
channel-fifo-len = <24>;
exec-units-mask = <0x000001fe>;
descriptor-types-mask = <0x03ab0ebf>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x9fe>;
fsl,descriptor-types-mask = <0x3ab0ebf>;
};
/* IPIC

13
arch/powerpc/boot/dts/mpc8379_mds.dts
View File

@ -269,16 +269,15 @@
};
crypto@30000 {
model = "SEC3";
compatible = "talitos";
compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
"fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
/* Rev. 3.0 geometry */
num-channels = <4>;
channel-fifo-len = <24>;
exec-units-mask = <0x000001fe>;
descriptor-types-mask = <0x03ab0ebf>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x9fe>;
fsl,descriptor-types-mask = <0x3ab0ebf>;
};
sdhc@2e000 {

14
arch/powerpc/boot/dts/mpc8379_rdb.dts
View File

@ -248,17 +248,15 @@
};
crypto@30000 {
model = "SEC3";
device_type = "crypto";
compatible = "talitos";
compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
"fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
/* Rev. 3.0 geometry */
num-channels = <4>;
channel-fifo-len = <24>;
exec-units-mask = <0x000001fe>;
descriptor-types-mask = <0x03ab0ebf>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x9fe>;
fsl,descriptor-types-mask = <0x3ab0ebf>;
};
sata@18000 {

12
arch/powerpc/boot/dts/mpc8536ds.dts
View File

@ -231,6 +231,18 @@
interrupt-parent = <&mpic>;
};
crypto@30000 {
compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
"fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <45 2 58 2>;
interrupt-parent = <&mpic>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x9fe>;
fsl,descriptor-types-mask = <0x3ab0ebf>;
};
sata@18000 {
compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
reg = <0x18000 0x1000>;

11
arch/powerpc/boot/dts/mpc8541cds.dts
View File

@ -189,6 +189,17 @@
interrupt-parent = <&mpic>;
};
crypto@30000 {
compatible = "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <45 2>;
interrupt-parent = <&mpic>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x7e>;
fsl,descriptor-types-mask = <0x01010ebf>;
};
mpic: pic@40000 {
interrupt-controller;
#address-cells = <0>;

11
arch/powerpc/boot/dts/mpc8544ds.dts
View File

@ -210,6 +210,17 @@
fsl,has-rstcr;
};
crypto@30000 {
compatible = "fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <45 2>;
interrupt-parent = <&mpic>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0xfe>;
fsl,descriptor-types-mask = <0x12b0ebf>;
};
mpic: pic@40000 {
interrupt-controller;
#address-cells = <0>;

11
arch/powerpc/boot/dts/mpc8548cds.dts
View File

@ -249,6 +249,17 @@
fsl,has-rstcr;
};
crypto@30000 {
compatible = "fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <45 2>;
interrupt-parent = <&mpic>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0xfe>;
fsl,descriptor-types-mask = <0x12b0ebf>;
};
mpic: pic@40000 {
interrupt-controller;
#address-cells = <0>;

11
arch/powerpc/boot/dts/mpc8555cds.dts
View File

@ -189,6 +189,17 @@
interrupt-parent = <&mpic>;
};
crypto@30000 {
compatible = "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <45 2>;
interrupt-parent = <&mpic>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x7e>;
fsl,descriptor-types-mask = <0x01010ebf>;
};
mpic: pic@40000 {
interrupt-controller;
#address-cells = <0>;

14
arch/powerpc/boot/dts/mpc8568mds.dts
View File

@ -231,16 +231,14 @@
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
reg = <0x30000 0xf000>;
compatible = "fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <45 2>;
interrupt-parent = <&mpic>;
num-channels = <4>;
channel-fifo-len = <24>;
exec-units-mask = <0xfe>;
descriptor-types-mask = <0x12b0ebf>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0xfe>;
fsl,descriptor-types-mask = <0x12b0ebf>;
};
mpic: pic@40000 {

12
arch/powerpc/boot/dts/mpc8572ds.dts
View File

@ -321,6 +321,18 @@
interrupt-parent = <&mpic>;
};
crypto@30000 {
compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
"fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <45 2 58 2>;
interrupt-parent = <&mpic>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x9fe>;
fsl,descriptor-types-mask = <0x3ab0ebf>;
};
mpic: pic@40000 {
interrupt-controller;
#address-cells = <0>;

14
arch/powerpc/boot/dts/sbc8349.dts
View File

@ -221,19 +221,15 @@
interrupt-parent = <&ipic>;
};
/* May need to remove if on a part without crypto engine */
crypto@30000 {
model = "SEC2";
compatible = "talitos";
compatible = "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
num-channels = <4>;
channel-fifo-len = <24>;
exec-units-mask = <0x0000007e>;
/* desc mask is for rev2.0,
* we need runtime fixup for >2.0 */
descriptor-types-mask = <0x01010ebf>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x7e>;
fsl,descriptor-types-mask = <0x01010ebf>;
};
/* IPIC

11
arch/powerpc/boot/dts/sbc8548.dts
View File

@ -304,6 +304,17 @@
fsl,has-rstcr;
};
crypto@30000 {
compatible = "fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <45 2>;
interrupt-parent = <&mpic>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0xfe>;
fsl,descriptor-types-mask = <0x12b0ebf>;
};
mpic: pic@40000 {
interrupt-controller;
#address-cells = <0>;

11
arch/powerpc/boot/dts/tqm8541.dts
View File

@ -200,6 +200,17 @@
interrupt-parent = <&mpic>;
};
crypto@30000 {
compatible = "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <45 2>;
interrupt-parent = <&mpic>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x7e>;
fsl,descriptor-types-mask = <0x01010ebf>;
};
mpic: pic@40000 {
interrupt-controller;
#address-cells = <0>;

11
arch/powerpc/boot/dts/tqm8555.dts
View File

@ -200,6 +200,17 @@
interrupt-parent = <&mpic>;
};
crypto@30000 {
compatible = "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <45 2>;
interrupt-parent = <&mpic>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x7e>;
fsl,descriptor-types-mask = <0x01010ebf>;
};
mpic: pic@40000 {
interrupt-controller;
#address-cells = <0>;