staging: comedi: comedi.h: checkpatch.pl --strict cleanup
Fix the checkpatch.pl --strict issues: CHECK: Please use a blank line after function/struct/union/enum declarations For aesthetics, convert the inline functions into simple macros. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Cc: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>hifive-unleashed-5.1
H Hartley Sweeten
Greg Kroah-Hartman
parent
663dfc0505
commit
40af57a27b
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@ -551,21 +551,8 @@ enum i8254_mode {
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I8254_BINARY = 0
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};
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static inline unsigned NI_USUAL_PFI_SELECT(unsigned pfi_channel)
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{
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if (pfi_channel < 10)
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return 0x1 + pfi_channel;
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return 0xb + pfi_channel;
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}
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static inline unsigned NI_USUAL_RTSI_SELECT(unsigned rtsi_channel)
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{
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if (rtsi_channel < 7)
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return 0xb + rtsi_channel;
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return 0x1b;
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}
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#define NI_USUAL_PFI_SELECT(x) (((x) < 10) ? (0x1 + (x)) : (0xb + (x)))
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#define NI_USUAL_RTSI_SELECT(x) (((x) < 7) ? (0xb + (x)) : 0x1b)
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/* mode bits for NI general-purpose counters, set with
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* INSN_CONFIG_SET_COUNTER_MODE */
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@ -659,20 +646,14 @@ enum ni_gpct_clock_source_bits {
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NI_GPCT_PRESCALE_X8_CLOCK_SRC_BITS = 0x20000000,
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NI_GPCT_INVERT_CLOCK_SRC_BIT = 0x80000000
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};
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static inline unsigned NI_GPCT_SOURCE_PIN_CLOCK_SRC_BITS(unsigned n)
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{
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/* NI 660x-specific */
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return 0x10 + n;
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}
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static inline unsigned NI_GPCT_RTSI_CLOCK_SRC_BITS(unsigned n)
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{
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return 0x18 + n;
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}
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static inline unsigned NI_GPCT_PFI_CLOCK_SRC_BITS(unsigned n)
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{
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/* no pfi on NI 660x */
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return 0x20 + n;
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}
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/* NI 660x-specific */
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#define NI_GPCT_SOURCE_PIN_CLOCK_SRC_BITS(x) (0x10 + (x))
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#define NI_GPCT_RTSI_CLOCK_SRC_BITS(x) (0x18 + (x))
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/* no pfi on NI 660x */
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#define NI_GPCT_PFI_CLOCK_SRC_BITS(x) (0x20 + (x))
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/* Possibilities for setting a gate source with
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INSN_CONFIG_SET_GATE_SRC when using NI general-purpose counters.
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@ -698,22 +679,11 @@ enum ni_gpct_gate_select {
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* known. */
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NI_GPCT_DISABLED_GATE_SELECT = 0x8000,
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};
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static inline unsigned NI_GPCT_GATE_PIN_GATE_SELECT(unsigned n)
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{
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return 0x102 + n;
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}
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static inline unsigned NI_GPCT_RTSI_GATE_SELECT(unsigned n)
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{
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return NI_USUAL_RTSI_SELECT(n);
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}
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static inline unsigned NI_GPCT_PFI_GATE_SELECT(unsigned n)
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{
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return NI_USUAL_PFI_SELECT(n);
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}
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static inline unsigned NI_GPCT_UP_DOWN_PIN_GATE_SELECT(unsigned n)
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{
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return 0x202 + n;
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}
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#define NI_GPCT_GATE_PIN_GATE_SELECT(x) (0x102 + (x))
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#define NI_GPCT_RTSI_GATE_SELECT(x) NI_USUAL_RTSI_SELECT(x)
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#define NI_GPCT_PFI_GATE_SELECT(x) NI_USUAL_PFI_SELECT(x)
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#define NI_GPCT_UP_DOWN_PIN_GATE_SELECT(x) (0x202 + (x))
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/* Possibilities for setting a source with
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INSN_CONFIG_SET_OTHER_SRC when using NI general-purpose counters. */
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@ -722,15 +692,14 @@ enum ni_gpct_other_index {
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NI_GPCT_SOURCE_ENCODER_B,
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NI_GPCT_SOURCE_ENCODER_Z
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};
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enum ni_gpct_other_select {
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/* m-series gates */
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/* Still unknown, probably only need NI_GPCT_PFI_OTHER_SELECT */
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NI_GPCT_DISABLED_OTHER_SELECT = 0x8000,
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};
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static inline unsigned NI_GPCT_PFI_OTHER_SELECT(unsigned n)
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{
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return NI_USUAL_PFI_SELECT(n);
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}
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#define NI_GPCT_PFI_OTHER_SELECT(x) NI_USUAL_PFI_SELECT(x)
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/* start sources for ni general-purpose counters for use with
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INSN_CONFIG_ARM */
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@ -777,10 +746,8 @@ enum ni_mio_clock_source {
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NI_MIO_PLL_PXI10_CLOCK = 3,
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NI_MIO_PLL_RTSI0_CLOCK = 4
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};
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static inline unsigned NI_MIO_PLL_RTSI_CLOCK(unsigned rtsi_channel)
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{
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return NI_MIO_PLL_RTSI0_CLOCK + rtsi_channel;
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}
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#define NI_MIO_PLL_RTSI_CLOCK(x) (NI_MIO_PLL_RTSI0_CLOCK + (x))
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/* Signals which can be routed to an NI RTSI pin with INSN_CONFIG_SET_ROUTING.
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The numbers assigned are not arbitrary, they correspond to the bits required
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@ -798,10 +765,8 @@ enum ni_rtsi_routing {
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NI_RTSI_OUTPUT_RTSI_OSC = 12 /* pre-m-series always have RTSI
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* clock on line 7 */
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};
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static inline unsigned NI_RTSI_OUTPUT_RTSI_BRD(unsigned n)
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{
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return NI_RTSI_OUTPUT_RTSI_BRD_0 + n;
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}
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#define NI_RTSI_OUTPUT_RTSI_BRD(x) (NI_RTSI_OUTPUT_RTSI_BRD_0 + (x))
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/* Signals which can be routed to an NI PFI pin on an m-series board with
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* INSN_CONFIG_SET_ROUTING. These numbers are also returned by
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@ -834,10 +799,8 @@ enum ni_pfi_routing {
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NI_PFI_OUTPUT_CDI_SAMPLE = 29,
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NI_PFI_OUTPUT_CDO_UPDATE = 30
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};
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static inline unsigned NI_PFI_OUTPUT_RTSI(unsigned rtsi_channel)
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{
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return NI_PFI_OUTPUT_RTSI0 + rtsi_channel;
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}
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#define NI_PFI_OUTPUT_RTSI(x) (NI_PFI_OUTPUT_RTSI0 + (x))
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/* Signals which can be routed to output on a NI PFI pin on a 660x board
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with INSN_CONFIG_SET_ROUTING. The numbers assigned are
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@ -853,14 +816,8 @@ enum ni_660x_pfi_routing {
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/* NI External Trigger lines. These values are not arbitrary, but are related
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* to the bits required to program the board (offset by 1 for historical
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* reasons). */
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static inline unsigned NI_EXT_PFI(unsigned pfi_channel)
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{
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return NI_USUAL_PFI_SELECT(pfi_channel) - 1;
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}
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static inline unsigned NI_EXT_RTSI(unsigned rtsi_channel)
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{
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return NI_USUAL_RTSI_SELECT(rtsi_channel) - 1;
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}
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#define NI_EXT_PFI(x) (NI_USUAL_PFI_SELECT(x) - 1)
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#define NI_EXT_RTSI(x) (NI_USUAL_RTSI_SELECT(x) - 1)
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/* status bits for INSN_CONFIG_GET_COUNTER_STATUS */
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enum comedi_counter_status_flags {
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@ -884,26 +841,15 @@ enum ni_m_series_cdio_scan_begin_src {
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NI_CDIO_SCAN_BEGIN_SRC_FREQ_OUT = 32,
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NI_CDIO_SCAN_BEGIN_SRC_DIO_CHANGE_DETECT_IRQ = 33
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};
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static inline unsigned NI_CDIO_SCAN_BEGIN_SRC_PFI(unsigned pfi_channel)
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{
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return NI_USUAL_PFI_SELECT(pfi_channel);
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}
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static inline unsigned NI_CDIO_SCAN_BEGIN_SRC_RTSI(unsigned rtsi_channel)
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{
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return NI_USUAL_RTSI_SELECT(rtsi_channel);
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}
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#define NI_CDIO_SCAN_BEGIN_SRC_PFI(x) NI_USUAL_PFI_SELECT(x)
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#define NI_CDIO_SCAN_BEGIN_SRC_RTSI(x) NI_USUAL_RTSI_SELECT(x)
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/* scan_begin_src for scan_begin_arg==TRIG_EXT with analog output command on NI
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* boards. These scan begin sources can also be bitwise-or'd with CR_INVERT to
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* change polarity. */
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static inline unsigned NI_AO_SCAN_BEGIN_SRC_PFI(unsigned pfi_channel)
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{
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return NI_USUAL_PFI_SELECT(pfi_channel);
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}
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static inline unsigned NI_AO_SCAN_BEGIN_SRC_RTSI(unsigned rtsi_channel)
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{
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return NI_USUAL_RTSI_SELECT(rtsi_channel);
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}
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#define NI_AO_SCAN_BEGIN_SRC_PFI(x) NI_USUAL_PFI_SELECT(x)
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#define NI_AO_SCAN_BEGIN_SRC_RTSI(x) NI_USUAL_RTSI_SELECT(x)
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/* Bits for setting a clock source with
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* INSN_CONFIG_SET_CLOCK_SRC when using NI frequency output subdevice. */
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