wil6210: add handling of RX HTRSH interrupt
RX_HTRSH interrupt is handled in exactly the same manner as RX_DONE interrupt - fetching accumulated packets from RX ring. In addition there's a rate limitted warning message. Signed-off-by: Vladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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4821e6d877
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40e391b433
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@ -32,6 +32,23 @@ void wil_err(struct wil6210_priv *wil, const char *fmt, ...)
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va_end(args);
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}
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void wil_err_ratelimited(struct wil6210_priv *wil, const char *fmt, ...)
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{
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if (net_ratelimit()) {
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struct net_device *ndev = wil_to_ndev(wil);
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struct va_format vaf = {
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.fmt = fmt,
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};
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va_list args;
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va_start(args, fmt);
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vaf.va = &args;
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netdev_err(ndev, "%pV", &vaf);
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trace_wil6210_log_err(&vaf);
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va_end(args);
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}
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}
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void wil_info(struct wil6210_priv *wil, const char *fmt, ...)
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{
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struct net_device *ndev = wil_to_ndev(wil);
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@ -36,7 +36,8 @@
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*/
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#define WIL6210_IRQ_DISABLE (0xFFFFFFFFUL)
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#define WIL6210_IMC_RX BIT_DMA_EP_RX_ICR_RX_DONE
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#define WIL6210_IMC_RX (BIT_DMA_EP_RX_ICR_RX_DONE | \
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BIT_DMA_EP_RX_ICR_RX_HTRSH)
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#define WIL6210_IMC_TX (BIT_DMA_EP_TX_ICR_TX_DONE | \
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BIT_DMA_EP_TX_ICR_TX_DONE_N(0))
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#define WIL6210_IMC_MISC (ISR_MISC_FW_READY | \
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@ -171,6 +172,7 @@ static irqreturn_t wil6210_irq_rx(int irq, void *cookie)
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u32 isr = wil_ioread32_and_clear(wil->csr +
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HOSTADDR(RGF_DMA_EP_RX_ICR) +
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offsetof(struct RGF_ICR, ICR));
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bool need_unmask = true;
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trace_wil6210_irq_rx(isr);
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wil_dbg_irq(wil, "ISR RX 0x%08x\n", isr);
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@ -182,12 +184,24 @@ static irqreturn_t wil6210_irq_rx(int irq, void *cookie)
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wil6210_mask_irq_rx(wil);
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if (isr & BIT_DMA_EP_RX_ICR_RX_DONE) {
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/* RX_DONE and RX_HTRSH interrupts are the same if interrupt
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* moderation is not used. Interrupt moderation may cause RX
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* buffer overflow while RX_DONE is delayed. The required
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* action is always the same - should empty the accumulated
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* packets from the RX ring.
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*/
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if (isr & (BIT_DMA_EP_RX_ICR_RX_DONE | BIT_DMA_EP_RX_ICR_RX_HTRSH)) {
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wil_dbg_irq(wil, "RX done\n");
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isr &= ~BIT_DMA_EP_RX_ICR_RX_DONE;
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if (isr & BIT_DMA_EP_RX_ICR_RX_HTRSH)
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wil_err_ratelimited(wil, "Received \"Rx buffer is in risk "
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"of overflow\" interrupt\n");
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isr &= ~(BIT_DMA_EP_RX_ICR_RX_DONE | BIT_DMA_EP_RX_ICR_RX_HTRSH);
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if (test_bit(wil_status_reset_done, &wil->status)) {
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if (test_bit(wil_status_napi_en, &wil->status)) {
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wil_dbg_txrx(wil, "NAPI(Rx) schedule\n");
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need_unmask = false;
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napi_schedule(&wil->napi_rx);
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} else {
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wil_err(wil, "Got Rx interrupt while "
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@ -204,6 +218,10 @@ static irqreturn_t wil6210_irq_rx(int irq, void *cookie)
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/* Rx IRQ will be enabled when NAPI processing finished */
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atomic_inc(&wil->isr_count_rx);
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if (unlikely(need_unmask))
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wil6210_unmask_irq_rx(wil);
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return IRQ_HANDLED;
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}
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@ -213,6 +231,7 @@ static irqreturn_t wil6210_irq_tx(int irq, void *cookie)
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u32 isr = wil_ioread32_and_clear(wil->csr +
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HOSTADDR(RGF_DMA_EP_TX_ICR) +
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offsetof(struct RGF_ICR, ICR));
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bool need_unmask = true;
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trace_wil6210_irq_tx(isr);
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wil_dbg_irq(wil, "ISR TX 0x%08x\n", isr);
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@ -231,6 +250,7 @@ static irqreturn_t wil6210_irq_tx(int irq, void *cookie)
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isr &= ~(BIT(25) - 1UL);
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if (test_bit(wil_status_reset_done, &wil->status)) {
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wil_dbg_txrx(wil, "NAPI(Tx) schedule\n");
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need_unmask = false;
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napi_schedule(&wil->napi_tx);
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} else {
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wil_err(wil, "Got Tx interrupt while in reset\n");
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@ -243,6 +263,10 @@ static irqreturn_t wil6210_irq_tx(int irq, void *cookie)
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/* Tx IRQ will be enabled when NAPI processing finished */
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atomic_inc(&wil->isr_count_tx);
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if (unlikely(need_unmask))
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wil6210_unmask_irq_tx(wil);
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return IRQ_HANDLED;
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}
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@ -126,6 +126,7 @@ struct RGF_ICR {
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#define BIT_DMA_EP_TX_ICR_TX_DONE_N(n) BIT(n+1) /* n = [0..23] */
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#define RGF_DMA_EP_RX_ICR (0x881bd0) /* struct RGF_ICR */
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#define BIT_DMA_EP_RX_ICR_RX_DONE BIT(0)
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#define BIT_DMA_EP_RX_ICR_RX_HTRSH BIT(1)
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#define RGF_DMA_EP_MISC_ICR (0x881bec) /* struct RGF_ICR */
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#define BIT_DMA_EP_MISC_ICR_RX_HTRSH BIT(0)
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#define BIT_DMA_EP_MISC_ICR_TX_NO_ACT BIT(1)
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@ -475,6 +476,8 @@ void wil_dbg_trace(struct wil6210_priv *wil, const char *fmt, ...);
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__printf(2, 3)
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void wil_err(struct wil6210_priv *wil, const char *fmt, ...);
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__printf(2, 3)
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void wil_err_ratelimited(struct wil6210_priv *wil, const char *fmt, ...);
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__printf(2, 3)
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void wil_info(struct wil6210_priv *wil, const char *fmt, ...);
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#define wil_dbg(wil, fmt, arg...) do { \
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netdev_dbg(wil_to_ndev(wil), fmt, ##arg); \
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