[ARM] 4139/1: AACI record support
Add PCM audio capture support for AACI audio on Versatile platform. Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>hifive-unleashed-5.1
Kevin Hilman
Russell King
parent
62578cbfaa
commit
41762b8ca9
258
sound/arm/aaci.c
258
sound/arm/aaci.c
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@ -166,6 +166,65 @@ static inline void aaci_chan_wait_ready(struct aaci_runtime *aacirun)
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*/
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static void aaci_fifo_irq(struct aaci *aaci, int channel, u32 mask)
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{
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if (mask & ISR_ORINTR) {
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dev_warn(&aaci->dev->dev, "RX overrun on chan %d\n", channel);
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writel(ICLR_RXOEC1 << channel, aaci->base + AACI_INTCLR);
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}
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if (mask & ISR_RXTOINTR) {
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dev_warn(&aaci->dev->dev, "RX timeout on chan %d\n", channel);
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writel(ICLR_RXTOFEC1 << channel, aaci->base + AACI_INTCLR);
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}
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if (mask & ISR_RXINTR) {
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struct aaci_runtime *aacirun = &aaci->capture;
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void *ptr;
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if (!aacirun->substream || !aacirun->start) {
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dev_warn(&aaci->dev->dev, "RX interrupt???");
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writel(0, aacirun->base + AACI_IE);
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return;
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}
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ptr = aacirun->ptr;
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do {
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unsigned int len = aacirun->fifosz;
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u32 val;
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if (aacirun->bytes <= 0) {
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aacirun->bytes += aacirun->period;
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aacirun->ptr = ptr;
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spin_unlock(&aaci->lock);
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snd_pcm_period_elapsed(aacirun->substream);
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spin_lock(&aaci->lock);
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}
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if (!(aacirun->cr & CR_EN))
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break;
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val = readl(aacirun->base + AACI_SR);
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if (!(val & SR_RXHF))
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break;
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if (!(val & SR_RXFF))
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len >>= 1;
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aacirun->bytes -= len;
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/* reading 16 bytes at a time */
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for( ; len > 0; len -= 16) {
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asm(
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"ldmia %1, {r0, r1, r2, r3}\n\t"
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"stmia %0!, {r0, r1, r2, r3}"
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: "+r" (ptr)
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: "r" (aacirun->fifo)
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: "r0", "r1", "r2", "r3", "cc");
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if (ptr >= aacirun->end)
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ptr = aacirun->start;
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}
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} while(1);
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aacirun->ptr = ptr;
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}
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if (mask & ISR_URINTR) {
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dev_dbg(&aaci->dev->dev, "TX underrun on chan %d\n", channel);
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writel(ICLR_TXUEC1 << channel, aaci->base + AACI_INTCLR);
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@ -193,7 +252,7 @@ static void aaci_fifo_irq(struct aaci *aaci, int channel, u32 mask)
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snd_pcm_period_elapsed(aacirun->substream);
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spin_lock(&aaci->lock);
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}
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if (!(aacirun->cr & TXCR_TXEN))
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if (!(aacirun->cr & CR_EN))
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break;
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val = readl(aacirun->base + AACI_SR);
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@ -331,8 +390,9 @@ static struct snd_pcm_hardware aaci_hw_info = {
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.periods_max = PAGE_SIZE / 16,
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};
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static int aaci_pcm_open(struct aaci *aaci, struct snd_pcm_substream *substream,
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struct aaci_runtime *aacirun)
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static int __aaci_pcm_open(struct aaci *aaci,
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struct snd_pcm_substream *substream,
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struct aaci_runtime *aacirun)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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int ret;
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@ -381,7 +441,7 @@ static int aaci_pcm_close(struct snd_pcm_substream *substream)
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struct aaci *aaci = substream->private_data;
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struct aaci_runtime *aacirun = substream->runtime->private_data;
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WARN_ON(aacirun->cr & TXCR_TXEN);
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WARN_ON(aacirun->cr & CR_EN);
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aacirun->substream = NULL;
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free_irq(aaci->dev->irq[0], aaci);
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@ -396,7 +456,7 @@ static int aaci_pcm_hw_free(struct snd_pcm_substream *substream)
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/*
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* This must not be called with the device enabled.
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*/
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WARN_ON(aacirun->cr & TXCR_TXEN);
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WARN_ON(aacirun->cr & CR_EN);
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if (aacirun->pcm_open)
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snd_ac97_pcm_close(aacirun->pcm);
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@ -423,9 +483,15 @@ static int aaci_pcm_hw_params(struct snd_pcm_substream *substream,
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if (err < 0)
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goto out;
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err = snd_ac97_pcm_open(aacirun->pcm, params_rate(params),
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params_channels(params),
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aacirun->pcm->r[0].slots);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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err = snd_ac97_pcm_open(aacirun->pcm, params_rate(params),
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params_channels(params),
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aacirun->pcm->r[0].slots);
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else
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err = snd_ac97_pcm_open(aacirun->pcm, params_rate(params),
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params_channels(params),
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aacirun->pcm->r[1].slots);
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if (err)
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goto out;
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@ -468,9 +534,9 @@ static int aaci_pcm_mmap(struct snd_pcm_substream *substream, struct vm_area_str
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* Playback specific ALSA stuff
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*/
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static const u32 channels_to_txmask[] = {
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[2] = TXCR_TX3 | TXCR_TX4,
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[4] = TXCR_TX3 | TXCR_TX4 | TXCR_TX7 | TXCR_TX8,
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[6] = TXCR_TX3 | TXCR_TX4 | TXCR_TX7 | TXCR_TX8 | TXCR_TX6 | TXCR_TX9,
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[2] = CR_SL3 | CR_SL4,
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[4] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8,
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[6] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8 | CR_SL6 | CR_SL9,
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};
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/*
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@ -505,7 +571,7 @@ aaci_rule_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule)
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chan_mask);
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}
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static int aaci_pcm_playback_open(struct snd_pcm_substream *substream)
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static int aaci_pcm_open(struct snd_pcm_substream *substream)
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{
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struct aaci *aaci = substream->private_data;
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int ret;
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@ -520,7 +586,12 @@ static int aaci_pcm_playback_open(struct snd_pcm_substream *substream)
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if (ret)
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return ret;
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return aaci_pcm_open(aaci, substream, &aaci->playback);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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ret = __aaci_pcm_open(aaci, substream, &aaci->playback);
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} else {
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ret = __aaci_pcm_open(aaci, substream, &aaci->capture);
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}
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return ret;
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}
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static int aaci_pcm_playback_hw_params(struct snd_pcm_substream *substream,
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@ -541,11 +612,11 @@ static int aaci_pcm_playback_hw_params(struct snd_pcm_substream *substream,
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* FIXME: double rate slots?
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*/
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if (ret >= 0) {
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aacirun->cr = TXCR_FEN | TXCR_COMPACT | TXCR_TSZ16;
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aacirun->cr = CR_FEN | CR_COMPACT | CR_SZ16;
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aacirun->cr |= channels_to_txmask[channels];
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aacirun->fifosz = aaci->fifosize * 4;
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if (aacirun->cr & TXCR_COMPACT)
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if (aacirun->cr & CR_COMPACT)
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aacirun->fifosz >>= 1;
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}
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return ret;
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@ -558,7 +629,7 @@ static void aaci_pcm_playback_stop(struct aaci_runtime *aacirun)
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ie = readl(aacirun->base + AACI_IE);
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ie &= ~(IE_URIE|IE_TXIE);
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writel(ie, aacirun->base + AACI_IE);
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aacirun->cr &= ~TXCR_TXEN;
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aacirun->cr &= ~CR_EN;
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aaci_chan_wait_ready(aacirun);
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writel(aacirun->cr, aacirun->base + AACI_TXCR);
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}
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@ -568,7 +639,7 @@ static void aaci_pcm_playback_start(struct aaci_runtime *aacirun)
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u32 ie;
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aaci_chan_wait_ready(aacirun);
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aacirun->cr |= TXCR_TXEN;
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aacirun->cr |= CR_EN;
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ie = readl(aacirun->base + AACI_IE);
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ie |= IE_URIE | IE_TXIE;
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@ -616,7 +687,7 @@ static int aaci_pcm_playback_trigger(struct snd_pcm_substream *substream, int cm
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}
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static struct snd_pcm_ops aaci_playback_ops = {
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.open = aaci_pcm_playback_open,
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.open = aaci_pcm_open,
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.close = aaci_pcm_close,
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.ioctl = snd_pcm_lib_ioctl,
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.hw_params = aaci_pcm_playback_hw_params,
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@ -627,7 +698,133 @@ static struct snd_pcm_ops aaci_playback_ops = {
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.mmap = aaci_pcm_mmap,
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};
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static int aaci_pcm_capture_hw_params(snd_pcm_substream_t *substream,
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snd_pcm_hw_params_t *params)
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{
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struct aaci *aaci = substream->private_data;
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struct aaci_runtime *aacirun = substream->runtime->private_data;
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int ret;
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ret = aaci_pcm_hw_params(substream, aacirun, params);
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if (ret >= 0) {
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aacirun->cr = CR_FEN | CR_COMPACT | CR_SZ16;
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/* Line in record: slot 3 and 4 */
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aacirun->cr |= CR_SL3 | CR_SL4;
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aacirun->fifosz = aaci->fifosize * 4;
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if (aacirun->cr & CR_COMPACT)
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aacirun->fifosz >>= 1;
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}
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return ret;
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}
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static void aaci_pcm_capture_stop(struct aaci_runtime *aacirun)
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{
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u32 ie;
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aaci_chan_wait_ready(aacirun);
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ie = readl(aacirun->base + AACI_IE);
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ie &= ~(IE_ORIE | IE_RXIE);
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writel(ie, aacirun->base+AACI_IE);
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aacirun->cr &= ~CR_EN;
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writel(aacirun->cr, aacirun->base + AACI_RXCR);
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}
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static void aaci_pcm_capture_start(struct aaci_runtime *aacirun)
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{
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u32 ie;
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aaci_chan_wait_ready(aacirun);
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#ifdef DEBUG
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/* RX Timeout value: bits 28:17 in RXCR */
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aacirun->cr |= 0xf << 17;
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#endif
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aacirun->cr |= CR_EN;
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writel(aacirun->cr, aacirun->base + AACI_RXCR);
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ie = readl(aacirun->base + AACI_IE);
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ie |= IE_ORIE |IE_RXIE; // overrun and rx interrupt -- half full
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writel(ie, aacirun->base + AACI_IE);
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}
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static int aaci_pcm_capture_trigger(snd_pcm_substream_t *substream, int cmd){
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struct aaci *aaci = substream->private_data;
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struct aaci_runtime *aacirun = substream->runtime->private_data;
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unsigned long flags;
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int ret = 0;
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spin_lock_irqsave(&aaci->lock, flags);
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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aaci_pcm_capture_start(aacirun);
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break;
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case SNDRV_PCM_TRIGGER_RESUME:
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aaci_pcm_capture_start(aacirun);
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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aaci_pcm_capture_stop(aacirun);
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break;
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case SNDRV_PCM_TRIGGER_SUSPEND:
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aaci_pcm_capture_stop(aacirun);
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break;
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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break;
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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break;
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default:
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ret = -EINVAL;
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}
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spin_unlock_irqrestore(&aaci->lock, flags);
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return ret;
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}
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static int aaci_pcm_capture_prepare(snd_pcm_substream_t *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct aaci *aaci = substream->private_data;
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aaci_pcm_prepare(substream);
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/* allow changing of sample rate */
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aaci_ac97_write(aaci->ac97, AC97_EXTENDED_STATUS, 0x0001); /* VRA */
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aaci_ac97_write(aaci->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
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aaci_ac97_write(aaci->ac97, AC97_PCM_MIC_ADC_RATE, runtime->rate);
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/* Record select: Mic: 0, Aux: 3, Line: 4 */
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aaci_ac97_write(aaci->ac97, AC97_REC_SEL, 0x0404);
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return 0;
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}
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static snd_pcm_ops_t aaci_capture_ops = {
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.open = aaci_pcm_open,
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.close = aaci_pcm_close,
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.ioctl = snd_pcm_lib_ioctl,
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.hw_params = aaci_pcm_capture_hw_params,
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.hw_free = aaci_pcm_hw_free,
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.prepare = aaci_pcm_capture_prepare,
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.trigger = aaci_pcm_capture_trigger,
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.pointer = aaci_pcm_pointer,
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.mmap = aaci_pcm_mmap,
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};
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/*
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* Power Management.
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@ -667,7 +864,7 @@ static int aaci_resume(struct amba_device *dev)
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static struct ac97_pcm ac97_defs[] __devinitdata = {
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[0] = { /* Front PCM */
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[0] = { /* Front PCM */
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.exclusive = 1,
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.r = {
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[0] = {
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@ -741,6 +938,7 @@ static int __devinit aaci_probe_ac97(struct aaci *aaci)
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ret = snd_ac97_mixer(ac97_bus, &ac97_template, &ac97);
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if (ret)
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goto out;
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aaci->ac97 = ac97;
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/*
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* Disable AC97 PC Beep input on audio codecs.
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@ -753,6 +951,7 @@ static int __devinit aaci_probe_ac97(struct aaci *aaci)
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goto out;
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aaci->playback.pcm = &ac97_bus->pcms[0];
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aaci->capture.pcm = &ac97_bus->pcms[1];
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out:
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return ret;
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@ -802,7 +1001,7 @@ static int __devinit aaci_init_pcm(struct aaci *aaci)
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struct snd_pcm *pcm;
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int ret;
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ret = snd_pcm_new(aaci->card, "AACI AC'97", 0, 1, 0, &pcm);
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ret = snd_pcm_new(aaci->card, "AACI AC'97", 0, 1, 1, &pcm);
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if (ret == 0) {
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aaci->pcm = pcm;
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pcm->private_data = aaci;
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@ -811,6 +1010,7 @@ static int __devinit aaci_init_pcm(struct aaci *aaci)
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strlcpy(pcm->name, DRIVER_NAME, sizeof(pcm->name));
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snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &aaci_playback_ops);
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snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &aaci_capture_ops);
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}
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return ret;
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@ -818,15 +1018,15 @@ static int __devinit aaci_init_pcm(struct aaci *aaci)
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static unsigned int __devinit aaci_size_fifo(struct aaci *aaci)
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{
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void __iomem *base = aaci->base + AACI_CSCH1;
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struct aaci_runtime *aacirun = &aaci->playback;
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int i;
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writel(TXCR_FEN | TXCR_TSZ16 | TXCR_TXEN, base + AACI_TXCR);
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writel(CR_FEN | CR_SZ16 | CR_EN, aacirun->base + AACI_TXCR);
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for (i = 0; !(readl(base + AACI_SR) & SR_TXFF) && i < 4096; i++)
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writel(0, aaci->base + AACI_DR1);
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for (i = 0; !(readl(aacirun->base + AACI_SR) & SR_TXFF) && i < 4096; i++)
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writel(0, aacirun->fifo);
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writel(0, base + AACI_TXCR);
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writel(0, aacirun->base + AACI_TXCR);
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/*
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* Re-initialise the AACI after the FIFO depth test, to
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@ -873,6 +1073,12 @@ static int __devinit aaci_probe(struct amba_device *dev, void *id)
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aaci->playback.base = aaci->base + AACI_CSCH1;
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aaci->playback.fifo = aaci->base + AACI_DR1;
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/*
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* Capture uses AACI channel 0
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*/
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aaci->capture.base = aaci->base + AACI_CSCH1;
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aaci->capture.fifo = aaci->base + AACI_DR1;
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for (i = 0; i < 4; i++) {
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||||
void __iomem *base = aaci->base + i * 0x14;
|
||||
|
||||
|
|
@ -908,7 +1114,7 @@ static int __devinit aaci_probe(struct amba_device *dev, void *id)
|
|||
ret = snd_card_register(aaci->card);
|
||||
if (ret == 0) {
|
||||
dev_info(&dev->dev, "%s, fifo %d\n", aaci->card->longname,
|
||||
aaci->fifosize);
|
||||
aaci->fifosize);
|
||||
amba_set_drvdata(dev, aaci->card);
|
||||
return ret;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -49,27 +49,27 @@
|
|||
#define AACI_DR4 0x0f0 /* data read/written fifo 4 */
|
||||
|
||||
/*
|
||||
* transmit fifo control register. P48
|
||||
* TX/RX fifo control register (CR). P48
|
||||
*/
|
||||
#define TXCR_FEN (1 << 16) /* fifo enable */
|
||||
#define TXCR_COMPACT (1 << 15) /* compact mode */
|
||||
#define TXCR_TSZ16 (0 << 13) /* 16 bits */
|
||||
#define TXCR_TSZ18 (1 << 13) /* 18 bits */
|
||||
#define TXCR_TSZ20 (2 << 13) /* 20 bits */
|
||||
#define TXCR_TSZ12 (3 << 13) /* 12 bits */
|
||||
#define TXCR_TX12 (1 << 12) /* transmits slot 12 */
|
||||
#define TXCR_TX11 (1 << 11) /* transmits slot 12 */
|
||||
#define TXCR_TX10 (1 << 10) /* transmits slot 12 */
|
||||
#define TXCR_TX9 (1 << 9) /* transmits slot 12 */
|
||||
#define TXCR_TX8 (1 << 8) /* transmits slot 12 */
|
||||
#define TXCR_TX7 (1 << 7) /* transmits slot 12 */
|
||||
#define TXCR_TX6 (1 << 6) /* transmits slot 12 */
|
||||
#define TXCR_TX5 (1 << 5) /* transmits slot 12 */
|
||||
#define TXCR_TX4 (1 << 4) /* transmits slot 12 */
|
||||
#define TXCR_TX3 (1 << 3) /* transmits slot 12 */
|
||||
#define TXCR_TX2 (1 << 2) /* transmits slot 12 */
|
||||
#define TXCR_TX1 (1 << 1) /* transmits slot 12 */
|
||||
#define TXCR_TXEN (1 << 0) /* transmit enable */
|
||||
#define CR_FEN (1 << 16) /* fifo enable */
|
||||
#define CR_COMPACT (1 << 15) /* compact mode */
|
||||
#define CR_SZ16 (0 << 13) /* 16 bits */
|
||||
#define CR_SZ18 (1 << 13) /* 18 bits */
|
||||
#define CR_SZ20 (2 << 13) /* 20 bits */
|
||||
#define CR_SZ12 (3 << 13) /* 12 bits */
|
||||
#define CR_SL12 (1 << 12)
|
||||
#define CR_SL11 (1 << 11)
|
||||
#define CR_SL10 (1 << 10)
|
||||
#define CR_SL9 (1 << 9)
|
||||
#define CR_SL8 (1 << 8)
|
||||
#define CR_SL7 (1 << 7)
|
||||
#define CR_SL6 (1 << 6)
|
||||
#define CR_SL5 (1 << 5)
|
||||
#define CR_SL4 (1 << 4)
|
||||
#define CR_SL3 (1 << 3)
|
||||
#define CR_SL2 (1 << 2)
|
||||
#define CR_SL1 (1 << 1)
|
||||
#define CR_EN (1 << 0) /* transmit enable */
|
||||
|
||||
/*
|
||||
* status register bits. P49
|
||||
|
|
@ -229,6 +229,7 @@ struct aaci {
|
|||
/* AC'97 */
|
||||
struct mutex ac97_sem;
|
||||
ac97_bus_t *ac97_bus;
|
||||
ac97_t *ac97;
|
||||
|
||||
u32 maincr;
|
||||
spinlock_t lock;
|
||||
|
|
|
|||
Loading…
Reference in New Issue