clk: imx8qxp: add clock valid checking mechnism
clk-imx8qxp is a common SCU clock driver used by both QM and QXP platforms. The clock numbers vary a bit between those two platforms. This patch introduces a mechanism to only register the valid clocks for one platform by checking the clk resource id table. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>5.4-rM2-2.2.x-imx-squashed
parent
16454ec4d7
commit
4188a7474e
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@ -28,8 +28,8 @@ obj-$(CONFIG_MXC_CLK_SCU) += \
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obj-$(CONFIG_CLK_IMX8MM) += clk-imx8mm.o
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obj-$(CONFIG_CLK_IMX8MN) += clk-imx8mn.o
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obj-$(CONFIG_CLK_IMX8MQ) += clk-imx8mq.o
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obj-$(CONFIG_CLK_IMX8QXP) += clk-imx8qxp.o clk-imx8qxp-lpcg.o clk-imx8qxp-acm.o
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obj-$(CONFIG_CLK_IMX8QXP) += clk-imx8qxp.o clk-imx8qxp-lpcg.o clk-imx8qxp-acm.o \
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clk-imx8qxp-rsrc.o
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obj-$(CONFIG_SOC_IMX1) += clk-imx1.o
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obj-$(CONFIG_SOC_IMX21) += clk-imx21.o
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obj-$(CONFIG_SOC_IMX25) += clk-imx25.o
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@ -0,0 +1,89 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2019 NXP
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* Dong Aisheng <aisheng.dong@nxp.com>
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*/
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#include <dt-bindings/firmware/imx/rsrc.h>
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#include "clk-scu.h"
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/* Keep sorted in the ascending order */
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static u32 imx8qxp_clk_scu_rsrc_table[] = {
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IMX_SC_R_DC_0_VIDEO0,
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IMX_SC_R_DC_0_VIDEO1,
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IMX_SC_R_DC_0,
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IMX_SC_R_DC_0_PLL_0,
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IMX_SC_R_DC_0_PLL_1,
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IMX_SC_R_SPI_0,
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IMX_SC_R_SPI_1,
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IMX_SC_R_SPI_2,
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IMX_SC_R_SPI_3,
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IMX_SC_R_UART_0,
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IMX_SC_R_UART_1,
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IMX_SC_R_UART_2,
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IMX_SC_R_UART_3,
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IMX_SC_R_I2C_0,
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IMX_SC_R_I2C_1,
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IMX_SC_R_I2C_2,
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IMX_SC_R_I2C_3,
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IMX_SC_R_ADC_0,
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IMX_SC_R_FTM_0,
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IMX_SC_R_FTM_1,
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IMX_SC_R_CAN_0,
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IMX_SC_R_GPU_0_PID0,
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IMX_SC_R_LCD_0,
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IMX_SC_R_LCD_0_PWM_0,
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IMX_SC_R_PWM_0,
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IMX_SC_R_PWM_1,
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IMX_SC_R_PWM_2,
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IMX_SC_R_PWM_3,
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IMX_SC_R_PWM_4,
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IMX_SC_R_PWM_5,
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IMX_SC_R_PWM_6,
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IMX_SC_R_PWM_7,
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IMX_SC_R_GPT_0,
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IMX_SC_R_GPT_1,
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IMX_SC_R_GPT_2,
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IMX_SC_R_GPT_3,
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IMX_SC_R_GPT_4,
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IMX_SC_R_FSPI_0,
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IMX_SC_R_FSPI_1,
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IMX_SC_R_SDHC_0,
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IMX_SC_R_SDHC_1,
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IMX_SC_R_SDHC_2,
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IMX_SC_R_ENET_0,
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IMX_SC_R_ENET_1,
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IMX_SC_R_MLB_0,
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IMX_SC_R_USB_2,
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IMX_SC_R_NAND,
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IMX_SC_R_LVDS_0,
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IMX_SC_R_LVDS_1,
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IMX_SC_R_M4_0_I2C,
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IMX_SC_R_ELCDIF_PLL,
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IMX_SC_R_AUDIO_PLL_0,
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IMX_SC_R_PI_0,
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IMX_SC_R_PI_0_PLL,
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IMX_SC_R_MIPI_0,
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IMX_SC_R_MIPI_0_PWM_0,
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IMX_SC_R_MIPI_0_I2C_0,
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IMX_SC_R_MIPI_0_I2C_1,
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IMX_SC_R_MIPI_1,
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IMX_SC_R_MIPI_1_PWM_0,
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IMX_SC_R_MIPI_1_I2C_0,
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IMX_SC_R_MIPI_1_I2C_1,
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IMX_SC_R_CSI_0,
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IMX_SC_R_CSI_0_PWM_0,
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IMX_SC_R_CSI_0_I2C_0,
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IMX_SC_R_AUDIO_PLL_1,
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IMX_SC_R_AUDIO_CLK_0,
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IMX_SC_R_AUDIO_CLK_1,
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IMX_SC_R_A35,
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IMX_SC_R_VPU_DEC_0,
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IMX_SC_R_VPU_ENC_0,
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};
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const struct imx_clk_scu_rsrc_table imx_clk_scu_rsrc_imx8qxp = {
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.rsrc = imx8qxp_clk_scu_rsrc_table,
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.num = ARRAY_SIZE(imx8qxp_clk_scu_rsrc_table),
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};
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@ -9,14 +9,15 @@
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include "clk-scu.h"
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#include <dt-bindings/clock/imx8-clock.h>
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#include <dt-bindings/firmware/imx/rsrc.h>
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#include "clk-scu.h"
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static const char *sdhc0_sels[] = {
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"dummy",
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"conn_pll0_clk",
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@ -43,14 +44,22 @@ static const char *enet1_rgmii_txc_sels[] = {
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"dummy",
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};
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static const struct of_device_id imx8qxp_match[] = {
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{ .compatible = "fsl,scu-clk", },
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{ .compatible = "fsl,imx8qxp-clk", &imx_clk_scu_rsrc_imx8qxp, },
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{ /* sentinel */ }
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};
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static int imx8qxp_clk_probe(struct platform_device *pdev)
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{
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const struct of_device_id *of_id =
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of_match_device(imx8qxp_match, &pdev->dev);
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struct device_node *ccm_node = pdev->dev.of_node;
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struct clk_hw_onecell_data *clk_data;
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struct clk_hw **clks;
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int ret, i;
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ret = imx_clk_scu_init(ccm_node);
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ret = imx_clk_scu_init(ccm_node, of_id->data);
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if (ret)
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return ret;
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@ -223,12 +232,6 @@ static int imx8qxp_clk_probe(struct platform_device *pdev)
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return ret;
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}
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static const struct of_device_id imx8qxp_match[] = {
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{ .compatible = "fsl,scu-clk", },
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{ .compatible = "fsl,imx8qxp-clk", },
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{ /* sentinel */ }
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};
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static struct platform_driver imx8qxp_clk_driver = {
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.driver = {
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.name = "imx8qxp-clk",
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@ -6,6 +6,7 @@
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#include <dt-bindings/firmware/imx/rsrc.h>
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#include <linux/arm-smccc.h>
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#include <linux/bsearch.h>
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <linux/of_platform.h>
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@ -20,6 +21,7 @@
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#define IMX_SIP_SET_CPUFREQ 0x00
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static struct imx_sc_ipc *ccm_ipc_handle;
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static const struct imx_clk_scu_rsrc_table *rsrc_table;
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struct device_node *pd_np;
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u32 clock_cells;
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@ -168,7 +170,24 @@ static inline struct clk_scu *to_clk_scu(struct clk_hw *hw)
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return container_of(hw, struct clk_scu, hw);
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}
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int imx_clk_scu_init(struct device_node *np)
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static int imx_scu_clk_search_cmp(const void *rsrc, const void *rsrc_p)
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{
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return *(u32 *)rsrc - *(u32 *)rsrc_p;
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}
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bool imx_scu_clk_is_valid(u32 rsrc_id)
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{
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void *p;
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if (!rsrc_table)
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return true;
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p = bsearch(&rsrc_id, rsrc_table->rsrc, rsrc_table->num,
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sizeof(rsrc_table->rsrc[0]), imx_scu_clk_search_cmp);
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return p != NULL;
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}
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int imx_clk_scu_init(struct device_node *np, const void *data)
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{
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struct platform_device *pd_dev;
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int ret, i;
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@ -188,6 +207,8 @@ int imx_clk_scu_init(struct device_node *np)
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pd_dev = of_find_device_by_node(pd_np);
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if (!pd_dev || !device_is_bound(&pd_dev->dev))
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return -EPROBE_DEFER;
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rsrc_table = data;
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}
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return 0;
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@ -604,6 +625,9 @@ struct clk_hw *imx_clk_scu_alloc_dev(const char *name,
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struct platform_device *pdev;
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int ret;
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if (!imx_scu_clk_is_valid(rsrc_id))
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return NULL;
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pdev = platform_device_alloc(name, PLATFORM_DEVID_NONE);
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if (!pdev) {
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pr_err("%s: failed to allocate scu clk dev rsrc %d type %d\n",
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@ -759,6 +783,9 @@ struct clk_hw *__imx_clk_gpr_scu(const char *name, const char * const *parent_na
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if (gpr_id >= IMX_SC_C_LAST)
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return NULL;
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if (!imx_scu_clk_is_valid(rsrc_id))
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return ERR_PTR(-EINVAL);
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clk = kzalloc(sizeof(*clk), GFP_KERNEL);
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if (!clk)
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return ERR_PTR(-ENOMEM);
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@ -14,11 +14,17 @@
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#define IMX_SCU_GPR_CLK_DIV BIT(1)
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#define IMX_SCU_GPR_CLK_MUX BIT(2)
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struct imx_clk_scu_rsrc_table {
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const u32 *rsrc;
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u8 num;
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};
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extern u32 clock_cells;
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extern struct list_head imx_scu_clks[];
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extern const struct dev_pm_ops imx_clk_lpcg_scu_pm_ops;
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extern const struct imx_clk_scu_rsrc_table imx_clk_scu_rsrc_imx8qxp;
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int imx_clk_scu_init(struct device_node *np);
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int imx_clk_scu_init(struct device_node *np, const void *data);
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struct clk_hw *imx_scu_of_clk_src_get(struct of_phandle_args *clkspec,
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void *data);
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struct clk_hw *imx_clk_scu_alloc_dev(const char *name,
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