powerpc: sysdev/mv64x60_pic irq_data conversion.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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@ -76,9 +76,9 @@ static struct irq_host *mv64x60_irq_host;
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* mv64x60_chip_low functions
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* mv64x60_chip_low functions
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*/
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*/
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static void mv64x60_mask_low(unsigned int virq)
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static void mv64x60_mask_low(struct irq_data *d)
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{
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{
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int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
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int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK;
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unsigned long flags;
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unsigned long flags;
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spin_lock_irqsave(&mv64x60_lock, flags);
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spin_lock_irqsave(&mv64x60_lock, flags);
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@ -89,9 +89,9 @@ static void mv64x60_mask_low(unsigned int virq)
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(void)in_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_LO);
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(void)in_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_LO);
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}
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}
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static void mv64x60_unmask_low(unsigned int virq)
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static void mv64x60_unmask_low(struct irq_data *d)
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{
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{
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int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
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int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK;
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unsigned long flags;
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unsigned long flags;
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spin_lock_irqsave(&mv64x60_lock, flags);
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spin_lock_irqsave(&mv64x60_lock, flags);
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@ -104,18 +104,18 @@ static void mv64x60_unmask_low(unsigned int virq)
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static struct irq_chip mv64x60_chip_low = {
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static struct irq_chip mv64x60_chip_low = {
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.name = "mv64x60_low",
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.name = "mv64x60_low",
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.mask = mv64x60_mask_low,
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.irq_mask = mv64x60_mask_low,
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.mask_ack = mv64x60_mask_low,
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.irq_mask_ack = mv64x60_mask_low,
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.unmask = mv64x60_unmask_low,
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.irq_unmask = mv64x60_unmask_low,
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};
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};
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/*
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/*
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* mv64x60_chip_high functions
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* mv64x60_chip_high functions
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*/
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*/
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static void mv64x60_mask_high(unsigned int virq)
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static void mv64x60_mask_high(struct irq_data *d)
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{
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{
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int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
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int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK;
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unsigned long flags;
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unsigned long flags;
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spin_lock_irqsave(&mv64x60_lock, flags);
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spin_lock_irqsave(&mv64x60_lock, flags);
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@ -126,9 +126,9 @@ static void mv64x60_mask_high(unsigned int virq)
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(void)in_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_HI);
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(void)in_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_HI);
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}
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}
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static void mv64x60_unmask_high(unsigned int virq)
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static void mv64x60_unmask_high(struct irq_data *d)
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{
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{
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int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
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int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK;
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unsigned long flags;
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unsigned long flags;
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spin_lock_irqsave(&mv64x60_lock, flags);
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spin_lock_irqsave(&mv64x60_lock, flags);
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@ -141,18 +141,18 @@ static void mv64x60_unmask_high(unsigned int virq)
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static struct irq_chip mv64x60_chip_high = {
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static struct irq_chip mv64x60_chip_high = {
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.name = "mv64x60_high",
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.name = "mv64x60_high",
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.mask = mv64x60_mask_high,
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.irq_mask = mv64x60_mask_high,
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.mask_ack = mv64x60_mask_high,
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.irq_mask_ack = mv64x60_mask_high,
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.unmask = mv64x60_unmask_high,
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.irq_unmask = mv64x60_unmask_high,
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};
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};
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/*
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/*
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* mv64x60_chip_gpp functions
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* mv64x60_chip_gpp functions
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*/
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*/
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static void mv64x60_mask_gpp(unsigned int virq)
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static void mv64x60_mask_gpp(struct irq_data *d)
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{
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{
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int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
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int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK;
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unsigned long flags;
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unsigned long flags;
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spin_lock_irqsave(&mv64x60_lock, flags);
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spin_lock_irqsave(&mv64x60_lock, flags);
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@ -163,9 +163,9 @@ static void mv64x60_mask_gpp(unsigned int virq)
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(void)in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_MASK);
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(void)in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_MASK);
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}
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}
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static void mv64x60_mask_ack_gpp(unsigned int virq)
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static void mv64x60_mask_ack_gpp(struct irq_data *d)
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{
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{
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int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
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int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK;
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unsigned long flags;
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unsigned long flags;
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spin_lock_irqsave(&mv64x60_lock, flags);
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spin_lock_irqsave(&mv64x60_lock, flags);
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@ -178,9 +178,9 @@ static void mv64x60_mask_ack_gpp(unsigned int virq)
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(void)in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_CAUSE);
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(void)in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_CAUSE);
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}
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}
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static void mv64x60_unmask_gpp(unsigned int virq)
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static void mv64x60_unmask_gpp(struct irq_data *d)
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{
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{
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int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
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int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK;
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unsigned long flags;
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unsigned long flags;
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spin_lock_irqsave(&mv64x60_lock, flags);
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spin_lock_irqsave(&mv64x60_lock, flags);
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@ -193,9 +193,9 @@ static void mv64x60_unmask_gpp(unsigned int virq)
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static struct irq_chip mv64x60_chip_gpp = {
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static struct irq_chip mv64x60_chip_gpp = {
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.name = "mv64x60_gpp",
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.name = "mv64x60_gpp",
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.mask = mv64x60_mask_gpp,
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.irq_mask = mv64x60_mask_gpp,
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.mask_ack = mv64x60_mask_ack_gpp,
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.irq_mask_ack = mv64x60_mask_ack_gpp,
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.unmask = mv64x60_unmask_gpp,
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.irq_unmask = mv64x60_unmask_gpp,
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};
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};
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/*
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/*
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