redonkable/alistair23-linux
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i2c: tegra: Use relaxed versions of readl/writel

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There is nothing to synchronize in regards to memory accesses for PIO
transfers and for DMA transfers the DMA API takes care of the syncing.

Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
This commit is contained in:
Dmitry Osipenko 2020-01-14 04:34:40 +03:00 committed by Wolfram Sang
parent ae6028a655
commit 4211ffc3ad
1 changed files with 11 additions and 10 deletions
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21
drivers/i2c/busses/i2c-tegra.c
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@ -284,12 +284,12 @@ struct tegra_i2c_dev {
static void dvc_writel(struct tegra_i2c_dev *i2c_dev, u32 val, static void dvc_writel(struct tegra_i2c_dev *i2c_dev, u32 val,
unsigned long reg) unsigned long reg)
{ {
writel(val, i2c_dev->base + reg); writel_relaxed(val, i2c_dev->base + reg);
} }
static u32 dvc_readl(struct tegra_i2c_dev *i2c_dev, unsigned long reg) static u32 dvc_readl(struct tegra_i2c_dev *i2c_dev, unsigned long reg)
{ {
return readl(i2c_dev->base + reg); return readl_relaxed(i2c_dev->base + reg);
} }
/* /*
@ -307,16 +307,16 @@ static unsigned long tegra_i2c_reg_addr(struct tegra_i2c_dev *i2c_dev,
static void i2c_writel(struct tegra_i2c_dev *i2c_dev, u32 val, static void i2c_writel(struct tegra_i2c_dev *i2c_dev, u32 val,
unsigned long reg) unsigned long reg)
{ {
writel(val, i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); writel_relaxed(val, i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
/* Read back register to make sure that register writes completed */ /* Read back register to make sure that register writes completed */
if (reg != I2C_TX_FIFO) if (reg != I2C_TX_FIFO)
readl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
} }
static u32 i2c_readl(struct tegra_i2c_dev *i2c_dev, unsigned long reg) static u32 i2c_readl(struct tegra_i2c_dev *i2c_dev, unsigned long reg)
{ {
return readl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); return readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
} }
static void i2c_writesl(struct tegra_i2c_dev *i2c_dev, void *data, static void i2c_writesl(struct tegra_i2c_dev *i2c_dev, void *data,
@ -689,12 +689,13 @@ static int tegra_i2c_wait_for_config_load(struct tegra_i2c_dev *i2c_dev)
i2c_writel(i2c_dev, I2C_MSTR_CONFIG_LOAD, I2C_CONFIG_LOAD); i2c_writel(i2c_dev, I2C_MSTR_CONFIG_LOAD, I2C_CONFIG_LOAD);
if (i2c_dev->is_curr_atomic_xfer) if (i2c_dev->is_curr_atomic_xfer)
err = readl_poll_timeout_atomic(addr, val, val == 0, err = readl_relaxed_poll_timeout_atomic(
1000, addr, val, val == 0, 1000,
I2C_CONFIG_LOAD_TIMEOUT); I2C_CONFIG_LOAD_TIMEOUT);
else else
err = readl_poll_timeout(addr, val, val == 0, 1000, err = readl_relaxed_poll_timeout(
I2C_CONFIG_LOAD_TIMEOUT); addr, val, val == 0, 1000,
I2C_CONFIG_LOAD_TIMEOUT);
if (err) { if (err) {
dev_warn(i2c_dev->dev, dev_warn(i2c_dev->dev,