i2c: tegra: Use relaxed versions of readl/writel
There is nothing to synchronize in regards to memory accesses for PIO transfers and for DMA transfers the DMA API takes care of the syncing. Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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@ -284,12 +284,12 @@ struct tegra_i2c_dev {
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static void dvc_writel(struct tegra_i2c_dev *i2c_dev, u32 val,
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unsigned long reg)
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{
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writel(val, i2c_dev->base + reg);
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writel_relaxed(val, i2c_dev->base + reg);
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}
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static u32 dvc_readl(struct tegra_i2c_dev *i2c_dev, unsigned long reg)
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{
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return readl(i2c_dev->base + reg);
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return readl_relaxed(i2c_dev->base + reg);
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}
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/*
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@ -307,16 +307,16 @@ static unsigned long tegra_i2c_reg_addr(struct tegra_i2c_dev *i2c_dev,
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static void i2c_writel(struct tegra_i2c_dev *i2c_dev, u32 val,
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unsigned long reg)
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{
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writel(val, i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
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writel_relaxed(val, i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
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/* Read back register to make sure that register writes completed */
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if (reg != I2C_TX_FIFO)
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readl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
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readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
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}
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static u32 i2c_readl(struct tegra_i2c_dev *i2c_dev, unsigned long reg)
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{
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return readl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
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return readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
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}
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static void i2c_writesl(struct tegra_i2c_dev *i2c_dev, void *data,
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@ -689,11 +689,12 @@ static int tegra_i2c_wait_for_config_load(struct tegra_i2c_dev *i2c_dev)
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i2c_writel(i2c_dev, I2C_MSTR_CONFIG_LOAD, I2C_CONFIG_LOAD);
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if (i2c_dev->is_curr_atomic_xfer)
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err = readl_poll_timeout_atomic(addr, val, val == 0,
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1000,
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err = readl_relaxed_poll_timeout_atomic(
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addr, val, val == 0, 1000,
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I2C_CONFIG_LOAD_TIMEOUT);
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else
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err = readl_poll_timeout(addr, val, val == 0, 1000,
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err = readl_relaxed_poll_timeout(
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addr, val, val == 0, 1000,
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I2C_CONFIG_LOAD_TIMEOUT);
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if (err) {
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