ath5k: Beaconing fixes
* Write next beacon timer even on AP mode since without this we get no beacons + ath9k does it too. Docs say that we must write 0 on this register on AP mode to start TSF increment, we do both to be on the safe side. * Fix num_tx_pending function, we never read the register :P that's why we got all those "beacon queue 7 didn't stop messages". * Put full prioriy on beacon queue, lock all queues with lower priority using the arblock and also bypass any arblock by seting the arblock ignore flag. * For the CAB queue (do we need this thing ?, it seems crap) since it's supposed to fire up after each beacon (we don't use it on driver part, ath9k/MadWiFi does), don't make it DBA gated but instead make it fire after each beacon by using the beacon sent gated flag. * Increase bmiss threshold to 10, that's what we used on MadWiFi for a long time. Also when we have pending frames on the beacon queue (we got a beacon that didn't make it on the air) it's more likely that the beacon queue never started, probably due to faulty DBA setting, so change that "beacon queue didn't stop" message. Tested this with AP mode and IBSS mode and seems to work fine ;-) Signed-off-by: Nick Kossifidis <mickflemm@gmail.com> Signed-off-by: Bob Copeland <me@bobcopeland.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -1738,35 +1738,6 @@ ath5k_check_ibss_tsf(struct ath5k_softc *sc, struct sk_buff *skb,
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}
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}
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static void ath5k_tasklet_beacon(unsigned long data)
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{
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struct ath5k_softc *sc = (struct ath5k_softc *) data;
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/*
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* Software beacon alert--time to send a beacon.
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*
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* In IBSS mode we use this interrupt just to
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* keep track of the next TBTT (target beacon
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* transmission time) in order to detect wether
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* automatic TSF updates happened.
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*/
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if (sc->opmode == NL80211_IFTYPE_ADHOC) {
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/* XXX: only if VEOL suppported */
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u64 tsf = ath5k_hw_get_tsf64(sc->ah);
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sc->nexttbtt += sc->bintval;
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ATH5K_DBG(sc, ATH5K_DEBUG_BEACON,
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"SWBA nexttbtt: %x hw_tu: %x "
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"TSF: %llx\n",
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sc->nexttbtt,
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TSF_TO_TU(tsf),
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(unsigned long long) tsf);
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} else {
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spin_lock(&sc->block);
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ath5k_beacon_send(sc);
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spin_unlock(&sc->block);
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}
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}
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static void
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ath5k_tasklet_rx(unsigned long data)
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{
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@ -2120,7 +2091,7 @@ ath5k_beacon_send(struct ath5k_softc *sc)
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sc->bmisscount++;
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ATH5K_DBG(sc, ATH5K_DEBUG_BEACON,
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"missed %u consecutive beacons\n", sc->bmisscount);
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if (sc->bmisscount > 3) { /* NB: 3 is a guess */
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if (sc->bmisscount > 10) { /* NB: 10 is a guess */
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ATH5K_DBG(sc, ATH5K_DEBUG_BEACON,
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"stuck beacon time (%u missed)\n",
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sc->bmisscount);
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@ -2141,10 +2112,12 @@ ath5k_beacon_send(struct ath5k_softc *sc)
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* are still pending on the queue.
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*/
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if (unlikely(ath5k_hw_stop_tx_dma(ah, sc->bhalq))) {
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ATH5K_WARN(sc, "beacon queue %u didn't stop?\n", sc->bhalq);
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ATH5K_WARN(sc, "beacon queue %u didn't start/stop ?\n", sc->bhalq);
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/* NB: hw still stops DMA, so proceed */
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}
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/* Note: Beacon buffer is updated on beacon_update when mac80211
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* calls config_interface */
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ath5k_hw_set_txdp(ah, sc->bhalq, bf->daddr);
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ath5k_hw_start_tx_dma(ah, sc->bhalq);
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ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, "TXDP[%u] = %llx (%p)\n",
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@ -2301,6 +2274,35 @@ ath5k_beacon_config(struct ath5k_softc *sc)
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ath5k_hw_set_imr(ah, sc->imask);
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}
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static void ath5k_tasklet_beacon(unsigned long data)
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{
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struct ath5k_softc *sc = (struct ath5k_softc *) data;
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/*
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* Software beacon alert--time to send a beacon.
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*
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* In IBSS mode we use this interrupt just to
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* keep track of the next TBTT (target beacon
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* transmission time) in order to detect wether
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* automatic TSF updates happened.
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*/
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if (sc->opmode == NL80211_IFTYPE_ADHOC) {
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/* XXX: only if VEOL suppported */
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u64 tsf = ath5k_hw_get_tsf64(sc->ah);
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sc->nexttbtt += sc->bintval;
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ATH5K_DBG(sc, ATH5K_DEBUG_BEACON,
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"SWBA nexttbtt: %x hw_tu: %x "
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"TSF: %llx\n",
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sc->nexttbtt,
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TSF_TO_TU(tsf),
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(unsigned long long) tsf);
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} else {
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spin_lock(&sc->block);
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ath5k_beacon_send(sc);
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spin_unlock(&sc->block);
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}
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}
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/********************\
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* Interrupt handling *
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@ -736,8 +736,8 @@ void ath5k_hw_init_beacon(struct ath5k_hw *ah, u32 next_beacon, u32 interval)
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/* When in AP mode zero timer0 to start TSF */
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if (ah->ah_op_mode == NL80211_IFTYPE_AP)
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ath5k_hw_reg_write(ah, 0, AR5K_TIMER0);
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else
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ath5k_hw_reg_write(ah, next_beacon, AR5K_TIMER0);
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ath5k_hw_reg_write(ah, next_beacon, AR5K_TIMER0);
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ath5k_hw_reg_write(ah, timer1, AR5K_TIMER1);
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ath5k_hw_reg_write(ah, timer2, AR5K_TIMER2);
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ath5k_hw_reg_write(ah, timer3, AR5K_TIMER3);
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@ -160,7 +160,8 @@ u32 ath5k_hw_num_tx_pending(struct ath5k_hw *ah, unsigned int queue)
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if (ah->ah_version == AR5K_AR5210)
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return false;
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pending = (AR5K_QUEUE_STATUS(queue) & AR5K_QCU_STS_FRMPENDCNT);
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pending = ath5k_hw_reg_read(ah, AR5K_QUEUE_STATUS(queue));
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pending &= AR5K_QCU_STS_FRMPENDCNT;
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/* It's possible to have no frames pending even if TXE
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* is set. To indicate that q has not stopped return
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@ -401,14 +402,16 @@ int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue)
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AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_DFS_MISC(queue),
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(AR5K_DCU_MISC_ARBLOCK_CTL_GLOBAL <<
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AR5K_DCU_MISC_ARBLOCK_CTL_S) |
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AR5K_DCU_MISC_ARBLOCK_IGNORE |
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AR5K_DCU_MISC_POST_FR_BKOFF_DIS |
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AR5K_DCU_MISC_BCN_ENABLE);
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break;
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case AR5K_TX_QUEUE_CAB:
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AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_MISC(queue),
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AR5K_QCU_MISC_FRSHED_DBA_GT |
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AR5K_QCU_MISC_FRSHED_BCN_SENT_GT |
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AR5K_QCU_MISC_CBREXP_DIS |
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AR5K_QCU_MISC_RDY_VEOL_POLICY |
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AR5K_QCU_MISC_CBREXP_BCN_DIS);
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ath5k_hw_reg_write(ah, ((AR5K_TUNE_BEACON_INTERVAL -
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