crypto: rockchip - add crypto driver for rk3288
Crypto driver support:
ecb(aes) cbc(aes) ecb(des) cbc(des) ecb(des3_ede) cbc(des3_ede)
You can alloc tags above in your case.
And other algorithms and platforms will be added later on.
Signed-off-by: Zain Wang <zain.wang@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
hifive-unleashed-5.1
Zain Wang
Herbert Xu
parent
e81c1b4646
commit
433cd2c617
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@ -497,4 +497,15 @@ config CRYPTO_DEV_SUN4I_SS
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To compile this driver as a module, choose M here: the module
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will be called sun4i-ss.
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config CRYPTO_DEV_ROCKCHIP
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tristate "Rockchip's Cryptographic Engine driver"
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depends on OF && ARCH_ROCKCHIP
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select CRYPTO_AES
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select CRYPTO_DES
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select CRYPTO_BLKCIPHER
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help
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This driver interfaces with the hardware crypto accelerator.
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Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
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endif # CRYPTO_HW
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@ -29,3 +29,4 @@ obj-$(CONFIG_CRYPTO_DEV_QAT) += qat/
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obj-$(CONFIG_CRYPTO_DEV_QCE) += qce/
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obj-$(CONFIG_CRYPTO_DEV_VMX) += vmx/
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obj-$(CONFIG_CRYPTO_DEV_SUN4I_SS) += sunxi-ss/
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obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rockchip/
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@ -0,0 +1,3 @@
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obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rk_crypto.o
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rk_crypto-objs := rk3288_crypto.o \
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rk3288_crypto_ablkcipher.o \
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@ -0,0 +1,393 @@
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/*
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* Crypto acceleration support for Rockchip RK3288
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*
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* Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
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*
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* Author: Zain Wang <zain.wang@rock-chips.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* Some ideas are from marvell-cesa.c and s5p-sss.c driver.
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*/
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#include "rk3288_crypto.h"
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/clk.h>
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#include <linux/crypto.h>
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#include <linux/reset.h>
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static int rk_crypto_enable_clk(struct rk_crypto_info *dev)
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{
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int err;
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err = clk_prepare_enable(dev->sclk);
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if (err) {
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dev_err(dev->dev, "[%s:%d], Couldn't enable clock sclk\n",
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__func__, __LINE__);
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goto err_return;
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}
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err = clk_prepare_enable(dev->aclk);
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if (err) {
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dev_err(dev->dev, "[%s:%d], Couldn't enable clock aclk\n",
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__func__, __LINE__);
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goto err_aclk;
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}
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err = clk_prepare_enable(dev->hclk);
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if (err) {
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dev_err(dev->dev, "[%s:%d], Couldn't enable clock hclk\n",
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__func__, __LINE__);
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goto err_hclk;
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}
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err = clk_prepare_enable(dev->dmaclk);
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if (err) {
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dev_err(dev->dev, "[%s:%d], Couldn't enable clock dmaclk\n",
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__func__, __LINE__);
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goto err_dmaclk;
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}
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return err;
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err_dmaclk:
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clk_disable_unprepare(dev->hclk);
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err_hclk:
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clk_disable_unprepare(dev->aclk);
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err_aclk:
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clk_disable_unprepare(dev->sclk);
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err_return:
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return err;
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}
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static void rk_crypto_disable_clk(struct rk_crypto_info *dev)
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{
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clk_disable_unprepare(dev->dmaclk);
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clk_disable_unprepare(dev->hclk);
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clk_disable_unprepare(dev->aclk);
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clk_disable_unprepare(dev->sclk);
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}
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static int check_alignment(struct scatterlist *sg_src,
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struct scatterlist *sg_dst,
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int align_mask)
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{
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int in, out, align;
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in = IS_ALIGNED((uint32_t)sg_src->offset, 4) &&
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IS_ALIGNED((uint32_t)sg_src->length, align_mask);
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if (!sg_dst)
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return in;
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out = IS_ALIGNED((uint32_t)sg_dst->offset, 4) &&
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IS_ALIGNED((uint32_t)sg_dst->length, align_mask);
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align = in && out;
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return (align && (sg_src->length == sg_dst->length));
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}
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static int rk_load_data(struct rk_crypto_info *dev,
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struct scatterlist *sg_src,
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struct scatterlist *sg_dst)
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{
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unsigned int count;
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dev->aligned = dev->aligned ?
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check_alignment(sg_src, sg_dst, dev->align_size) :
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dev->aligned;
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if (dev->aligned) {
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count = min(dev->left_bytes, sg_src->length);
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dev->left_bytes -= count;
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if (!dma_map_sg(dev->dev, sg_src, 1, DMA_TO_DEVICE)) {
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dev_err(dev->dev, "[%s:%d] dma_map_sg(src) error\n",
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__func__, __LINE__);
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return -EINVAL;
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}
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dev->addr_in = sg_dma_address(sg_src);
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if (sg_dst) {
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if (!dma_map_sg(dev->dev, sg_dst, 1, DMA_FROM_DEVICE)) {
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dev_err(dev->dev,
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"[%s:%d] dma_map_sg(dst) error\n",
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__func__, __LINE__);
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dma_unmap_sg(dev->dev, sg_src, 1,
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DMA_TO_DEVICE);
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return -EINVAL;
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}
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dev->addr_out = sg_dma_address(sg_dst);
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}
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} else {
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count = (dev->left_bytes > PAGE_SIZE) ?
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PAGE_SIZE : dev->left_bytes;
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if (!sg_pcopy_to_buffer(dev->first, dev->nents,
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dev->addr_vir, count,
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dev->total - dev->left_bytes)) {
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dev_err(dev->dev, "[%s:%d] pcopy err\n",
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__func__, __LINE__);
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return -EINVAL;
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}
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dev->left_bytes -= count;
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sg_init_one(&dev->sg_tmp, dev->addr_vir, count);
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if (!dma_map_sg(dev->dev, &dev->sg_tmp, 1, DMA_TO_DEVICE)) {
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dev_err(dev->dev, "[%s:%d] dma_map_sg(sg_tmp) error\n",
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__func__, __LINE__);
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return -ENOMEM;
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}
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dev->addr_in = sg_dma_address(&dev->sg_tmp);
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if (sg_dst) {
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if (!dma_map_sg(dev->dev, &dev->sg_tmp, 1,
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DMA_FROM_DEVICE)) {
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dev_err(dev->dev,
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"[%s:%d] dma_map_sg(sg_tmp) error\n",
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__func__, __LINE__);
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dma_unmap_sg(dev->dev, &dev->sg_tmp, 1,
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DMA_TO_DEVICE);
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return -ENOMEM;
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}
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dev->addr_out = sg_dma_address(&dev->sg_tmp);
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}
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}
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dev->count = count;
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return 0;
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}
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static void rk_unload_data(struct rk_crypto_info *dev)
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{
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struct scatterlist *sg_in, *sg_out;
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sg_in = dev->aligned ? dev->sg_src : &dev->sg_tmp;
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dma_unmap_sg(dev->dev, sg_in, 1, DMA_TO_DEVICE);
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if (dev->sg_dst) {
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sg_out = dev->aligned ? dev->sg_dst : &dev->sg_tmp;
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dma_unmap_sg(dev->dev, sg_out, 1, DMA_FROM_DEVICE);
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}
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}
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static irqreturn_t rk_crypto_irq_handle(int irq, void *dev_id)
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{
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struct rk_crypto_info *dev = platform_get_drvdata(dev_id);
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u32 interrupt_status;
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int err = 0;
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spin_lock(&dev->lock);
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interrupt_status = CRYPTO_READ(dev, RK_CRYPTO_INTSTS);
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CRYPTO_WRITE(dev, RK_CRYPTO_INTSTS, interrupt_status);
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if (interrupt_status & 0x0a) {
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dev_warn(dev->dev, "DMA Error\n");
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err = -EFAULT;
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} else if (interrupt_status & 0x05) {
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err = dev->update(dev);
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}
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if (err)
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dev->complete(dev, err);
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spin_unlock(&dev->lock);
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return IRQ_HANDLED;
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}
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static void rk_crypto_tasklet_cb(unsigned long data)
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{
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struct rk_crypto_info *dev = (struct rk_crypto_info *)data;
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struct crypto_async_request *async_req, *backlog;
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int err = 0;
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spin_lock(&dev->lock);
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backlog = crypto_get_backlog(&dev->queue);
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async_req = crypto_dequeue_request(&dev->queue);
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spin_unlock(&dev->lock);
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if (!async_req) {
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dev_err(dev->dev, "async_req is NULL !!\n");
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return;
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}
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if (backlog) {
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backlog->complete(backlog, -EINPROGRESS);
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backlog = NULL;
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}
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if (crypto_tfm_alg_type(async_req->tfm) == CRYPTO_ALG_TYPE_ABLKCIPHER)
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dev->ablk_req = ablkcipher_request_cast(async_req);
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err = dev->start(dev);
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if (err)
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dev->complete(dev, err);
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}
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static struct rk_crypto_tmp *rk_cipher_algs[] = {
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&rk_ecb_aes_alg,
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&rk_cbc_aes_alg,
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&rk_ecb_des_alg,
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&rk_cbc_des_alg,
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&rk_ecb_des3_ede_alg,
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&rk_cbc_des3_ede_alg,
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};
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static int rk_crypto_register(struct rk_crypto_info *crypto_info)
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{
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unsigned int i, k;
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int err = 0;
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for (i = 0; i < ARRAY_SIZE(rk_cipher_algs); i++) {
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rk_cipher_algs[i]->dev = crypto_info;
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err = crypto_register_alg(&rk_cipher_algs[i]->alg);
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if (err)
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goto err_cipher_algs;
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}
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return 0;
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err_cipher_algs:
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for (k = 0; k < i; k++)
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crypto_unregister_alg(&rk_cipher_algs[k]->alg);
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return err;
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}
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static void rk_crypto_unregister(void)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(rk_cipher_algs); i++)
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crypto_unregister_alg(&rk_cipher_algs[i]->alg);
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}
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static void rk_crypto_action(void *data)
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{
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struct rk_crypto_info *crypto_info = data;
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reset_control_assert(crypto_info->rst);
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}
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static const struct of_device_id crypto_of_id_table[] = {
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{ .compatible = "rockchip,rk3288-crypto" },
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{}
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};
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MODULE_DEVICE_TABLE(of, crypto_of_id_table);
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static int rk_crypto_probe(struct platform_device *pdev)
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{
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struct resource *res;
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struct device *dev = &pdev->dev;
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struct rk_crypto_info *crypto_info;
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int err = 0;
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crypto_info = devm_kzalloc(&pdev->dev,
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sizeof(*crypto_info), GFP_KERNEL);
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if (!crypto_info) {
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err = -ENOMEM;
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goto err_crypto;
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}
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crypto_info->rst = devm_reset_control_get(dev, "crypto-rst");
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if (IS_ERR(crypto_info->rst)) {
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err = PTR_ERR(crypto_info->rst);
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goto err_crypto;
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}
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reset_control_assert(crypto_info->rst);
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usleep_range(10, 20);
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reset_control_deassert(crypto_info->rst);
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err = devm_add_action(dev, rk_crypto_action, crypto_info);
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if (err) {
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reset_control_assert(crypto_info->rst);
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goto err_crypto;
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}
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spin_lock_init(&crypto_info->lock);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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crypto_info->reg = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(crypto_info->reg)) {
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err = PTR_ERR(crypto_info->reg);
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goto err_crypto;
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}
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crypto_info->aclk = devm_clk_get(&pdev->dev, "aclk");
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if (IS_ERR(crypto_info->aclk)) {
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err = PTR_ERR(crypto_info->aclk);
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goto err_crypto;
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}
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crypto_info->hclk = devm_clk_get(&pdev->dev, "hclk");
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if (IS_ERR(crypto_info->hclk)) {
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err = PTR_ERR(crypto_info->hclk);
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goto err_crypto;
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}
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crypto_info->sclk = devm_clk_get(&pdev->dev, "sclk");
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if (IS_ERR(crypto_info->sclk)) {
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err = PTR_ERR(crypto_info->sclk);
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goto err_crypto;
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}
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crypto_info->dmaclk = devm_clk_get(&pdev->dev, "apb_pclk");
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if (IS_ERR(crypto_info->dmaclk)) {
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err = PTR_ERR(crypto_info->dmaclk);
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goto err_crypto;
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}
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crypto_info->irq = platform_get_irq(pdev, 0);
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if (crypto_info->irq < 0) {
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dev_warn(crypto_info->dev,
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"control Interrupt is not available.\n");
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err = crypto_info->irq;
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goto err_crypto;
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}
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err = devm_request_irq(&pdev->dev, crypto_info->irq,
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rk_crypto_irq_handle, IRQF_SHARED,
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"rk-crypto", pdev);
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if (err) {
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dev_err(crypto_info->dev, "irq request failed.\n");
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goto err_crypto;
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}
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crypto_info->dev = &pdev->dev;
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platform_set_drvdata(pdev, crypto_info);
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tasklet_init(&crypto_info->crypto_tasklet,
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rk_crypto_tasklet_cb, (unsigned long)crypto_info);
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crypto_init_queue(&crypto_info->queue, 50);
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crypto_info->enable_clk = rk_crypto_enable_clk;
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crypto_info->disable_clk = rk_crypto_disable_clk;
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crypto_info->load_data = rk_load_data;
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crypto_info->unload_data = rk_unload_data;
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err = rk_crypto_register(crypto_info);
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if (err) {
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dev_err(dev, "err in register alg");
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goto err_register_alg;
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}
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dev_info(dev, "Crypto Accelerator successfully registered\n");
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return 0;
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err_register_alg:
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tasklet_kill(&crypto_info->crypto_tasklet);
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err_crypto:
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return err;
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}
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static int rk_crypto_remove(struct platform_device *pdev)
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{
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struct rk_crypto_info *crypto_tmp = platform_get_drvdata(pdev);
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rk_crypto_unregister();
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tasklet_kill(&crypto_tmp->crypto_tasklet);
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return 0;
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}
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static struct platform_driver crypto_driver = {
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.probe = rk_crypto_probe,
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.remove = rk_crypto_remove,
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.driver = {
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.name = "rk3288-crypto",
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.of_match_table = crypto_of_id_table,
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},
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};
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module_platform_driver(crypto_driver);
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MODULE_AUTHOR("Zain Wang <zain.wang@rock-chips.com>");
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MODULE_DESCRIPTION("Support for Rockchip's cryptographic engine");
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MODULE_LICENSE("GPL");
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|
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@ -0,0 +1,216 @@
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#ifndef __RK3288_CRYPTO_H__
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#define __RK3288_CRYPTO_H__
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#include <crypto/aes.h>
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#include <crypto/des.h>
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#include <crypto/algapi.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#define _SBF(v, f) ((v) << (f))
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/* Crypto control registers*/
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#define RK_CRYPTO_INTSTS 0x0000
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#define RK_CRYPTO_PKA_DONE_INT BIT(5)
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#define RK_CRYPTO_HASH_DONE_INT BIT(4)
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#define RK_CRYPTO_HRDMA_ERR_INT BIT(3)
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#define RK_CRYPTO_HRDMA_DONE_INT BIT(2)
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#define RK_CRYPTO_BCDMA_ERR_INT BIT(1)
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#define RK_CRYPTO_BCDMA_DONE_INT BIT(0)
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#define RK_CRYPTO_INTENA 0x0004
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#define RK_CRYPTO_PKA_DONE_ENA BIT(5)
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#define RK_CRYPTO_HASH_DONE_ENA BIT(4)
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#define RK_CRYPTO_HRDMA_ERR_ENA BIT(3)
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#define RK_CRYPTO_HRDMA_DONE_ENA BIT(2)
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#define RK_CRYPTO_BCDMA_ERR_ENA BIT(1)
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#define RK_CRYPTO_BCDMA_DONE_ENA BIT(0)
|
||||
|
||||
#define RK_CRYPTO_CTRL 0x0008
|
||||
#define RK_CRYPTO_WRITE_MASK _SBF(0xFFFF, 16)
|
||||
#define RK_CRYPTO_TRNG_FLUSH BIT(9)
|
||||
#define RK_CRYPTO_TRNG_START BIT(8)
|
||||
#define RK_CRYPTO_PKA_FLUSH BIT(7)
|
||||
#define RK_CRYPTO_HASH_FLUSH BIT(6)
|
||||
#define RK_CRYPTO_BLOCK_FLUSH BIT(5)
|
||||
#define RK_CRYPTO_PKA_START BIT(4)
|
||||
#define RK_CRYPTO_HASH_START BIT(3)
|
||||
#define RK_CRYPTO_BLOCK_START BIT(2)
|
||||
#define RK_CRYPTO_TDES_START BIT(1)
|
||||
#define RK_CRYPTO_AES_START BIT(0)
|
||||
|
||||
#define RK_CRYPTO_CONF 0x000c
|
||||
/* HASH Receive DMA Address Mode: fix | increment */
|
||||
#define RK_CRYPTO_HR_ADDR_MODE BIT(8)
|
||||
/* Block Transmit DMA Address Mode: fix | increment */
|
||||
#define RK_CRYPTO_BT_ADDR_MODE BIT(7)
|
||||
/* Block Receive DMA Address Mode: fix | increment */
|
||||
#define RK_CRYPTO_BR_ADDR_MODE BIT(6)
|
||||
#define RK_CRYPTO_BYTESWAP_HRFIFO BIT(5)
|
||||
#define RK_CRYPTO_BYTESWAP_BTFIFO BIT(4)
|
||||
#define RK_CRYPTO_BYTESWAP_BRFIFO BIT(3)
|
||||
/* AES = 0 OR DES = 1 */
|
||||
#define RK_CRYPTO_DESSEL BIT(2)
|
||||
#define RK_CYYPTO_HASHINSEL_INDEPENDENT_SOURCE _SBF(0x00, 0)
|
||||
#define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_INPUT _SBF(0x01, 0)
|
||||
#define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_OUTPUT _SBF(0x02, 0)
|
||||
|
||||
/* Block Receiving DMA Start Address Register */
|
||||
#define RK_CRYPTO_BRDMAS 0x0010
|
||||
/* Block Transmitting DMA Start Address Register */
|
||||
#define RK_CRYPTO_BTDMAS 0x0014
|
||||
/* Block Receiving DMA Length Register */
|
||||
#define RK_CRYPTO_BRDMAL 0x0018
|
||||
/* Hash Receiving DMA Start Address Register */
|
||||
#define RK_CRYPTO_HRDMAS 0x001c
|
||||
/* Hash Receiving DMA Length Register */
|
||||
#define RK_CRYPTO_HRDMAL 0x0020
|
||||
|
||||
/* AES registers */
|
||||
#define RK_CRYPTO_AES_CTRL 0x0080
|
||||
#define RK_CRYPTO_AES_BYTESWAP_CNT BIT(11)
|
||||
#define RK_CRYPTO_AES_BYTESWAP_KEY BIT(10)
|
||||
#define RK_CRYPTO_AES_BYTESWAP_IV BIT(9)
|
||||
#define RK_CRYPTO_AES_BYTESWAP_DO BIT(8)
|
||||
#define RK_CRYPTO_AES_BYTESWAP_DI BIT(7)
|
||||
#define RK_CRYPTO_AES_KEY_CHANGE BIT(6)
|
||||
#define RK_CRYPTO_AES_ECB_MODE _SBF(0x00, 4)
|
||||
#define RK_CRYPTO_AES_CBC_MODE _SBF(0x01, 4)
|
||||
#define RK_CRYPTO_AES_CTR_MODE _SBF(0x02, 4)
|
||||
#define RK_CRYPTO_AES_128BIT_key _SBF(0x00, 2)
|
||||
#define RK_CRYPTO_AES_192BIT_key _SBF(0x01, 2)
|
||||
#define RK_CRYPTO_AES_256BIT_key _SBF(0x02, 2)
|
||||
/* Slave = 0 / fifo = 1 */
|
||||
#define RK_CRYPTO_AES_FIFO_MODE BIT(1)
|
||||
/* Encryption = 0 , Decryption = 1 */
|
||||
#define RK_CRYPTO_AES_DEC BIT(0)
|
||||
|
||||
#define RK_CRYPTO_AES_STS 0x0084
|
||||
#define RK_CRYPTO_AES_DONE BIT(0)
|
||||
|
||||
/* AES Input Data 0-3 Register */
|
||||
#define RK_CRYPTO_AES_DIN_0 0x0088
|
||||
#define RK_CRYPTO_AES_DIN_1 0x008c
|
||||
#define RK_CRYPTO_AES_DIN_2 0x0090
|
||||
#define RK_CRYPTO_AES_DIN_3 0x0094
|
||||
|
||||
/* AES output Data 0-3 Register */
|
||||
#define RK_CRYPTO_AES_DOUT_0 0x0098
|
||||
#define RK_CRYPTO_AES_DOUT_1 0x009c
|
||||
#define RK_CRYPTO_AES_DOUT_2 0x00a0
|
||||
#define RK_CRYPTO_AES_DOUT_3 0x00a4
|
||||
|
||||
/* AES IV Data 0-3 Register */
|
||||
#define RK_CRYPTO_AES_IV_0 0x00a8
|
||||
#define RK_CRYPTO_AES_IV_1 0x00ac
|
||||
#define RK_CRYPTO_AES_IV_2 0x00b0
|
||||
#define RK_CRYPTO_AES_IV_3 0x00b4
|
||||
|
||||
/* AES Key Data 0-3 Register */
|
||||
#define RK_CRYPTO_AES_KEY_0 0x00b8
|
||||
#define RK_CRYPTO_AES_KEY_1 0x00bc
|
||||
#define RK_CRYPTO_AES_KEY_2 0x00c0
|
||||
#define RK_CRYPTO_AES_KEY_3 0x00c4
|
||||
#define RK_CRYPTO_AES_KEY_4 0x00c8
|
||||
#define RK_CRYPTO_AES_KEY_5 0x00cc
|
||||
#define RK_CRYPTO_AES_KEY_6 0x00d0
|
||||
#define RK_CRYPTO_AES_KEY_7 0x00d4
|
||||
|
||||
/* des/tdes */
|
||||
#define RK_CRYPTO_TDES_CTRL 0x0100
|
||||
#define RK_CRYPTO_TDES_BYTESWAP_KEY BIT(8)
|
||||
#define RK_CRYPTO_TDES_BYTESWAP_IV BIT(7)
|
||||
#define RK_CRYPTO_TDES_BYTESWAP_DO BIT(6)
|
||||
#define RK_CRYPTO_TDES_BYTESWAP_DI BIT(5)
|
||||
/* 0: ECB, 1: CBC */
|
||||
#define RK_CRYPTO_TDES_CHAINMODE_CBC BIT(4)
|
||||
/* TDES Key Mode, 0 : EDE, 1 : EEE */
|
||||
#define RK_CRYPTO_TDES_EEE BIT(3)
|
||||
/* 0: DES, 1:TDES */
|
||||
#define RK_CRYPTO_TDES_SELECT BIT(2)
|
||||
/* 0: Slave, 1:Fifo */
|
||||
#define RK_CRYPTO_TDES_FIFO_MODE BIT(1)
|
||||
/* Encryption = 0 , Decryption = 1 */
|
||||
#define RK_CRYPTO_TDES_DEC BIT(0)
|
||||
|
||||
#define RK_CRYPTO_TDES_STS 0x0104
|
||||
#define RK_CRYPTO_TDES_DONE BIT(0)
|
||||
|
||||
#define RK_CRYPTO_TDES_DIN_0 0x0108
|
||||
#define RK_CRYPTO_TDES_DIN_1 0x010c
|
||||
#define RK_CRYPTO_TDES_DOUT_0 0x0110
|
||||
#define RK_CRYPTO_TDES_DOUT_1 0x0114
|
||||
#define RK_CRYPTO_TDES_IV_0 0x0118
|
||||
#define RK_CRYPTO_TDES_IV_1 0x011c
|
||||
#define RK_CRYPTO_TDES_KEY1_0 0x0120
|
||||
#define RK_CRYPTO_TDES_KEY1_1 0x0124
|
||||
#define RK_CRYPTO_TDES_KEY2_0 0x0128
|
||||
#define RK_CRYPTO_TDES_KEY2_1 0x012c
|
||||
#define RK_CRYPTO_TDES_KEY3_0 0x0130
|
||||
#define RK_CRYPTO_TDES_KEY3_1 0x0134
|
||||
|
||||
#define CRYPTO_READ(dev, offset) \
|
||||
readl_relaxed(((dev)->reg + (offset)))
|
||||
#define CRYPTO_WRITE(dev, offset, val) \
|
||||
writel_relaxed((val), ((dev)->reg + (offset)))
|
||||
|
||||
struct rk_crypto_info {
|
||||
struct device *dev;
|
||||
struct clk *aclk;
|
||||
struct clk *hclk;
|
||||
struct clk *sclk;
|
||||
struct clk *dmaclk;
|
||||
struct reset_control *rst;
|
||||
void __iomem *reg;
|
||||
int irq;
|
||||
struct crypto_queue queue;
|
||||
struct tasklet_struct crypto_tasklet;
|
||||
struct ablkcipher_request *ablk_req;
|
||||
/* device lock */
|
||||
spinlock_t lock;
|
||||
|
||||
/* the public variable */
|
||||
struct scatterlist *sg_src;
|
||||
struct scatterlist *sg_dst;
|
||||
struct scatterlist sg_tmp;
|
||||
struct scatterlist *first;
|
||||
unsigned int left_bytes;
|
||||
void *addr_vir;
|
||||
int aligned;
|
||||
int align_size;
|
||||
size_t nents;
|
||||
unsigned int total;
|
||||
unsigned int count;
|
||||
u32 mode;
|
||||
dma_addr_t addr_in;
|
||||
dma_addr_t addr_out;
|
||||
int (*start)(struct rk_crypto_info *dev);
|
||||
int (*update)(struct rk_crypto_info *dev);
|
||||
void (*complete)(struct rk_crypto_info *dev, int err);
|
||||
int (*enable_clk)(struct rk_crypto_info *dev);
|
||||
void (*disable_clk)(struct rk_crypto_info *dev);
|
||||
int (*load_data)(struct rk_crypto_info *dev,
|
||||
struct scatterlist *sg_src,
|
||||
struct scatterlist *sg_dst);
|
||||
void (*unload_data)(struct rk_crypto_info *dev);
|
||||
};
|
||||
|
||||
/* the private variable of cipher */
|
||||
struct rk_cipher_ctx {
|
||||
struct rk_crypto_info *dev;
|
||||
unsigned int keylen;
|
||||
};
|
||||
|
||||
struct rk_crypto_tmp {
|
||||
struct rk_crypto_info *dev;
|
||||
struct crypto_alg alg;
|
||||
};
|
||||
|
||||
extern struct rk_crypto_tmp rk_ecb_aes_alg;
|
||||
extern struct rk_crypto_tmp rk_cbc_aes_alg;
|
||||
extern struct rk_crypto_tmp rk_ecb_des_alg;
|
||||
extern struct rk_crypto_tmp rk_cbc_des_alg;
|
||||
extern struct rk_crypto_tmp rk_ecb_des3_ede_alg;
|
||||
extern struct rk_crypto_tmp rk_cbc_des3_ede_alg;
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,503 @@
|
|||
/*
|
||||
* Crypto acceleration support for Rockchip RK3288
|
||||
*
|
||||
* Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
|
||||
*
|
||||
* Author: Zain Wang <zain.wang@rock-chips.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* Some ideas are from marvell-cesa.c and s5p-sss.c driver.
|
||||
*/
|
||||
#include "rk3288_crypto.h"
|
||||
|
||||
#define RK_CRYPTO_DEC BIT(0)
|
||||
|
||||
static void rk_crypto_complete(struct rk_crypto_info *dev, int err)
|
||||
{
|
||||
if (dev->ablk_req->base.complete)
|
||||
dev->ablk_req->base.complete(&dev->ablk_req->base, err);
|
||||
}
|
||||
|
||||
static int rk_handle_req(struct rk_crypto_info *dev,
|
||||
struct ablkcipher_request *req)
|
||||
{
|
||||
int err;
|
||||
|
||||
if (!IS_ALIGNED(req->nbytes, dev->align_size))
|
||||
return -EINVAL;
|
||||
|
||||
dev->left_bytes = req->nbytes;
|
||||
dev->total = req->nbytes;
|
||||
dev->sg_src = req->src;
|
||||
dev->first = req->src;
|
||||
dev->nents = sg_nents(req->src);
|
||||
dev->sg_dst = req->dst;
|
||||
dev->aligned = 1;
|
||||
dev->ablk_req = req;
|
||||
|
||||
spin_lock(&dev->lock);
|
||||
err = ablkcipher_enqueue_request(&dev->queue, req);
|
||||
spin_unlock(&dev->lock);
|
||||
tasklet_schedule(&dev->crypto_tasklet);
|
||||
return err;
|
||||
}
|
||||
|
||||
static int rk_aes_setkey(struct crypto_ablkcipher *cipher,
|
||||
const u8 *key, unsigned int keylen)
|
||||
{
|
||||
struct crypto_tfm *tfm = crypto_ablkcipher_tfm(cipher);
|
||||
struct rk_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
|
||||
|
||||
if (keylen != AES_KEYSIZE_128 && keylen != AES_KEYSIZE_192 &&
|
||||
keylen != AES_KEYSIZE_256) {
|
||||
crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
|
||||
return -EINVAL;
|
||||
}
|
||||
ctx->keylen = keylen;
|
||||
memcpy_toio(ctx->dev->reg + RK_CRYPTO_AES_KEY_0, key, keylen);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rk_tdes_setkey(struct crypto_ablkcipher *cipher,
|
||||
const u8 *key, unsigned int keylen)
|
||||
{
|
||||
struct crypto_tfm *tfm = crypto_ablkcipher_tfm(cipher);
|
||||
struct rk_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
|
||||
u32 tmp[DES_EXPKEY_WORDS];
|
||||
|
||||
if (keylen != DES_KEY_SIZE && keylen != DES3_EDE_KEY_SIZE) {
|
||||
crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (keylen == DES_KEY_SIZE) {
|
||||
if (!des_ekey(tmp, key) &&
|
||||
(tfm->crt_flags & CRYPTO_TFM_REQ_WEAK_KEY)) {
|
||||
tfm->crt_flags |= CRYPTO_TFM_RES_WEAK_KEY;
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
ctx->keylen = keylen;
|
||||
memcpy_toio(ctx->dev->reg + RK_CRYPTO_TDES_KEY1_0, key, keylen);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rk_aes_ecb_encrypt(struct ablkcipher_request *req)
|
||||
{
|
||||
struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
|
||||
struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
|
||||
struct rk_crypto_info *dev = ctx->dev;
|
||||
|
||||
dev->mode = RK_CRYPTO_AES_ECB_MODE;
|
||||
return rk_handle_req(dev, req);
|
||||
}
|
||||
|
||||
static int rk_aes_ecb_decrypt(struct ablkcipher_request *req)
|
||||
{
|
||||
struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
|
||||
struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
|
||||
struct rk_crypto_info *dev = ctx->dev;
|
||||
|
||||
dev->mode = RK_CRYPTO_AES_ECB_MODE | RK_CRYPTO_DEC;
|
||||
return rk_handle_req(dev, req);
|
||||
}
|
||||
|
||||
static int rk_aes_cbc_encrypt(struct ablkcipher_request *req)
|
||||
{
|
||||
struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
|
||||
struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
|
||||
struct rk_crypto_info *dev = ctx->dev;
|
||||
|
||||
dev->mode = RK_CRYPTO_AES_CBC_MODE;
|
||||
return rk_handle_req(dev, req);
|
||||
}
|
||||
|
||||
static int rk_aes_cbc_decrypt(struct ablkcipher_request *req)
|
||||
{
|
||||
struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
|
||||
struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
|
||||
struct rk_crypto_info *dev = ctx->dev;
|
||||
|
||||
dev->mode = RK_CRYPTO_AES_CBC_MODE | RK_CRYPTO_DEC;
|
||||
return rk_handle_req(dev, req);
|
||||
}
|
||||
|
||||
static int rk_des_ecb_encrypt(struct ablkcipher_request *req)
|
||||
{
|
||||
struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
|
||||
struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
|
||||
struct rk_crypto_info *dev = ctx->dev;
|
||||
|
||||
dev->mode = 0;
|
||||
return rk_handle_req(dev, req);
|
||||
}
|
||||
|
||||
static int rk_des_ecb_decrypt(struct ablkcipher_request *req)
|
||||
{
|
||||
struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
|
||||
struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
|
||||
struct rk_crypto_info *dev = ctx->dev;
|
||||
|
||||
dev->mode = RK_CRYPTO_DEC;
|
||||
return rk_handle_req(dev, req);
|
||||
}
|
||||
|
||||
static int rk_des_cbc_encrypt(struct ablkcipher_request *req)
|
||||
{
|
||||
struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
|
||||
struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
|
||||
struct rk_crypto_info *dev = ctx->dev;
|
||||
|
||||
dev->mode = RK_CRYPTO_TDES_CHAINMODE_CBC;
|
||||
return rk_handle_req(dev, req);
|
||||
}
|
||||
|
||||
static int rk_des_cbc_decrypt(struct ablkcipher_request *req)
|
||||
{
|
||||
struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
|
||||
struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
|
||||
struct rk_crypto_info *dev = ctx->dev;
|
||||
|
||||
dev->mode = RK_CRYPTO_TDES_CHAINMODE_CBC | RK_CRYPTO_DEC;
|
||||
return rk_handle_req(dev, req);
|
||||
}
|
||||
|
||||
static int rk_des3_ede_ecb_encrypt(struct ablkcipher_request *req)
|
||||
{
|
||||
struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
|
||||
struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
|
||||
struct rk_crypto_info *dev = ctx->dev;
|
||||
|
||||
dev->mode = RK_CRYPTO_TDES_SELECT;
|
||||
return rk_handle_req(dev, req);
|
||||
}
|
||||
|
||||
static int rk_des3_ede_ecb_decrypt(struct ablkcipher_request *req)
|
||||
{
|
||||
struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
|
||||
struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
|
||||
struct rk_crypto_info *dev = ctx->dev;
|
||||
|
||||
dev->mode = RK_CRYPTO_TDES_SELECT | RK_CRYPTO_DEC;
|
||||
return rk_handle_req(dev, req);
|
||||
}
|
||||
|
||||
static int rk_des3_ede_cbc_encrypt(struct ablkcipher_request *req)
|
||||
{
|
||||
struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
|
||||
struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
|
||||
struct rk_crypto_info *dev = ctx->dev;
|
||||
|
||||
dev->mode = RK_CRYPTO_TDES_SELECT | RK_CRYPTO_TDES_CHAINMODE_CBC;
|
||||
return rk_handle_req(dev, req);
|
||||
}
|
||||
|
||||
static int rk_des3_ede_cbc_decrypt(struct ablkcipher_request *req)
|
||||
{
|
||||
struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
|
||||
struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
|
||||
struct rk_crypto_info *dev = ctx->dev;
|
||||
|
||||
dev->mode = RK_CRYPTO_TDES_SELECT | RK_CRYPTO_TDES_CHAINMODE_CBC |
|
||||
RK_CRYPTO_DEC;
|
||||
return rk_handle_req(dev, req);
|
||||
}
|
||||
|
||||
static void rk_ablk_hw_init(struct rk_crypto_info *dev)
|
||||
{
|
||||
struct crypto_ablkcipher *cipher =
|
||||
crypto_ablkcipher_reqtfm(dev->ablk_req);
|
||||
struct crypto_tfm *tfm = crypto_ablkcipher_tfm(cipher);
|
||||
struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(cipher);
|
||||
u32 ivsize, block, conf_reg = 0;
|
||||
|
||||
block = crypto_tfm_alg_blocksize(tfm);
|
||||
ivsize = crypto_ablkcipher_ivsize(cipher);
|
||||
|
||||
if (block == DES_BLOCK_SIZE) {
|
||||
dev->mode |= RK_CRYPTO_TDES_FIFO_MODE |
|
||||
RK_CRYPTO_TDES_BYTESWAP_KEY |
|
||||
RK_CRYPTO_TDES_BYTESWAP_IV;
|
||||
CRYPTO_WRITE(dev, RK_CRYPTO_TDES_CTRL, dev->mode);
|
||||
memcpy_toio(dev->reg + RK_CRYPTO_TDES_IV_0,
|
||||
dev->ablk_req->info, ivsize);
|
||||
conf_reg = RK_CRYPTO_DESSEL;
|
||||
} else {
|
||||
dev->mode |= RK_CRYPTO_AES_FIFO_MODE |
|
||||
RK_CRYPTO_AES_KEY_CHANGE |
|
||||
RK_CRYPTO_AES_BYTESWAP_KEY |
|
||||
RK_CRYPTO_AES_BYTESWAP_IV;
|
||||
if (ctx->keylen == AES_KEYSIZE_192)
|
||||
dev->mode |= RK_CRYPTO_AES_192BIT_key;
|
||||
else if (ctx->keylen == AES_KEYSIZE_256)
|
||||
dev->mode |= RK_CRYPTO_AES_256BIT_key;
|
||||
CRYPTO_WRITE(dev, RK_CRYPTO_AES_CTRL, dev->mode);
|
||||
memcpy_toio(dev->reg + RK_CRYPTO_AES_IV_0,
|
||||
dev->ablk_req->info, ivsize);
|
||||
}
|
||||
conf_reg |= RK_CRYPTO_BYTESWAP_BTFIFO |
|
||||
RK_CRYPTO_BYTESWAP_BRFIFO;
|
||||
CRYPTO_WRITE(dev, RK_CRYPTO_CONF, conf_reg);
|
||||
CRYPTO_WRITE(dev, RK_CRYPTO_INTENA,
|
||||
RK_CRYPTO_BCDMA_ERR_ENA | RK_CRYPTO_BCDMA_DONE_ENA);
|
||||
}
|
||||
|
||||
static void crypto_dma_start(struct rk_crypto_info *dev)
|
||||
{
|
||||
CRYPTO_WRITE(dev, RK_CRYPTO_BRDMAS, dev->addr_in);
|
||||
CRYPTO_WRITE(dev, RK_CRYPTO_BRDMAL, dev->count / 4);
|
||||
CRYPTO_WRITE(dev, RK_CRYPTO_BTDMAS, dev->addr_out);
|
||||
CRYPTO_WRITE(dev, RK_CRYPTO_CTRL, RK_CRYPTO_BLOCK_START |
|
||||
_SBF(RK_CRYPTO_BLOCK_START, 16));
|
||||
}
|
||||
|
||||
static int rk_set_data_start(struct rk_crypto_info *dev)
|
||||
{
|
||||
int err;
|
||||
|
||||
err = dev->load_data(dev, dev->sg_src, dev->sg_dst);
|
||||
if (!err)
|
||||
crypto_dma_start(dev);
|
||||
return err;
|
||||
}
|
||||
|
||||
static int rk_ablk_start(struct rk_crypto_info *dev)
|
||||
{
|
||||
int err;
|
||||
|
||||
spin_lock(&dev->lock);
|
||||
rk_ablk_hw_init(dev);
|
||||
err = rk_set_data_start(dev);
|
||||
spin_unlock(&dev->lock);
|
||||
return err;
|
||||
}
|
||||
|
||||
static void rk_iv_copyback(struct rk_crypto_info *dev)
|
||||
{
|
||||
struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(dev->ablk_req);
|
||||
u32 ivsize = crypto_ablkcipher_ivsize(tfm);
|
||||
|
||||
if (ivsize == DES_BLOCK_SIZE)
|
||||
memcpy_fromio(dev->ablk_req->info,
|
||||
dev->reg + RK_CRYPTO_TDES_IV_0, ivsize);
|
||||
else if (ivsize == AES_BLOCK_SIZE)
|
||||
memcpy_fromio(dev->ablk_req->info,
|
||||
dev->reg + RK_CRYPTO_AES_IV_0, ivsize);
|
||||
}
|
||||
|
||||
/* return:
|
||||
* true some err was occurred
|
||||
* fault no err, continue
|
||||
*/
|
||||
static int rk_ablk_rx(struct rk_crypto_info *dev)
|
||||
{
|
||||
int err = 0;
|
||||
|
||||
dev->unload_data(dev);
|
||||
if (!dev->aligned) {
|
||||
if (!sg_pcopy_from_buffer(dev->ablk_req->dst, dev->nents,
|
||||
dev->addr_vir, dev->count,
|
||||
dev->total - dev->left_bytes -
|
||||
dev->count)) {
|
||||
err = -EINVAL;
|
||||
goto out_rx;
|
||||
}
|
||||
}
|
||||
if (dev->left_bytes) {
|
||||
if (dev->aligned) {
|
||||
if (sg_is_last(dev->sg_src)) {
|
||||
dev_err(dev->dev, "[%s:%d] Lack of data\n",
|
||||
__func__, __LINE__);
|
||||
err = -ENOMEM;
|
||||
goto out_rx;
|
||||
}
|
||||
dev->sg_src = sg_next(dev->sg_src);
|
||||
dev->sg_dst = sg_next(dev->sg_dst);
|
||||
}
|
||||
err = rk_set_data_start(dev);
|
||||
} else {
|
||||
rk_iv_copyback(dev);
|
||||
/* here show the calculation is over without any err */
|
||||
dev->complete(dev, 0);
|
||||
}
|
||||
out_rx:
|
||||
return err;
|
||||
}
|
||||
|
||||
static int rk_ablk_cra_init(struct crypto_tfm *tfm)
|
||||
{
|
||||
struct rk_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
|
||||
struct crypto_alg *alg = tfm->__crt_alg;
|
||||
struct rk_crypto_tmp *algt;
|
||||
|
||||
algt = container_of(alg, struct rk_crypto_tmp, alg);
|
||||
|
||||
ctx->dev = algt->dev;
|
||||
ctx->dev->align_size = crypto_tfm_alg_alignmask(tfm) + 1;
|
||||
ctx->dev->start = rk_ablk_start;
|
||||
ctx->dev->update = rk_ablk_rx;
|
||||
ctx->dev->complete = rk_crypto_complete;
|
||||
ctx->dev->addr_vir = (char *)__get_free_page(GFP_KERNEL);
|
||||
|
||||
return ctx->dev->addr_vir ? ctx->dev->enable_clk(ctx->dev) : -ENOMEM;
|
||||
}
|
||||
|
||||
static void rk_ablk_cra_exit(struct crypto_tfm *tfm)
|
||||
{
|
||||
struct rk_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
|
||||
|
||||
free_page((unsigned long)ctx->dev->addr_vir);
|
||||
ctx->dev->disable_clk(ctx->dev);
|
||||
}
|
||||
|
||||
struct rk_crypto_tmp rk_ecb_aes_alg = {
|
||||
.alg = {
|
||||
.cra_name = "ecb(aes)",
|
||||
.cra_driver_name = "ecb-aes-rk",
|
||||
.cra_priority = 300,
|
||||
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
|
||||
CRYPTO_ALG_ASYNC,
|
||||
.cra_blocksize = AES_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct rk_cipher_ctx),
|
||||
.cra_alignmask = 0x0f,
|
||||
.cra_type = &crypto_ablkcipher_type,
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_init = rk_ablk_cra_init,
|
||||
.cra_exit = rk_ablk_cra_exit,
|
||||
.cra_u.ablkcipher = {
|
||||
.min_keysize = AES_MIN_KEY_SIZE,
|
||||
.max_keysize = AES_MAX_KEY_SIZE,
|
||||
.setkey = rk_aes_setkey,
|
||||
.encrypt = rk_aes_ecb_encrypt,
|
||||
.decrypt = rk_aes_ecb_decrypt,
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
struct rk_crypto_tmp rk_cbc_aes_alg = {
|
||||
.alg = {
|
||||
.cra_name = "cbc(aes)",
|
||||
.cra_driver_name = "cbc-aes-rk",
|
||||
.cra_priority = 300,
|
||||
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
|
||||
CRYPTO_ALG_ASYNC,
|
||||
.cra_blocksize = AES_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct rk_cipher_ctx),
|
||||
.cra_alignmask = 0x0f,
|
||||
.cra_type = &crypto_ablkcipher_type,
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_init = rk_ablk_cra_init,
|
||||
.cra_exit = rk_ablk_cra_exit,
|
||||
.cra_u.ablkcipher = {
|
||||
.min_keysize = AES_MIN_KEY_SIZE,
|
||||
.max_keysize = AES_MAX_KEY_SIZE,
|
||||
.ivsize = AES_BLOCK_SIZE,
|
||||
.setkey = rk_aes_setkey,
|
||||
.encrypt = rk_aes_cbc_encrypt,
|
||||
.decrypt = rk_aes_cbc_decrypt,
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
struct rk_crypto_tmp rk_ecb_des_alg = {
|
||||
.alg = {
|
||||
.cra_name = "ecb(des)",
|
||||
.cra_driver_name = "ecb-des-rk",
|
||||
.cra_priority = 300,
|
||||
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
|
||||
CRYPTO_ALG_ASYNC,
|
||||
.cra_blocksize = DES_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct rk_cipher_ctx),
|
||||
.cra_alignmask = 0x07,
|
||||
.cra_type = &crypto_ablkcipher_type,
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_init = rk_ablk_cra_init,
|
||||
.cra_exit = rk_ablk_cra_exit,
|
||||
.cra_u.ablkcipher = {
|
||||
.min_keysize = DES_KEY_SIZE,
|
||||
.max_keysize = DES_KEY_SIZE,
|
||||
.setkey = rk_tdes_setkey,
|
||||
.encrypt = rk_des_ecb_encrypt,
|
||||
.decrypt = rk_des_ecb_decrypt,
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
struct rk_crypto_tmp rk_cbc_des_alg = {
|
||||
.alg = {
|
||||
.cra_name = "cbc(des)",
|
||||
.cra_driver_name = "cbc-des-rk",
|
||||
.cra_priority = 300,
|
||||
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
|
||||
CRYPTO_ALG_ASYNC,
|
||||
.cra_blocksize = DES_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct rk_cipher_ctx),
|
||||
.cra_alignmask = 0x07,
|
||||
.cra_type = &crypto_ablkcipher_type,
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_init = rk_ablk_cra_init,
|
||||
.cra_exit = rk_ablk_cra_exit,
|
||||
.cra_u.ablkcipher = {
|
||||
.min_keysize = DES_KEY_SIZE,
|
||||
.max_keysize = DES_KEY_SIZE,
|
||||
.ivsize = DES_BLOCK_SIZE,
|
||||
.setkey = rk_tdes_setkey,
|
||||
.encrypt = rk_des_cbc_encrypt,
|
||||
.decrypt = rk_des_cbc_decrypt,
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
struct rk_crypto_tmp rk_ecb_des3_ede_alg = {
|
||||
.alg = {
|
||||
.cra_name = "ecb(des3_ede)",
|
||||
.cra_driver_name = "ecb-des3-ede-rk",
|
||||
.cra_priority = 300,
|
||||
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
|
||||
CRYPTO_ALG_ASYNC,
|
||||
.cra_blocksize = DES_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct rk_cipher_ctx),
|
||||
.cra_alignmask = 0x07,
|
||||
.cra_type = &crypto_ablkcipher_type,
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_init = rk_ablk_cra_init,
|
||||
.cra_exit = rk_ablk_cra_exit,
|
||||
.cra_u.ablkcipher = {
|
||||
.min_keysize = DES3_EDE_KEY_SIZE,
|
||||
.max_keysize = DES3_EDE_KEY_SIZE,
|
||||
.ivsize = DES_BLOCK_SIZE,
|
||||
.setkey = rk_tdes_setkey,
|
||||
.encrypt = rk_des3_ede_ecb_encrypt,
|
||||
.decrypt = rk_des3_ede_ecb_decrypt,
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
struct rk_crypto_tmp rk_cbc_des3_ede_alg = {
|
||||
.alg = {
|
||||
.cra_name = "cbc(des3_ede)",
|
||||
.cra_driver_name = "cbc-des3-ede-rk",
|
||||
.cra_priority = 300,
|
||||
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
|
||||
CRYPTO_ALG_ASYNC,
|
||||
.cra_blocksize = DES_BLOCK_SIZE,
|
||||
.cra_ctxsize = sizeof(struct rk_cipher_ctx),
|
||||
.cra_alignmask = 0x07,
|
||||
.cra_type = &crypto_ablkcipher_type,
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_init = rk_ablk_cra_init,
|
||||
.cra_exit = rk_ablk_cra_exit,
|
||||
.cra_u.ablkcipher = {
|
||||
.min_keysize = DES3_EDE_KEY_SIZE,
|
||||
.max_keysize = DES3_EDE_KEY_SIZE,
|
||||
.ivsize = DES_BLOCK_SIZE,
|
||||
.setkey = rk_tdes_setkey,
|
||||
.encrypt = rk_des3_ede_cbc_encrypt,
|
||||
.decrypt = rk_des3_ede_cbc_decrypt,
|
||||
}
|
||||
}
|
||||
};
|
||||
Loading…
Reference in New Issue