Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
Pull sparc fixes from David Miller: 1) Fix NULL oops in Schizo PCI controller error handler. 2) Fix race between xchg and other operations on 32-bit sparc, from Andreas Larsson. 3) swab*() helpers need a dummy memory input operand to show data flow on 64-bit sparc. 4) Fix RCU warnings due to missing irq_{enter,exit}() around generic_smp_call_function*() calls. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc: sparc64: Fix constraints on swab helpers. sparc32: Implement xchg and atomic_xchg using ATOMIC_HASH locks sparc64: Do irq_{enter,exit}() around generic_smp_call_function*(). sparc64: Fix crashes in schizo_pcierr_intr_other().
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commit
435e46f5d3
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@ -22,7 +22,7 @@
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int atomic_add_return(int, atomic_t *);
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int atomic_cmpxchg(atomic_t *, int, int);
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#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
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int atomic_xchg(atomic_t *, int);
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int __atomic_add_unless(atomic_t *, int, int);
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void atomic_set(atomic_t *, int);
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@ -11,22 +11,14 @@
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#ifndef __ARCH_SPARC_CMPXCHG__
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#define __ARCH_SPARC_CMPXCHG__
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static inline unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val)
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{
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__asm__ __volatile__("swap [%2], %0"
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: "=&r" (val)
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: "0" (val), "r" (m)
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: "memory");
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return val;
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}
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unsigned long __xchg_u32(volatile u32 *m, u32 new);
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void __xchg_called_with_bad_pointer(void);
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static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, int size)
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{
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switch (size) {
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case 4:
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return xchg_u32(ptr, x);
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return __xchg_u32(ptr, x);
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}
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__xchg_called_with_bad_pointer();
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return x;
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@ -9,9 +9,9 @@ static inline __u16 __arch_swab16p(const __u16 *addr)
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{
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__u16 ret;
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__asm__ __volatile__ ("lduha [%1] %2, %0"
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__asm__ __volatile__ ("lduha [%2] %3, %0"
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: "=r" (ret)
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: "r" (addr), "i" (ASI_PL));
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: "m" (*addr), "r" (addr), "i" (ASI_PL));
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return ret;
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}
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#define __arch_swab16p __arch_swab16p
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@ -20,9 +20,9 @@ static inline __u32 __arch_swab32p(const __u32 *addr)
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{
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__u32 ret;
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__asm__ __volatile__ ("lduwa [%1] %2, %0"
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__asm__ __volatile__ ("lduwa [%2] %3, %0"
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: "=r" (ret)
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: "r" (addr), "i" (ASI_PL));
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: "m" (*addr), "r" (addr), "i" (ASI_PL));
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return ret;
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}
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#define __arch_swab32p __arch_swab32p
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@ -31,9 +31,9 @@ static inline __u64 __arch_swab64p(const __u64 *addr)
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{
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__u64 ret;
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__asm__ __volatile__ ("ldxa [%1] %2, %0"
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__asm__ __volatile__ ("ldxa [%2] %3, %0"
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: "=r" (ret)
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: "r" (addr), "i" (ASI_PL));
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: "m" (*addr), "r" (addr), "i" (ASI_PL));
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return ret;
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}
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#define __arch_swab64p __arch_swab64p
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@ -581,7 +581,7 @@ static irqreturn_t schizo_pcierr_intr_other(struct pci_pbm_info *pbm)
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{
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unsigned long csr_reg, csr, csr_error_bits;
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irqreturn_t ret = IRQ_NONE;
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u16 stat;
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u32 stat;
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csr_reg = pbm->pbm_regs + SCHIZO_PCI_CTRL;
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csr = upa_readq(csr_reg);
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@ -617,7 +617,7 @@ static irqreturn_t schizo_pcierr_intr_other(struct pci_pbm_info *pbm)
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pbm->name);
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ret = IRQ_HANDLED;
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}
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pci_read_config_word(pbm->pci_bus->self, PCI_STATUS, &stat);
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pbm->pci_ops->read(pbm->pci_bus, 0, PCI_STATUS, 2, &stat);
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if (stat & (PCI_STATUS_PARITY |
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PCI_STATUS_SIG_TARGET_ABORT |
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PCI_STATUS_REC_TARGET_ABORT |
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@ -625,7 +625,7 @@ static irqreturn_t schizo_pcierr_intr_other(struct pci_pbm_info *pbm)
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PCI_STATUS_SIG_SYSTEM_ERROR)) {
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printk("%s: PCI bus error, PCI_STATUS[%04x]\n",
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pbm->name, stat);
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pci_write_config_word(pbm->pci_bus->self, PCI_STATUS, 0xffff);
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pbm->pci_ops->write(pbm->pci_bus, 0, PCI_STATUS, 2, 0xffff);
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ret = IRQ_HANDLED;
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}
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return ret;
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@ -816,13 +816,17 @@ void arch_send_call_function_single_ipi(int cpu)
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void __irq_entry smp_call_function_client(int irq, struct pt_regs *regs)
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{
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clear_softint(1 << irq);
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irq_enter();
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generic_smp_call_function_interrupt();
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irq_exit();
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}
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void __irq_entry smp_call_function_single_client(int irq, struct pt_regs *regs)
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{
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clear_softint(1 << irq);
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irq_enter();
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generic_smp_call_function_single_interrupt();
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irq_exit();
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}
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static void tsb_sync(void *info)
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@ -45,6 +45,19 @@ ATOMIC_OP(add, +=)
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#undef ATOMIC_OP
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int atomic_xchg(atomic_t *v, int new)
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{
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int ret;
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unsigned long flags;
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spin_lock_irqsave(ATOMIC_HASH(v), flags);
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ret = v->counter;
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v->counter = new;
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spin_unlock_irqrestore(ATOMIC_HASH(v), flags);
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return ret;
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}
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EXPORT_SYMBOL(atomic_xchg);
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int atomic_cmpxchg(atomic_t *v, int old, int new)
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{
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int ret;
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@ -137,3 +150,17 @@ unsigned long __cmpxchg_u32(volatile u32 *ptr, u32 old, u32 new)
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return (unsigned long)prev;
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}
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EXPORT_SYMBOL(__cmpxchg_u32);
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unsigned long __xchg_u32(volatile u32 *ptr, u32 new)
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{
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unsigned long flags;
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u32 prev;
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spin_lock_irqsave(ATOMIC_HASH(ptr), flags);
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prev = *ptr;
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*ptr = new;
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spin_unlock_irqrestore(ATOMIC_HASH(ptr), flags);
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return (unsigned long)prev;
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}
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EXPORT_SYMBOL(__xchg_u32);
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