V4L/DVB (7912): TDA10023: make few parameters configurable
- separate TDA10021 and TDA10023 attach - configurable Xtal settings - configurable input freq offset + baseband conversion type settings Signed-off-by: Antti Palosaari <crope@iki.fi> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
This commit is contained in:
Antti Palosaari
Mauro Carvalho Chehab
parent
34cb61693e
commit
4388c3b4fe
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@ -38,75 +38,29 @@
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#include "dvb_frontend.h"
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#include "tda1002x.h"
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#define REG0_INIT_VAL 0x23
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struct tda10023_state {
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struct i2c_adapter* i2c;
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/* configuration settings */
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const struct tda1002x_config* config;
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const struct tda10023_config *config;
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struct dvb_frontend frontend;
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u8 pwm;
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u8 reg0;
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};
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/* clock settings */
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u32 xtal;
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u8 pll_m;
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u8 pll_p;
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u8 pll_n;
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u32 sysclk;
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};
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#define dprintk(x...)
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static int verbose;
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#define XTAL 28920000UL
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#define PLL_M 8UL
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#define PLL_P 4UL
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#define PLL_N 1UL
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#define SYSCLK (XTAL*PLL_M/(PLL_N*PLL_P)) // -> 57840000
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static u8 tda10023_inittab[]={
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// reg mask val
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0x2a,0xff,0x02, // PLL3, Bypass, Power Down
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0xff,0x64,0x00, // Sleep 100ms
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0x2a,0xff,0x03, // PLL3, Bypass, Power Down
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0xff,0x64,0x00, // Sleep 100ms
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0x28,0xff,PLL_M-1, // PLL1 M=8
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0x29,0xff,((PLL_P-1)<<6)|(PLL_N-1), // PLL2
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0x00,0xff,0x23, // GPR FSAMPLING=1
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0x2a,0xff,0x08, // PLL3 PSACLK=1
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0xff,0x64,0x00, // Sleep 100ms
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0x1f,0xff,0x00, // RESET
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0xff,0x64,0x00, // Sleep 100ms
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0xe6,0x0c,0x04, // RSCFG_IND
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0x10,0xc0,0x80, // DECDVBCFG1 PBER=1
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0x0e,0xff,0x82, // GAIN1
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0x03,0x08,0x08, // CLKCONF DYN=1
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0x2e,0xbf,0x30, // AGCCONF2 TRIAGC=0,POSAGC=ENAGCIF=1 PPWMTUN=0 PPWMIF=0
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0x01,0xff,0x30, // AGCREF
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0x1e,0x84,0x84, // CONTROL SACLK_ON=1
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0x1b,0xff,0xc8, // ADC TWOS=1
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0x3b,0xff,0xff, // IFMAX
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0x3c,0xff,0x00, // IFMIN
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0x34,0xff,0x00, // PWMREF
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0x35,0xff,0xff, // TUNMAX
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0x36,0xff,0x00, // TUNMIN
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0x06,0xff,0x7f, // EQCONF1 POSI=7 ENADAPT=ENEQUAL=DFE=1 // 0x77
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0x1c,0x30,0x30, // EQCONF2 STEPALGO=SGNALGO=1
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0x37,0xff,0xf6, // DELTAF_LSB
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0x38,0xff,0xff, // DELTAF_MSB
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0x02,0xff,0x93, // AGCCONF1 IFS=1 KAGCIF=2 KAGCTUN=3
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0x2d,0xff,0xf6, // SWEEP SWPOS=1 SWDYN=7 SWSTEP=1 SWLEN=2
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0x04,0x10,0x00, // SWRAMP=1
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0x12,0xff,0xa1, // INTP1 POCLKP=1 FEL=1 MFS=0
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0x2b,0x01,0xa1, // INTS1
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0x20,0xff,0x04, // INTP2 SWAPP=? MSBFIRSTP=? INTPSEL=?
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0x2c,0xff,0x0d, // INTP/S TRIP=0 TRIS=0
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0xc4,0xff,0x00,
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0xc3,0x30,0x00,
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0xb5,0xff,0x19, // ERAGC_THD
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0x00,0x03,0x01, // GPR, CLBS soft reset
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0x00,0x03,0x03, // GPR, CLBS soft reset
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0xff,0x64,0x00, // Sleep 100ms
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0xff,0xff,0xff
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};
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static u8 tda10023_readreg (struct tda10023_state* state, u8 reg)
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{
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u8 b0 [] = { reg };
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@ -219,30 +173,34 @@ static int tda10023_set_symbolrate (struct tda10023_state* state, u32 sr)
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s16 SFIL=0;
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u16 NDEC = 0;
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if (sr < (u32)(SYSCLK/98.40)) {
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/* avoid floating point operations multiplying syscloc and divider
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by 10 */
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u32 sysclk_x_10 = state->sysclk * 10;
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if (sr < (u32)(sysclk_x_10/984)) {
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NDEC=3;
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SFIL=1;
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} else if (sr<(u32)(SYSCLK/64.0)) {
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} else if (sr < (u32)(sysclk_x_10/640)) {
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NDEC=3;
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SFIL=0;
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} else if (sr<(u32)(SYSCLK/49.2)) {
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} else if (sr < (u32)(sysclk_x_10/492)) {
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NDEC=2;
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SFIL=1;
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} else if (sr<(u32)(SYSCLK/32.0)) {
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} else if (sr < (u32)(sysclk_x_10/320)) {
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NDEC=2;
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SFIL=0;
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} else if (sr<(u32)(SYSCLK/24.6)) {
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} else if (sr < (u32)(sysclk_x_10/246)) {
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NDEC=1;
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SFIL=1;
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} else if (sr<(u32)(SYSCLK/16.0)) {
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} else if (sr < (u32)(sysclk_x_10/160)) {
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NDEC=1;
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SFIL=0;
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} else if (sr<(u32)(SYSCLK/12.3)) {
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} else if (sr < (u32)(sysclk_x_10/123)) {
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NDEC=0;
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SFIL=1;
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}
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BDRI=SYSCLK*16;
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BDRI = (state->sysclk)*16;
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BDRI>>=NDEC;
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BDRI +=sr/2;
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BDRI /=sr;
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@ -255,11 +213,12 @@ static int tda10023_set_symbolrate (struct tda10023_state* state, u32 sr)
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BDRX=1<<(24+NDEC);
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BDRX*=sr;
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do_div(BDRX,SYSCLK); // BDRX/=SYSCLK;
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do_div(BDRX, state->sysclk); /* BDRX/=SYSCLK; */
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BDR=(s32)BDRX;
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}
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// printk("Symbolrate %i, BDR %i BDRI %i, NDEC %i\n",sr,BDR,BDRI,NDEC);
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dprintk("Symbolrate %i, BDR %i BDRI %i, NDEC %i\n",
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sr, BDR, BDRI, NDEC);
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tda10023_writebit (state, 0x03, 0xc0, NDEC<<6);
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tda10023_writereg (state, 0x0a, BDR&255);
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tda10023_writereg (state, 0x0b, (BDR>>8)&255);
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@ -272,8 +231,63 @@ static int tda10023_set_symbolrate (struct tda10023_state* state, u32 sr)
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static int tda10023_init (struct dvb_frontend *fe)
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{
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struct tda10023_state* state = fe->demodulator_priv;
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u8 tda10023_inittab[] = {
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/* reg mask val */
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/* 000 */ 0x2a, 0xff, 0x02, /* PLL3, Bypass, Power Down */
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/* 003 */ 0xff, 0x64, 0x00, /* Sleep 100ms */
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/* 006 */ 0x2a, 0xff, 0x03, /* PLL3, Bypass, Power Down */
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/* 009 */ 0xff, 0x64, 0x00, /* Sleep 100ms */
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/* PLL1 */
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/* 012 */ 0x28, 0xff, (state->pll_m-1),
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/* PLL2 */
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/* 015 */ 0x29, 0xff, ((state->pll_p-1)<<6)|(state->pll_n-1),
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/* GPR FSAMPLING=1 */
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/* 018 */ 0x00, 0xff, REG0_INIT_VAL,
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/* 021 */ 0x2a, 0xff, 0x08, /* PLL3 PSACLK=1 */
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/* 024 */ 0xff, 0x64, 0x00, /* Sleep 100ms */
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/* 027 */ 0x1f, 0xff, 0x00, /* RESET */
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/* 030 */ 0xff, 0x64, 0x00, /* Sleep 100ms */
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/* 033 */ 0xe6, 0x0c, 0x04, /* RSCFG_IND */
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/* 036 */ 0x10, 0xc0, 0x80, /* DECDVBCFG1 PBER=1 */
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dprintk("DVB: TDA10023(%d): init chip\n", fe->adapter->num);
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/* 039 */ 0x0e, 0xff, 0x82, /* GAIN1 */
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/* 042 */ 0x03, 0x08, 0x08, /* CLKCONF DYN=1 */
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/* 045 */ 0x2e, 0xbf, 0x30, /* AGCCONF2 TRIAGC=0,POSAGC=ENAGCIF=1
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PPWMTUN=0 PPWMIF=0 */
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/* 048 */ 0x01, 0xff, 0x30, /* AGCREF */
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/* 051 */ 0x1e, 0x84, 0x84, /* CONTROL SACLK_ON=1 */
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/* 054 */ 0x1b, 0xff, 0xc8, /* ADC TWOS=1 */
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/* 057 */ 0x3b, 0xff, 0xff, /* IFMAX */
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/* 060 */ 0x3c, 0xff, 0x00, /* IFMIN */
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/* 063 */ 0x34, 0xff, 0x00, /* PWMREF */
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/* 066 */ 0x35, 0xff, 0xff, /* TUNMAX */
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/* 069 */ 0x36, 0xff, 0x00, /* TUNMIN */
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/* 072 */ 0x06, 0xff, 0x7f, /* EQCONF1 POSI=7 ENADAPT=ENEQUAL=DFE=1 */
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/* 075 */ 0x1c, 0x30, 0x30, /* EQCONF2 STEPALGO=SGNALGO=1 */
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/* 078 */ 0x37, 0xff, 0xf6, /* DELTAF_LSB */
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/* 081 */ 0x38, 0xff, 0xff, /* DELTAF_MSB */
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/* 084 */ 0x02, 0xff, 0x93, /* AGCCONF1 IFS=1 KAGCIF=2 KAGCTUN=3 */
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/* 087 */ 0x2d, 0xff, 0xf6, /* SWEEP SWPOS=1 SWDYN=7 SWSTEP=1 SWLEN=2 */
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/* 090 */ 0x04, 0x10, 0x00, /* SWRAMP=1 */
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/* 093 */ 0x12, 0xff, 0xa1, /* INTP1 POCLKP=1 FEL=1 MFS=0 */
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/* 096 */ 0x2b, 0x01, 0xa1, /* INTS1 */
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/* 099 */ 0x20, 0xff, 0x04, /* INTP2 SWAPP=? MSBFIRSTP=? INTPSEL=? */
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/* 102 */ 0x2c, 0xff, 0x0d, /* INTP/S TRIP=0 TRIS=0 */
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/* 105 */ 0xc4, 0xff, 0x00,
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/* 108 */ 0xc3, 0x30, 0x00,
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/* 111 */ 0xb5, 0xff, 0x19, /* ERAGC_THD */
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/* 114 */ 0x00, 0x03, 0x01, /* GPR, CLBS soft reset */
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/* 117 */ 0x00, 0x03, 0x03, /* GPR, CLBS soft reset */
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/* 120 */ 0xff, 0x64, 0x00, /* Sleep 100ms */
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/* 123 */ 0xff, 0xff, 0xff
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};
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dprintk("DVB: TDA10023(%d): init chip\n", fe->dvb->num);
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/* override default values if set in config */
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if (state->config->deltaf) {
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tda10023_inittab[80] = (state->config->deltaf & 0xff);
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tda10023_inittab[83] = (state->config->deltaf >> 8);
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}
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tda10023_writetab(state, tda10023_inittab);
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@ -460,12 +474,11 @@ static void tda10023_release(struct dvb_frontend* fe)
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static struct dvb_frontend_ops tda10023_ops;
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struct dvb_frontend* tda10023_attach(const struct tda1002x_config* config,
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struct i2c_adapter* i2c,
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struct dvb_frontend *tda10023_attach(const struct tda10023_config *config,
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struct i2c_adapter *i2c,
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u8 pwm)
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{
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struct tda10023_state* state = NULL;
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int i;
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/* allocate memory for the internal state */
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state = kzalloc(sizeof(struct tda10023_state), GFP_KERNEL);
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@ -474,22 +487,40 @@ struct dvb_frontend* tda10023_attach(const struct tda1002x_config* config,
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/* setup the state */
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state->config = config;
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state->i2c = i2c;
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memcpy(&state->frontend.ops, &tda10023_ops, sizeof(struct dvb_frontend_ops));
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state->pwm = pwm;
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for (i=0; i < ARRAY_SIZE(tda10023_inittab);i+=3) {
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if (tda10023_inittab[i] == 0x00) {
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state->reg0 = tda10023_inittab[i+2];
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break;
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}
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}
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// Wakeup if in standby
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/* wakeup if in standby */
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tda10023_writereg (state, 0x00, 0x33);
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/* check if the demod is there */
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if ((tda10023_readreg(state, 0x1a) & 0xf0) != 0x70) goto error;
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/* create dvb_frontend */
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memcpy(&state->frontend.ops, &tda10023_ops, sizeof(struct dvb_frontend_ops));
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state->pwm = pwm;
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state->reg0 = REG0_INIT_VAL;
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if (state->config->xtal) {
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state->xtal = state->config->xtal;
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state->pll_m = state->config->pll_m;
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state->pll_p = state->config->pll_p;
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state->pll_n = state->config->pll_n;
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} else {
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/* set default values if not defined in config */
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state->xtal = 28920000;
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state->pll_m = 8;
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state->pll_p = 4;
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state->pll_n = 1;
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}
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/* calc sysclk */
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state->sysclk = (state->xtal * state->pll_m / \
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(state->pll_n * state->pll_p));
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state->frontend.ops.info.symbol_rate_min = (state->sysclk/2)/64;
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state->frontend.ops.info.symbol_rate_max = (state->sysclk/2)/4;
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dprintk("DVB: TDA10023 %s: xtal:%d pll_m:%d pll_p:%d pll_n:%d\n",
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__func__, state->xtal, state->pll_m, state->pll_p,
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state->pll_n);
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state->frontend.demodulator_priv = state;
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return &state->frontend;
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@ -504,10 +535,10 @@ static struct dvb_frontend_ops tda10023_ops = {
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.name = "Philips TDA10023 DVB-C",
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.type = FE_QAM,
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.frequency_stepsize = 62500,
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.frequency_min = 47000000,
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.frequency_min = 47000000,
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.frequency_max = 862000000,
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.symbol_rate_min = (SYSCLK/2)/64, /* SACLK/64 == (SYSCLK/2)/64 */
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.symbol_rate_max = (SYSCLK/2)/4, /* SACLK/4 */
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.symbol_rate_min = 0, /* set in tda10023_attach */
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.symbol_rate_max = 0, /* set in tda10023_attach */
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.caps = 0x400 | //FE_CAN_QAM_4
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FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
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FE_CAN_QAM_128 | FE_CAN_QAM_256 |
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@ -26,13 +26,27 @@
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#include <linux/dvb/frontend.h>
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struct tda1002x_config
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{
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struct tda1002x_config {
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/* the demodulator's i2c address */
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u8 demod_address;
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u8 invert;
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};
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struct tda10023_config {
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/* the demodulator's i2c address */
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u8 demod_address;
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u8 invert;
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/* clock settings */
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u32 xtal; /* defaults: 28920000 */
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u8 pll_m; /* defaults: 8 */
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u8 pll_p; /* defaults: 4 */
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u8 pll_n; /* defaults: 1 */
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/* input freq offset + baseband conversion type */
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u16 deltaf;
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};
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#if defined(CONFIG_DVB_TDA10021) || (defined(CONFIG_DVB_TDA10021_MODULE) && defined(MODULE))
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extern struct dvb_frontend* tda10021_attach(const struct tda1002x_config* config,
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struct i2c_adapter* i2c, u8 pwm);
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@ -45,12 +59,15 @@ static inline struct dvb_frontend* tda10021_attach(const struct tda1002x_config*
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}
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#endif // CONFIG_DVB_TDA10021
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#if defined(CONFIG_DVB_TDA10023) || (defined(CONFIG_DVB_TDA10023_MODULE) && defined(MODULE))
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extern struct dvb_frontend* tda10023_attach(const struct tda1002x_config* config,
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struct i2c_adapter* i2c, u8 pwm);
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#if defined(CONFIG_DVB_TDA10023) || \
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(defined(CONFIG_DVB_TDA10023_MODULE) && defined(MODULE))
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extern struct dvb_frontend *tda10023_attach(
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const struct tda10023_config *config,
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struct i2c_adapter *i2c, u8 pwm);
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#else
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static inline struct dvb_frontend* tda10023_attach(const struct tda1002x_config* config,
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struct i2c_adapter* i2c, u8 pwm)
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static inline struct dvb_frontend *tda10023_attach(
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const struct tda1002x_config *config,
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struct i2c_adapter *i2c, u8 pwm)
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{
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printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
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return NULL;
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@ -667,6 +667,11 @@ static struct tda1002x_config philips_cu1216_config_altaddress = {
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.invert = 0,
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};
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static struct tda10023_config philips_cu1216_tda10023_config = {
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.demod_address = 0x0c,
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.invert = 1,
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};
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static int philips_tu1216_tuner_init(struct dvb_frontend *fe)
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{
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struct budget *budget = (struct budget *) fe->dvb->priv;
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@ -1019,9 +1024,10 @@ static void frontend_init(struct budget_av *budget_av)
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case SUBID_DVBC_KNC1_PLUS_MK3:
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budget_av->reinitialise_demod = 1;
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budget_av->budget.dev->i2c_bitrate = SAA7146_I2C_BUS_BIT_RATE_240;
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fe = dvb_attach(tda10023_attach, &philips_cu1216_config,
|
||||
&budget_av->budget.i2c_adap,
|
||||
read_pwm(budget_av));
|
||||
fe = dvb_attach(tda10023_attach,
|
||||
&philips_cu1216_tda10023_config,
|
||||
&budget_av->budget.i2c_adap,
|
||||
read_pwm(budget_av));
|
||||
if (fe) {
|
||||
fe->ops.tuner_ops.set_params = philips_cu1216_tuner_set_params;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue