arm64/sve: ptrace and ELF coredump support
This patch defines and implements a new regset NT_ARM_SVE, which describes a thread's SVE register state. This allows a debugger to manipulate the SVE state, as well as being included in ELF coredumps for post-mortem debugging. Because the regset size and layout are dependent on the thread's current vector length, it is not possible to define a C struct to describe the regset contents as is done for existing regsets. Instead, and for the same reasons, NT_ARM_SVE is based on the freeform variable-layout approach used for the SVE signal frame. Additionally, to reduce debug overhead when debugging threads that might or might not have live SVE register state, NT_ARM_SVE may be presented in one of two different formats: the old struct user_fpsimd_state format is embedded for describing the state of a thread with no live SVE state, whereas a new variable-layout structure is embedded for describing live SVE state. This avoids a debugger needing to poll NT_PRFPREG in addition to NT_ARM_SVE, and allows existing userspace code to handle the non-SVE case without too much modification. For this to work, NT_ARM_SVE is defined with a fixed-format header of type struct user_sve_header, which the recipient can use to figure out the content, size and layout of the reset of the regset. Accessor macros are defined to allow the vector-length-dependent parts of the regset to be manipulated. Signed-off-by: Alan Hayward <alan.hayward@arm.com> Signed-off-by: Dave Martin <Dave.Martin@arm.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Alex Bennée <alex.bennee@linaro.org> Cc: Okamoto Takayuki <tokamoto@jp.fujitsu.com> Signed-off-by: Will Deacon <will.deacon@arm.com>hifive-unleashed-5.1
Dave Martin
Will Deacon
parent
fdfa976cae
commit
43d4da2c45
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@ -38,13 +38,16 @@ struct fpsimd_state {
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__uint128_t vregs[32];
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u32 fpsr;
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u32 fpcr;
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/*
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* For ptrace compatibility, pad to next 128-bit
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* boundary here if extending this struct.
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*/
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};
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};
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/* the id of the last cpu to have restored this state */
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unsigned int cpu;
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};
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#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
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/* Masks for extracting the FPSR and FPCR from the FPSCR */
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#define VFP_FPSCR_STAT_MASK 0xf800009f
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@ -88,6 +91,10 @@ extern size_t sve_state_size(struct task_struct const *task);
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extern void sve_alloc(struct task_struct *task);
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extern void fpsimd_release_task(struct task_struct *task);
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extern void fpsimd_sync_to_sve(struct task_struct *task);
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extern void sve_sync_to_fpsimd(struct task_struct *task);
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extern void sve_sync_from_fpsimd_zeropad(struct task_struct *task);
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extern int sve_set_vector_length(struct task_struct *task,
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unsigned long vl, unsigned long flags);
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@ -104,6 +111,9 @@ extern void __init sve_setup(void);
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static inline void sve_alloc(struct task_struct *task) { }
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static inline void fpsimd_release_task(struct task_struct *task) { }
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static inline void sve_sync_to_fpsimd(struct task_struct *task) { }
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static inline void sve_sync_from_fpsimd_zeropad(struct task_struct *task) { }
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static inline void sve_init_vq_map(void) { }
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static inline void sve_update_vq_map(void) { }
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static inline int sve_verify_vq_map(void) { return 0; }
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@ -22,6 +22,7 @@
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#include <linux/types.h>
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#include <asm/hwcap.h>
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#include <asm/sigcontext.h>
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/*
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@ -62,6 +63,8 @@
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#ifndef __ASSEMBLY__
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#include <linux/prctl.h>
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/*
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* User structures for general purpose, floating point and debug registers.
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*/
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@ -89,6 +92,141 @@ struct user_hwdebug_state {
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} dbg_regs[16];
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};
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/* SVE/FP/SIMD state (NT_ARM_SVE) */
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struct user_sve_header {
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__u32 size; /* total meaningful regset content in bytes */
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__u32 max_size; /* maxmium possible size for this thread */
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__u16 vl; /* current vector length */
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__u16 max_vl; /* maximum possible vector length */
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__u16 flags;
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__u16 __reserved;
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};
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/* Definitions for user_sve_header.flags: */
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#define SVE_PT_REGS_MASK (1 << 0)
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#define SVE_PT_REGS_FPSIMD 0
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#define SVE_PT_REGS_SVE SVE_PT_REGS_MASK
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/*
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* Common SVE_PT_* flags:
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* These must be kept in sync with prctl interface in <linux/ptrace.h>
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*/
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#define SVE_PT_VL_INHERIT (PR_SVE_VL_INHERIT >> 16)
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#define SVE_PT_VL_ONEXEC (PR_SVE_SET_VL_ONEXEC >> 16)
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/*
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* The remainder of the SVE state follows struct user_sve_header. The
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* total size of the SVE state (including header) depends on the
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* metadata in the header: SVE_PT_SIZE(vq, flags) gives the total size
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* of the state in bytes, including the header.
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*
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* Refer to <asm/sigcontext.h> for details of how to pass the correct
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* "vq" argument to these macros.
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*/
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/* Offset from the start of struct user_sve_header to the register data */
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#define SVE_PT_REGS_OFFSET \
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((sizeof(struct sve_context) + (SVE_VQ_BYTES - 1)) \
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/ SVE_VQ_BYTES * SVE_VQ_BYTES)
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/*
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* The register data content and layout depends on the value of the
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* flags field.
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*/
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/*
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* (flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD case:
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*
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* The payload starts at offset SVE_PT_FPSIMD_OFFSET, and is of type
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* struct user_fpsimd_state. Additional data might be appended in the
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* future: use SVE_PT_FPSIMD_SIZE(vq, flags) to compute the total size.
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* SVE_PT_FPSIMD_SIZE(vq, flags) will never be less than
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* sizeof(struct user_fpsimd_state).
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*/
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#define SVE_PT_FPSIMD_OFFSET SVE_PT_REGS_OFFSET
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#define SVE_PT_FPSIMD_SIZE(vq, flags) (sizeof(struct user_fpsimd_state))
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/*
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* (flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_SVE case:
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*
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* The payload starts at offset SVE_PT_SVE_OFFSET, and is of size
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* SVE_PT_SVE_SIZE(vq, flags).
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*
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* Additional macros describe the contents and layout of the payload.
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* For each, SVE_PT_SVE_x_OFFSET(args) is the start offset relative to
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* the start of struct user_sve_header, and SVE_PT_SVE_x_SIZE(args) is
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* the size in bytes:
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*
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* x type description
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* - ---- -----------
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* ZREGS \
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* ZREG |
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* PREGS | refer to <asm/sigcontext.h>
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* PREG |
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* FFR /
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*
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* FPSR uint32_t FPSR
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* FPCR uint32_t FPCR
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*
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* Additional data might be appended in the future.
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*/
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#define SVE_PT_SVE_ZREG_SIZE(vq) SVE_SIG_ZREG_SIZE(vq)
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#define SVE_PT_SVE_PREG_SIZE(vq) SVE_SIG_PREG_SIZE(vq)
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#define SVE_PT_SVE_FFR_SIZE(vq) SVE_SIG_FFR_SIZE(vq)
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#define SVE_PT_SVE_FPSR_SIZE sizeof(__u32)
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#define SVE_PT_SVE_FPCR_SIZE sizeof(__u32)
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#define __SVE_SIG_TO_PT(offset) \
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((offset) - SVE_SIG_REGS_OFFSET + SVE_PT_REGS_OFFSET)
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#define SVE_PT_SVE_OFFSET SVE_PT_REGS_OFFSET
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#define SVE_PT_SVE_ZREGS_OFFSET \
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__SVE_SIG_TO_PT(SVE_SIG_ZREGS_OFFSET)
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#define SVE_PT_SVE_ZREG_OFFSET(vq, n) \
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__SVE_SIG_TO_PT(SVE_SIG_ZREG_OFFSET(vq, n))
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#define SVE_PT_SVE_ZREGS_SIZE(vq) \
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(SVE_PT_SVE_ZREG_OFFSET(vq, SVE_NUM_ZREGS) - SVE_PT_SVE_ZREGS_OFFSET)
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#define SVE_PT_SVE_PREGS_OFFSET(vq) \
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__SVE_SIG_TO_PT(SVE_SIG_PREGS_OFFSET(vq))
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#define SVE_PT_SVE_PREG_OFFSET(vq, n) \
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__SVE_SIG_TO_PT(SVE_SIG_PREG_OFFSET(vq, n))
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#define SVE_PT_SVE_PREGS_SIZE(vq) \
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(SVE_PT_SVE_PREG_OFFSET(vq, SVE_NUM_PREGS) - \
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SVE_PT_SVE_PREGS_OFFSET(vq))
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#define SVE_PT_SVE_FFR_OFFSET(vq) \
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__SVE_SIG_TO_PT(SVE_SIG_FFR_OFFSET(vq))
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#define SVE_PT_SVE_FPSR_OFFSET(vq) \
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((SVE_PT_SVE_FFR_OFFSET(vq) + SVE_PT_SVE_FFR_SIZE(vq) + \
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(SVE_VQ_BYTES - 1)) \
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/ SVE_VQ_BYTES * SVE_VQ_BYTES)
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#define SVE_PT_SVE_FPCR_OFFSET(vq) \
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(SVE_PT_SVE_FPSR_OFFSET(vq) + SVE_PT_SVE_FPSR_SIZE)
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/*
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* Any future extension appended after FPCR must be aligned to the next
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* 128-bit boundary.
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*/
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#define SVE_PT_SVE_SIZE(vq, flags) \
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((SVE_PT_SVE_FPCR_OFFSET(vq) + SVE_PT_SVE_FPCR_SIZE \
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- SVE_PT_SVE_OFFSET + (SVE_VQ_BYTES - 1)) \
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/ SVE_VQ_BYTES * SVE_VQ_BYTES)
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#define SVE_PT_SIZE(vq, flags) \
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(((flags) & SVE_PT_REGS_MASK) == SVE_PT_REGS_SVE ? \
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SVE_PT_SVE_OFFSET + SVE_PT_SVE_SIZE(vq, flags) \
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: SVE_PT_FPSIMD_OFFSET + SVE_PT_FPSIMD_SIZE(vq, flags))
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#endif /* __ASSEMBLY__ */
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#endif /* _UAPI__ASM_PTRACE_H */
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@ -428,6 +428,66 @@ void sve_alloc(struct task_struct *task)
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BUG_ON(!task->thread.sve_state);
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}
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/*
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* Ensure that task->thread.sve_state is up to date with respect to
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* the user task, irrespective of when SVE is in use or not.
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*
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* This should only be called by ptrace. task must be non-runnable.
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* task->thread.sve_state must point to at least sve_state_size(task)
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* bytes of allocated kernel memory.
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*/
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void fpsimd_sync_to_sve(struct task_struct *task)
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{
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if (!test_tsk_thread_flag(task, TIF_SVE))
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fpsimd_to_sve(task);
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}
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/*
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* Ensure that task->thread.fpsimd_state is up to date with respect to
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* the user task, irrespective of whether SVE is in use or not.
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*
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* This should only be called by ptrace. task must be non-runnable.
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* task->thread.sve_state must point to at least sve_state_size(task)
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* bytes of allocated kernel memory.
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*/
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void sve_sync_to_fpsimd(struct task_struct *task)
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{
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if (test_tsk_thread_flag(task, TIF_SVE))
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sve_to_fpsimd(task);
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}
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/*
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* Ensure that task->thread.sve_state is up to date with respect to
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* the task->thread.fpsimd_state.
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*
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* This should only be called by ptrace to merge new FPSIMD register
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* values into a task for which SVE is currently active.
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* task must be non-runnable.
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* task->thread.sve_state must point to at least sve_state_size(task)
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* bytes of allocated kernel memory.
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* task->thread.fpsimd_state must already have been initialised with
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* the new FPSIMD register values to be merged in.
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*/
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void sve_sync_from_fpsimd_zeropad(struct task_struct *task)
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{
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unsigned int vq;
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void *sst = task->thread.sve_state;
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struct fpsimd_state const *fst = &task->thread.fpsimd_state;
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unsigned int i;
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if (!test_tsk_thread_flag(task, TIF_SVE))
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return;
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vq = sve_vq_from_vl(task->thread.sve_vl);
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memset(sst, 0, SVE_SIG_REGS_SIZE(vq));
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for (i = 0; i < 32; ++i)
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memcpy(ZREG(sst, vq, i), &fst->vregs[i],
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sizeof(fst->vregs[i]));
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}
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int sve_set_vector_length(struct task_struct *task,
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unsigned long vl, unsigned long flags)
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{
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@ -32,6 +32,7 @@
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#include <linux/security.h>
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#include <linux/init.h>
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#include <linux/signal.h>
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#include <linux/string.h>
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#include <linux/uaccess.h>
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#include <linux/perf_event.h>
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#include <linux/hw_breakpoint.h>
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@ -40,6 +41,7 @@
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#include <linux/elf.h>
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#include <asm/compat.h>
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#include <asm/cpufeature.h>
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#include <asm/debug-monitors.h>
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#include <asm/pgtable.h>
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#include <asm/stacktrace.h>
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@ -618,17 +620,56 @@ static int gpr_set(struct task_struct *target, const struct user_regset *regset,
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/*
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* TODO: update fp accessors for lazy context switching (sync/flush hwstate)
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*/
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static int __fpr_get(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf, unsigned int start_pos)
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{
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struct user_fpsimd_state *uregs;
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sve_sync_to_fpsimd(target);
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uregs = &target->thread.fpsimd_state.user_fpsimd;
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return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs,
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start_pos, start_pos + sizeof(*uregs));
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}
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static int fpr_get(struct task_struct *target, const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
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struct user_fpsimd_state *uregs;
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uregs = &target->thread.fpsimd_state.user_fpsimd;
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if (target == current)
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fpsimd_preserve_current_state();
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return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
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return __fpr_get(target, regset, pos, count, kbuf, ubuf, 0);
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}
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static int __fpr_set(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf,
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unsigned int start_pos)
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{
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int ret;
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struct user_fpsimd_state newstate;
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/*
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* Ensure target->thread.fpsimd_state is up to date, so that a
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* short copyin can't resurrect stale data.
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*/
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sve_sync_to_fpsimd(target);
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newstate = target->thread.fpsimd_state.user_fpsimd;
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newstate,
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start_pos, start_pos + sizeof(newstate));
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if (ret)
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return ret;
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target->thread.fpsimd_state.user_fpsimd = newstate;
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return ret;
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}
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static int fpr_set(struct task_struct *target, const struct user_regset *regset,
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@ -636,15 +677,14 @@ static int fpr_set(struct task_struct *target, const struct user_regset *regset,
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const void *kbuf, const void __user *ubuf)
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{
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int ret;
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struct user_fpsimd_state newstate =
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target->thread.fpsimd_state.user_fpsimd;
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newstate, 0, -1);
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ret = __fpr_set(target, regset, pos, count, kbuf, ubuf, 0);
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if (ret)
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return ret;
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target->thread.fpsimd_state.user_fpsimd = newstate;
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sve_sync_from_fpsimd_zeropad(target);
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fpsimd_flush_task_state(target);
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return ret;
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}
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@ -702,6 +742,215 @@ static int system_call_set(struct task_struct *target,
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return ret;
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}
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#ifdef CONFIG_ARM64_SVE
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static void sve_init_header_from_task(struct user_sve_header *header,
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struct task_struct *target)
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{
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unsigned int vq;
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memset(header, 0, sizeof(*header));
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header->flags = test_tsk_thread_flag(target, TIF_SVE) ?
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SVE_PT_REGS_SVE : SVE_PT_REGS_FPSIMD;
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if (test_tsk_thread_flag(target, TIF_SVE_VL_INHERIT))
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header->flags |= SVE_PT_VL_INHERIT;
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header->vl = target->thread.sve_vl;
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vq = sve_vq_from_vl(header->vl);
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header->max_vl = sve_max_vl;
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if (WARN_ON(!sve_vl_valid(sve_max_vl)))
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header->max_vl = header->vl;
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header->size = SVE_PT_SIZE(vq, header->flags);
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header->max_size = SVE_PT_SIZE(sve_vq_from_vl(header->max_vl),
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SVE_PT_REGS_SVE);
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}
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static unsigned int sve_size_from_header(struct user_sve_header const *header)
|
||||
{
|
||||
return ALIGN(header->size, SVE_VQ_BYTES);
|
||||
}
|
||||
|
||||
static unsigned int sve_get_size(struct task_struct *target,
|
||||
const struct user_regset *regset)
|
||||
{
|
||||
struct user_sve_header header;
|
||||
|
||||
if (!system_supports_sve())
|
||||
return 0;
|
||||
|
||||
sve_init_header_from_task(&header, target);
|
||||
return sve_size_from_header(&header);
|
||||
}
|
||||
|
||||
static int sve_get(struct task_struct *target,
|
||||
const struct user_regset *regset,
|
||||
unsigned int pos, unsigned int count,
|
||||
void *kbuf, void __user *ubuf)
|
||||
{
|
||||
int ret;
|
||||
struct user_sve_header header;
|
||||
unsigned int vq;
|
||||
unsigned long start, end;
|
||||
|
||||
if (!system_supports_sve())
|
||||
return -EINVAL;
|
||||
|
||||
/* Header */
|
||||
sve_init_header_from_task(&header, target);
|
||||
vq = sve_vq_from_vl(header.vl);
|
||||
|
||||
ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &header,
|
||||
0, sizeof(header));
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (target == current)
|
||||
fpsimd_preserve_current_state();
|
||||
|
||||
/* Registers: FPSIMD-only case */
|
||||
|
||||
BUILD_BUG_ON(SVE_PT_FPSIMD_OFFSET != sizeof(header));
|
||||
if ((header.flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD)
|
||||
return __fpr_get(target, regset, pos, count, kbuf, ubuf,
|
||||
SVE_PT_FPSIMD_OFFSET);
|
||||
|
||||
/* Otherwise: full SVE case */
|
||||
|
||||
BUILD_BUG_ON(SVE_PT_SVE_OFFSET != sizeof(header));
|
||||
start = SVE_PT_SVE_OFFSET;
|
||||
end = SVE_PT_SVE_FFR_OFFSET(vq) + SVE_PT_SVE_FFR_SIZE(vq);
|
||||
ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
|
||||
target->thread.sve_state,
|
||||
start, end);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
start = end;
|
||||
end = SVE_PT_SVE_FPSR_OFFSET(vq);
|
||||
ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
|
||||
start, end);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/*
|
||||
* Copy fpsr, and fpcr which must follow contiguously in
|
||||
* struct fpsimd_state:
|
||||
*/
|
||||
start = end;
|
||||
end = SVE_PT_SVE_FPCR_OFFSET(vq) + SVE_PT_SVE_FPCR_SIZE;
|
||||
ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
|
||||
&target->thread.fpsimd_state.fpsr,
|
||||
start, end);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
start = end;
|
||||
end = sve_size_from_header(&header);
|
||||
return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
|
||||
start, end);
|
||||
}
|
||||
|
||||
static int sve_set(struct task_struct *target,
|
||||
const struct user_regset *regset,
|
||||
unsigned int pos, unsigned int count,
|
||||
const void *kbuf, const void __user *ubuf)
|
||||
{
|
||||
int ret;
|
||||
struct user_sve_header header;
|
||||
unsigned int vq;
|
||||
unsigned long start, end;
|
||||
|
||||
if (!system_supports_sve())
|
||||
return -EINVAL;
|
||||
|
||||
/* Header */
|
||||
if (count < sizeof(header))
|
||||
return -EINVAL;
|
||||
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &header,
|
||||
0, sizeof(header));
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
/*
|
||||
* Apart from PT_SVE_REGS_MASK, all PT_SVE_* flags are consumed by
|
||||
* sve_set_vector_length(), which will also validate them for us:
|
||||
*/
|
||||
ret = sve_set_vector_length(target, header.vl,
|
||||
((unsigned long)header.flags & ~SVE_PT_REGS_MASK) << 16);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
/* Actual VL set may be less than the user asked for: */
|
||||
vq = sve_vq_from_vl(target->thread.sve_vl);
|
||||
|
||||
/* Registers: FPSIMD-only case */
|
||||
|
||||
BUILD_BUG_ON(SVE_PT_FPSIMD_OFFSET != sizeof(header));
|
||||
if ((header.flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD) {
|
||||
ret = __fpr_set(target, regset, pos, count, kbuf, ubuf,
|
||||
SVE_PT_FPSIMD_OFFSET);
|
||||
clear_tsk_thread_flag(target, TIF_SVE);
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* Otherwise: full SVE case */
|
||||
|
||||
/*
|
||||
* If setting a different VL from the requested VL and there is
|
||||
* register data, the data layout will be wrong: don't even
|
||||
* try to set the registers in this case.
|
||||
*/
|
||||
if (count && vq != sve_vq_from_vl(header.vl)) {
|
||||
ret = -EIO;
|
||||
goto out;
|
||||
}
|
||||
|
||||
sve_alloc(target);
|
||||
|
||||
/*
|
||||
* Ensure target->thread.sve_state is up to date with target's
|
||||
* FPSIMD regs, so that a short copyin leaves trailing registers
|
||||
* unmodified.
|
||||
*/
|
||||
fpsimd_sync_to_sve(target);
|
||||
set_tsk_thread_flag(target, TIF_SVE);
|
||||
|
||||
BUILD_BUG_ON(SVE_PT_SVE_OFFSET != sizeof(header));
|
||||
start = SVE_PT_SVE_OFFSET;
|
||||
end = SVE_PT_SVE_FFR_OFFSET(vq) + SVE_PT_SVE_FFR_SIZE(vq);
|
||||
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
||||
target->thread.sve_state,
|
||||
start, end);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
start = end;
|
||||
end = SVE_PT_SVE_FPSR_OFFSET(vq);
|
||||
ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
|
||||
start, end);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
/*
|
||||
* Copy fpsr, and fpcr which must follow contiguously in
|
||||
* struct fpsimd_state:
|
||||
*/
|
||||
start = end;
|
||||
end = SVE_PT_SVE_FPCR_OFFSET(vq) + SVE_PT_SVE_FPCR_SIZE;
|
||||
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
||||
&target->thread.fpsimd_state.fpsr,
|
||||
start, end);
|
||||
|
||||
out:
|
||||
fpsimd_flush_task_state(target);
|
||||
return ret;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_ARM64_SVE */
|
||||
|
||||
enum aarch64_regset {
|
||||
REGSET_GPR,
|
||||
REGSET_FPR,
|
||||
|
|
@ -711,6 +960,9 @@ enum aarch64_regset {
|
|||
REGSET_HW_WATCH,
|
||||
#endif
|
||||
REGSET_SYSTEM_CALL,
|
||||
#ifdef CONFIG_ARM64_SVE
|
||||
REGSET_SVE,
|
||||
#endif
|
||||
};
|
||||
|
||||
static const struct user_regset aarch64_regsets[] = {
|
||||
|
|
@ -768,6 +1020,18 @@ static const struct user_regset aarch64_regsets[] = {
|
|||
.get = system_call_get,
|
||||
.set = system_call_set,
|
||||
},
|
||||
#ifdef CONFIG_ARM64_SVE
|
||||
[REGSET_SVE] = { /* Scalable Vector Extension */
|
||||
.core_note_type = NT_ARM_SVE,
|
||||
.n = DIV_ROUND_UP(SVE_PT_SIZE(SVE_VQ_MAX, SVE_PT_REGS_SVE),
|
||||
SVE_VQ_BYTES),
|
||||
.size = SVE_VQ_BYTES,
|
||||
.align = SVE_VQ_BYTES,
|
||||
.get = sve_get,
|
||||
.set = sve_set,
|
||||
.get_size = sve_get_size,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
static const struct user_regset_view user_aarch64_view = {
|
||||
|
|
|
|||
|
|
@ -416,6 +416,7 @@ typedef struct elf64_shdr {
|
|||
#define NT_ARM_HW_BREAK 0x402 /* ARM hardware breakpoint registers */
|
||||
#define NT_ARM_HW_WATCH 0x403 /* ARM hardware watchpoint registers */
|
||||
#define NT_ARM_SYSTEM_CALL 0x404 /* ARM system call number */
|
||||
#define NT_ARM_SVE 0x405 /* ARM Scalable Vector Extension registers */
|
||||
#define NT_METAG_CBUF 0x500 /* Metag catch buffer registers */
|
||||
#define NT_METAG_RPIPE 0x501 /* Metag read pipeline state */
|
||||
#define NT_METAG_TLS 0x502 /* Metag TLS pointer */
|
||||
|
|
|
|||
Loading…
Reference in New Issue