mfd: tps65218: Add driver for the TPS65218 PMIC
The TPS65218 chip is a power management IC for Portable Navigation Systems and Tablet Computing devices. It contains the following components: - Regulators. - Over Temperature warning and Shut down. This patch adds support for tps65218 mfd device. At this time only the regulator functionality is made available. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>hifive-unleashed-5.1
Keerthy
Lee Jones
parent
a381b13e2a
commit
44b4dc6163
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@ -853,6 +853,21 @@ config MFD_TPS65217
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This driver can also be built as a module. If so, the module
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will be called tps65217.
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config MFD_TPS65218
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tristate "TI TPS65218 Power Management chips"
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depends on I2C
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select MFD_CORE
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select REGMAP_I2C
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help
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If you say yes here you get support for the TPS65218 series of
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Power Management chips.
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These include voltage regulators, gpio and other features
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that are often used in portable devices. Only regulator
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component is currently supported.
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This driver can also be built as a module. If so, the module
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will be called tps65218.
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config MFD_TPS6586X
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bool "TI TPS6586x Power Management chips"
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depends on I2C=y
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@ -62,6 +62,7 @@ obj-$(CONFIG_TPS6105X) += tps6105x.o
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obj-$(CONFIG_TPS65010) += tps65010.o
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obj-$(CONFIG_TPS6507X) += tps6507x.o
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obj-$(CONFIG_MFD_TPS65217) += tps65217.o
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obj-$(CONFIG_MFD_TPS65218) += tps65218.o
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obj-$(CONFIG_MFD_TPS65910) += tps65910.o
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tps65912-objs := tps65912-core.o tps65912-irq.o
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obj-$(CONFIG_MFD_TPS65912) += tps65912.o
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@ -0,0 +1,282 @@
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/*
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* Driver for TPS65218 Integrated power management chipsets
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*
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* Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether expressed or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License version 2 for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/init.h>
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#include <linux/i2c.h>
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#include <linux/slab.h>
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#include <linux/regmap.h>
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#include <linux/err.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/mutex.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/tps65218.h>
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#define TPS65218_PASSWORD_REGS_UNLOCK 0x7D
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/**
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* tps65218_reg_read: Read a single tps65218 register.
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*
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* @tps: Device to read from.
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* @reg: Register to read.
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* @val: Contians the value
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*/
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int tps65218_reg_read(struct tps65218 *tps, unsigned int reg,
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unsigned int *val)
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{
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return regmap_read(tps->regmap, reg, val);
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}
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EXPORT_SYMBOL_GPL(tps65218_reg_read);
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/**
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* tps65218_reg_write: Write a single tps65218 register.
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*
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* @tps65218: Device to write to.
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* @reg: Register to write to.
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* @val: Value to write.
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* @level: Password protected level
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*/
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int tps65218_reg_write(struct tps65218 *tps, unsigned int reg,
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unsigned int val, unsigned int level)
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{
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int ret;
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unsigned int xor_reg_val;
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switch (level) {
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case TPS65218_PROTECT_NONE:
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return regmap_write(tps->regmap, reg, val);
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case TPS65218_PROTECT_L1:
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xor_reg_val = reg ^ TPS65218_PASSWORD_REGS_UNLOCK;
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ret = regmap_write(tps->regmap, TPS65218_REG_PASSWORD,
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xor_reg_val);
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if (ret < 0)
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return ret;
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return regmap_write(tps->regmap, reg, val);
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default:
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return -EINVAL;
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}
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}
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EXPORT_SYMBOL_GPL(tps65218_reg_write);
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/**
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* tps65218_update_bits: Modify bits w.r.t mask, val and level.
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*
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* @tps65218: Device to write to.
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* @reg: Register to read-write to.
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* @mask: Mask.
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* @val: Value to write.
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* @level: Password protected level
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*/
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static int tps65218_update_bits(struct tps65218 *tps, unsigned int reg,
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unsigned int mask, unsigned int val, unsigned int level)
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{
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int ret;
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unsigned int data;
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ret = tps65218_reg_read(tps, reg, &data);
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if (ret) {
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dev_err(tps->dev, "Read from reg 0x%x failed\n", reg);
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return ret;
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}
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data &= ~mask;
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data |= val & mask;
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mutex_lock(&tps->tps_lock);
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ret = tps65218_reg_write(tps, reg, data, level);
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if (ret)
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dev_err(tps->dev, "Write for reg 0x%x failed\n", reg);
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mutex_unlock(&tps->tps_lock);
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return ret;
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}
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int tps65218_set_bits(struct tps65218 *tps, unsigned int reg,
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unsigned int mask, unsigned int val, unsigned int level)
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{
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return tps65218_update_bits(tps, reg, mask, val, level);
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}
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EXPORT_SYMBOL_GPL(tps65218_set_bits);
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int tps65218_clear_bits(struct tps65218 *tps, unsigned int reg,
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unsigned int mask, unsigned int level)
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{
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return tps65218_update_bits(tps, reg, mask, 0, level);
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}
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EXPORT_SYMBOL_GPL(tps65218_clear_bits);
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static struct regmap_config tps65218_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.cache_type = REGCACHE_RBTREE,
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};
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static const struct regmap_irq tps65218_irqs[] = {
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/* INT1 IRQs */
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[TPS65218_PRGC_IRQ] = {
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.mask = TPS65218_INT1_PRGC,
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},
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[TPS65218_CC_AQC_IRQ] = {
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.mask = TPS65218_INT1_CC_AQC,
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},
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[TPS65218_HOT_IRQ] = {
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.mask = TPS65218_INT1_HOT,
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},
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[TPS65218_PB_IRQ] = {
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.mask = TPS65218_INT1_PB,
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},
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[TPS65218_AC_IRQ] = {
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.mask = TPS65218_INT1_AC,
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},
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[TPS65218_VPRG_IRQ] = {
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.mask = TPS65218_INT1_VPRG,
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},
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[TPS65218_INVALID1_IRQ] = {
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},
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[TPS65218_INVALID2_IRQ] = {
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},
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/* INT2 IRQs*/
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[TPS65218_LS1_I_IRQ] = {
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.mask = TPS65218_INT2_LS1_I,
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.reg_offset = 1,
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},
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[TPS65218_LS2_I_IRQ] = {
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.mask = TPS65218_INT2_LS2_I,
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.reg_offset = 1,
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},
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[TPS65218_LS3_I_IRQ] = {
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.mask = TPS65218_INT2_LS3_I,
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.reg_offset = 1,
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},
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[TPS65218_LS1_F_IRQ] = {
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.mask = TPS65218_INT2_LS1_F,
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.reg_offset = 1,
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},
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[TPS65218_LS2_F_IRQ] = {
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.mask = TPS65218_INT2_LS2_F,
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.reg_offset = 1,
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},
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[TPS65218_LS3_F_IRQ] = {
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.mask = TPS65218_INT2_LS3_F,
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.reg_offset = 1,
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},
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[TPS65218_INVALID3_IRQ] = {
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},
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[TPS65218_INVALID4_IRQ] = {
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},
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};
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static struct regmap_irq_chip tps65218_irq_chip = {
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.name = "tps65218",
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.irqs = tps65218_irqs,
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.num_irqs = ARRAY_SIZE(tps65218_irqs),
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.num_regs = 2,
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.mask_base = TPS65218_REG_INT_MASK1,
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};
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static const struct of_device_id of_tps65218_match_table[] = {
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{ .compatible = "ti,tps65218", },
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};
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static int tps65218_probe(struct i2c_client *client,
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const struct i2c_device_id *ids)
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{
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struct tps65218 *tps;
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const struct of_device_id *match;
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int ret;
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match = of_match_device(of_tps65218_match_table, &client->dev);
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if (!match) {
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dev_err(&client->dev,
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"Failed to find matching dt id\n");
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return -EINVAL;
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}
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tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL);
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if (!tps)
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return -ENOMEM;
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i2c_set_clientdata(client, tps);
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tps->dev = &client->dev;
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tps->irq = client->irq;
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tps->regmap = devm_regmap_init_i2c(client, &tps65218_regmap_config);
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if (IS_ERR(tps->regmap)) {
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ret = PTR_ERR(tps->regmap);
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dev_err(tps->dev, "Failed to allocate register map: %d\n",
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ret);
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return ret;
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}
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mutex_init(&tps->tps_lock);
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ret = regmap_add_irq_chip(tps->regmap, tps->irq,
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IRQF_ONESHOT, 0, &tps65218_irq_chip,
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&tps->irq_data);
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if (ret < 0)
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return ret;
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ret = of_platform_populate(client->dev.of_node, NULL, NULL,
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&client->dev);
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if (ret < 0)
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goto err_irq;
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return 0;
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err_irq:
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regmap_del_irq_chip(tps->irq, tps->irq_data);
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return ret;
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}
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static int tps65218_remove(struct i2c_client *client)
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{
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struct tps65218 *tps = i2c_get_clientdata(client);
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regmap_del_irq_chip(tps->irq, tps->irq_data);
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return 0;
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}
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static const struct i2c_device_id tps65218_id_table[] = {
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{ "tps65218", TPS65218 },
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{ },
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};
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MODULE_DEVICE_TABLE(i2c, tps65218_id_table);
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static struct i2c_driver tps65218_driver = {
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.driver = {
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.name = "tps65218",
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.owner = THIS_MODULE,
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.of_match_table = of_tps65218_match_table,
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},
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.probe = tps65218_probe,
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.remove = tps65218_remove,
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.id_table = tps65218_id_table,
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};
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module_i2c_driver(tps65218_driver);
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MODULE_AUTHOR("J Keerthy <j-keerthy@ti.com>");
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MODULE_DESCRIPTION("TPS65218 chip family multi-function driver");
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MODULE_LICENSE("GPL v2");
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@ -0,0 +1,284 @@
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/*
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* linux/mfd/tps65218.h
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*
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* Functions to access TPS65219 power management chip.
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*
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* Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether expressed or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License version 2 for more details.
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*/
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#ifndef __LINUX_MFD_TPS65218_H
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#define __LINUX_MFD_TPS65218_H
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#include <linux/i2c.h>
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#include <linux/regulator/driver.h>
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#include <linux/regulator/machine.h>
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#include <linux/bitops.h>
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/* TPS chip id list */
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#define TPS65218 0xF0
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/* I2C ID for TPS65218 part */
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#define TPS65218_I2C_ID 0x24
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/* All register addresses */
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#define TPS65218_REG_CHIPID 0x00
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#define TPS65218_REG_INT1 0x01
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#define TPS65218_REG_INT2 0x02
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#define TPS65218_REG_INT_MASK1 0x03
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#define TPS65218_REG_INT_MASK2 0x04
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#define TPS65218_REG_STATUS 0x05
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#define TPS65218_REG_CONTROL 0x06
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#define TPS65218_REG_FLAG 0x07
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#define TPS65218_REG_PASSWORD 0x10
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#define TPS65218_REG_ENABLE1 0x11
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#define TPS65218_REG_ENABLE2 0x12
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#define TPS65218_REG_CONFIG1 0x13
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#define TPS65218_REG_CONFIG2 0x14
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#define TPS65218_REG_CONFIG3 0x15
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#define TPS65218_REG_CONTROL_DCDC1 0x16
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#define TPS65218_REG_CONTROL_DCDC2 0x17
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#define TPS65218_REG_CONTROL_DCDC3 0x18
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#define TPS65218_REG_CONTROL_DCDC4 0x19
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#define TPS65218_REG_CONTRL_SLEW_RATE 0x1A
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#define TPS65218_REG_CONTROL_LDO1 0x1B
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#define TPS65218_REG_SEQ1 0x20
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#define TPS65218_REG_SEQ2 0x21
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#define TPS65218_REG_SEQ3 0x22
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#define TPS65218_REG_SEQ4 0x23
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#define TPS65218_REG_SEQ5 0x24
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#define TPS65218_REG_SEQ6 0x25
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#define TPS65218_REG_SEQ7 0x26
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/* Register field definitions */
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#define TPS65218_CHIPID_CHIP_MASK 0xF8
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#define TPS65218_CHIPID_REV_MASK 0x07
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#define TPS65218_INT1_VPRG BIT(5)
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#define TPS65218_INT1_AC BIT(4)
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#define TPS65218_INT1_PB BIT(3)
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#define TPS65218_INT1_HOT BIT(2)
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#define TPS65218_INT1_CC_AQC BIT(1)
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#define TPS65218_INT1_PRGC BIT(0)
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#define TPS65218_INT2_LS3_F BIT(5)
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#define TPS65218_INT2_LS2_F BIT(4)
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#define TPS65218_INT2_LS1_F BIT(3)
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#define TPS65218_INT2_LS3_I BIT(2)
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#define TPS65218_INT2_LS2_I BIT(1)
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#define TPS65218_INT2_LS1_I BIT(0)
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#define TPS65218_INT_MASK1_VPRG BIT(5)
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#define TPS65218_INT_MASK1_AC BIT(4)
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#define TPS65218_INT_MASK1_PB BIT(3)
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#define TPS65218_INT_MASK1_HOT BIT(2)
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#define TPS65218_INT_MASK1_CC_AQC BIT(1)
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#define TPS65218_INT_MASK1_PRGC BIT(0)
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#define TPS65218_INT_MASK2_LS3_F BIT(5)
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#define TPS65218_INT_MASK2_LS2_F BIT(4)
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#define TPS65218_INT_MASK2_LS1_F BIT(3)
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#define TPS65218_INT_MASK2_LS3_I BIT(2)
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#define TPS65218_INT_MASK2_LS2_I BIT(1)
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#define TPS65218_INT_MASK2_LS1_I BIT(0)
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#define TPS65218_STATUS_FSEAL BIT(7)
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#define TPS65218_STATUS_EE BIT(6)
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#define TPS65218_STATUS_AC_STATE BIT(5)
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#define TPS65218_STATUS_PB_STATE BIT(4)
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#define TPS65218_STATUS_STATE_MASK 0xC
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#define TPS65218_STATUS_CC_STAT 0x3
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#define TPS65218_CONTROL_OFFNPFO BIT(1)
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#define TPS65218_CONTROL_CC_AQ BIT(0)
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#define TPS65218_FLAG_GPO3_FLG BIT(7)
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#define TPS65218_FLAG_GPO2_FLG BIT(6)
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#define TPS65218_FLAG_GPO1_FLG BIT(5)
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#define TPS65218_FLAG_LDO1_FLG BIT(4)
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#define TPS65218_FLAG_DC4_FLG BIT(3)
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#define TPS65218_FLAG_DC3_FLG BIT(2)
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#define TPS65218_FLAG_DC2_FLG BIT(1)
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#define TPS65218_FLAG_DC1_FLG BIT(0)
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#define TPS65218_ENABLE1_DC6_EN BIT(5)
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#define TPS65218_ENABLE1_DC5_EN BIT(4)
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#define TPS65218_ENABLE1_DC4_EN BIT(3)
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#define TPS65218_ENABLE1_DC3_EN BIT(2)
|
||||
#define TPS65218_ENABLE1_DC2_EN BIT(1)
|
||||
#define TPS65218_ENABLE1_DC1_EN BIT(0)
|
||||
|
||||
#define TPS65218_ENABLE2_GPIO3 BIT(6)
|
||||
#define TPS65218_ENABLE2_GPIO2 BIT(5)
|
||||
#define TPS65218_ENABLE2_GPIO1 BIT(4)
|
||||
#define TPS65218_ENABLE2_LS3_EN BIT(3)
|
||||
#define TPS65218_ENABLE2_LS2_EN BIT(2)
|
||||
#define TPS65218_ENABLE2_LS1_EN BIT(1)
|
||||
#define TPS65218_ENABLE2_LDO1_EN BIT(0)
|
||||
|
||||
|
||||
#define TPS65218_CONFIG1_TRST BIT(7)
|
||||
#define TPS65218_CONFIG1_GPO2_BUF BIT(6)
|
||||
#define TPS65218_CONFIG1_IO1_SEL BIT(5)
|
||||
#define TPS65218_CONFIG1_PGDLY_MASK 0x18
|
||||
#define TPS65218_CONFIG1_STRICT BIT(2)
|
||||
#define TPS65218_CONFIG1_UVLO_MASK 0x3
|
||||
|
||||
#define TPS65218_CONFIG2_DC12_RST BIT(7)
|
||||
#define TPS65218_CONFIG2_UVLOHYS BIT(6)
|
||||
#define TPS65218_CONFIG2_LS3ILIM_MASK 0xC
|
||||
#define TPS65218_CONFIG2_LS2ILIM_MASK 0x3
|
||||
|
||||
#define TPS65218_CONFIG3_LS3NPFO BIT(5)
|
||||
#define TPS65218_CONFIG3_LS2NPFO BIT(4)
|
||||
#define TPS65218_CONFIG3_LS1NPFO BIT(3)
|
||||
#define TPS65218_CONFIG3_LS3DCHRG BIT(2)
|
||||
#define TPS65218_CONFIG3_LS2DCHRG BIT(1)
|
||||
#define TPS65218_CONFIG3_LS1DCHRG BIT(0)
|
||||
|
||||
#define TPS65218_CONTROL_DCDC1_PFM BIT(7)
|
||||
#define TPS65218_CONTROL_DCDC1_MASK 0x7F
|
||||
|
||||
#define TPS65218_CONTROL_DCDC2_PFM BIT(7)
|
||||
#define TPS65218_CONTROL_DCDC2_MASK 0x3F
|
||||
|
||||
#define TPS65218_CONTROL_DCDC3_PFM BIT(7)
|
||||
#define TPS65218_CONTROL_DCDC3_MASK 0x3F
|
||||
|
||||
#define TPS65218_CONTROL_DCDC4_PFM BIT(7)
|
||||
#define TPS65218_CONTROL_DCDC4_MASK 0x3F
|
||||
|
||||
#define TPS65218_SLEW_RATE_GO BIT(7)
|
||||
#define TPS65218_SLEW_RATE_GODSBL BIT(6)
|
||||
#define TPS65218_SLEW_RATE_SLEW_MASK 0x7
|
||||
|
||||
#define TPS65218_CONTROL_LDO1_MASK 0x3F
|
||||
|
||||
#define TPS65218_SEQ1_DLY8 BIT(7)
|
||||
#define TPS65218_SEQ1_DLY7 BIT(6)
|
||||
#define TPS65218_SEQ1_DLY6 BIT(5)
|
||||
#define TPS65218_SEQ1_DLY5 BIT(4)
|
||||
#define TPS65218_SEQ1_DLY4 BIT(3)
|
||||
#define TPS65218_SEQ1_DLY3 BIT(2)
|
||||
#define TPS65218_SEQ1_DLY2 BIT(1)
|
||||
#define TPS65218_SEQ1_DLY1 BIT(0)
|
||||
|
||||
#define TPS65218_SEQ2_DLYFCTR BIT(7)
|
||||
#define TPS65218_SEQ2_DLY9 BIT(0)
|
||||
|
||||
#define TPS65218_SEQ3_DC2_SEQ_MASK 0xF0
|
||||
#define TPS65218_SEQ3_DC1_SEQ_MASK 0xF
|
||||
|
||||
#define TPS65218_SEQ4_DC4_SEQ_MASK 0xF0
|
||||
#define TPS65218_SEQ4_DC3_SEQ_MASK 0xF
|
||||
|
||||
#define TPS65218_SEQ5_DC6_SEQ_MASK 0xF0
|
||||
#define TPS65218_SEQ5_DC5_SEQ_MASK 0xF
|
||||
|
||||
#define TPS65218_SEQ6_LS1_SEQ_MASK 0xF0
|
||||
#define TPS65218_SEQ6_LDO1_SEQ_MASK 0xF
|
||||
|
||||
#define TPS65218_SEQ7_GPO3_SEQ_MASK 0xF0
|
||||
#define TPS65218_SEQ7_GPO1_SEQ_MASK 0xF
|
||||
#define TPS65218_PROTECT_NONE 0
|
||||
#define TPS65218_PROTECT_L1 1
|
||||
|
||||
enum tps65218_regulator_id {
|
||||
/* DCDC's */
|
||||
TPS65218_DCDC_1,
|
||||
TPS65218_DCDC_2,
|
||||
TPS65218_DCDC_3,
|
||||
TPS65218_DCDC_4,
|
||||
TPS65218_DCDC_5,
|
||||
TPS65218_DCDC_6,
|
||||
/* LDOs */
|
||||
TPS65218_LDO_1,
|
||||
};
|
||||
|
||||
#define TPS65218_MAX_REG_ID TPS65218_LDO_1
|
||||
|
||||
/* Number of step-down converters available */
|
||||
#define TPS65218_NUM_DCDC 6
|
||||
/* Number of LDO voltage regulators available */
|
||||
#define TPS65218_NUM_LDO 1
|
||||
/* Number of total regulators available */
|
||||
#define TPS65218_NUM_REGULATOR (TPS65218_NUM_DCDC + TPS65218_NUM_LDO)
|
||||
|
||||
/* Define the TPS65218 IRQ numbers */
|
||||
enum tps65218_irqs {
|
||||
/* INT1 registers */
|
||||
TPS65218_PRGC_IRQ,
|
||||
TPS65218_CC_AQC_IRQ,
|
||||
TPS65218_HOT_IRQ,
|
||||
TPS65218_PB_IRQ,
|
||||
TPS65218_AC_IRQ,
|
||||
TPS65218_VPRG_IRQ,
|
||||
TPS65218_INVALID1_IRQ,
|
||||
TPS65218_INVALID2_IRQ,
|
||||
/* INT2 registers */
|
||||
TPS65218_LS1_I_IRQ,
|
||||
TPS65218_LS2_I_IRQ,
|
||||
TPS65218_LS3_I_IRQ,
|
||||
TPS65218_LS1_F_IRQ,
|
||||
TPS65218_LS2_F_IRQ,
|
||||
TPS65218_LS3_F_IRQ,
|
||||
TPS65218_INVALID3_IRQ,
|
||||
TPS65218_INVALID4_IRQ,
|
||||
};
|
||||
|
||||
/**
|
||||
* struct tps_info - packages regulator constraints
|
||||
* @id: Id of the regulator
|
||||
* @name: Voltage regulator name
|
||||
* @min_uV: minimum micro volts
|
||||
* @max_uV: minimum micro volts
|
||||
*
|
||||
* This data is used to check the regualtor voltage limits while setting.
|
||||
*/
|
||||
struct tps_info {
|
||||
int id;
|
||||
const char *name;
|
||||
int min_uV;
|
||||
int max_uV;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct tps65218 - tps65218 sub-driver chip access routines
|
||||
*
|
||||
* Device data may be used to access the TPS65218 chip
|
||||
*/
|
||||
|
||||
struct tps65218 {
|
||||
struct device *dev;
|
||||
unsigned int id;
|
||||
|
||||
struct mutex tps_lock; /* lock guarding the data structure */
|
||||
/* IRQ Data */
|
||||
int irq;
|
||||
u32 irq_mask;
|
||||
struct regmap_irq_chip_data *irq_data;
|
||||
struct regulator_desc desc[TPS65218_NUM_REGULATOR];
|
||||
struct regulator_dev *rdev[TPS65218_NUM_REGULATOR];
|
||||
struct tps_info *info[TPS65218_NUM_REGULATOR];
|
||||
struct regmap *regmap;
|
||||
};
|
||||
|
||||
int tps65218_reg_read(struct tps65218 *tps, unsigned int reg,
|
||||
unsigned int *val);
|
||||
int tps65218_reg_write(struct tps65218 *tps, unsigned int reg,
|
||||
unsigned int val, unsigned int level);
|
||||
int tps65218_set_bits(struct tps65218 *tps, unsigned int reg,
|
||||
unsigned int mask, unsigned int val, unsigned int level);
|
||||
int tps65218_clear_bits(struct tps65218 *tps, unsigned int reg,
|
||||
unsigned int mask, unsigned int level);
|
||||
|
||||
#endif /* __LINUX_MFD_TPS65218_H */
|
||||
Loading…
Reference in New Issue