mtd: nand: fix incorrect ecc strength values
This fixes a couple of ecc strength values for which I earlier made conservative guesses, but whose correct values were later determined¹ (thanks Ivan). Also sets strength for fsl_ifc_nand, which was merged to mainline after the original patch that set the strength for all drivers. ¹ http://lists.infradead.org/pipermail/linux-mtd/2012-March/040325.html Signed-off-by: Mike Dunn <mikedunn@newsguy.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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@ -476,12 +476,7 @@ static int __devinit bcm_umi_nand_probe(struct platform_device *pdev)
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this->badblock_pattern = &largepage_bbt;
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this->badblock_pattern = &largepage_bbt;
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}
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}
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/*
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this->ecc.strength = 8;
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* FIXME: ecc strength value of 6 bits per 512 bytes of data is a
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* conservative guess, given 13 ecc bytes and using bch alg.
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* (Assume Galois field order m=15 to allow a margin of error.)
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*/
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this->ecc.strength = 6;
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#endif
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#endif
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@ -821,6 +821,7 @@ static int fsl_ifc_chip_init(struct fsl_ifc_mtd *priv)
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/* Hardware generates ECC per 512 Bytes */
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/* Hardware generates ECC per 512 Bytes */
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chip->ecc.size = 512;
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chip->ecc.size = 512;
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chip->ecc.bytes = 8;
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chip->ecc.bytes = 8;
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chip->ecc.strength = 4;
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switch (csor & CSOR_NAND_PGS_MASK) {
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switch (csor & CSOR_NAND_PGS_MASK) {
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case CSOR_NAND_PGS_512:
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case CSOR_NAND_PGS_512:
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@ -332,11 +332,7 @@ static int __devinit jz_nand_probe(struct platform_device *pdev)
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chip->ecc.mode = NAND_ECC_HW_OOB_FIRST;
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chip->ecc.mode = NAND_ECC_HW_OOB_FIRST;
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chip->ecc.size = 512;
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chip->ecc.size = 512;
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chip->ecc.bytes = 9;
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chip->ecc.bytes = 9;
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chip->ecc.strength = 2;
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chip->ecc.strength = 4;
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/*
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* FIXME: ecc_strength value of 2 bits per 512 bytes of data is a
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* conservative guess, given 9 ecc bytes and reed-solomon alg.
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*/
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if (pdata)
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if (pdata)
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chip->ecc.layout = pdata->ecc_layout;
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chip->ecc.layout = pdata->ecc_layout;
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