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staging: qlge: qlge_mpi: Simplify while statements.

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Simplify while loops into more readable and simple for loops.

Signed-off-by: Suraj Upadhyay <usuraj35@gmail.com>
Link: https://lore.kernel.org/r/6eb96e8c074bbdee3838b6421d25b50f1faffb3d.1594642213.git.usuraj35@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Suraj Upadhyay 2020-07-13 17:51:13 +05:30 committed by Greg Kroah-Hartman
parent 73b3044156
commit 45170f100a
1 changed files with 15 additions and 17 deletions
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32
drivers/staging/qlge/qlge_mpi.c
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@ -17,36 +17,34 @@ int ql_unpause_mpi_risc(struct ql_adapter *qdev)
int ql_pause_mpi_risc(struct ql_adapter *qdev) int ql_pause_mpi_risc(struct ql_adapter *qdev)
{ {
u32 tmp; u32 tmp;
int count = UDELAY_COUNT; int count;
/* Pause the RISC */ /* Pause the RISC */
ql_write32(qdev, CSR, CSR_CMD_SET_PAUSE); ql_write32(qdev, CSR, CSR_CMD_SET_PAUSE);
do { for (count = UDELAY_COUNT; count; count--) {
tmp = ql_read32(qdev, CSR); tmp = ql_read32(qdev, CSR);
if (tmp & CSR_RP) if (tmp & CSR_RP)
break; break;
mdelay(UDELAY_DELAY); mdelay(UDELAY_DELAY);
count--; }
} while (count);
return (count == 0) ? -ETIMEDOUT : 0; return (count == 0) ? -ETIMEDOUT : 0;
} }
int ql_hard_reset_mpi_risc(struct ql_adapter *qdev) int ql_hard_reset_mpi_risc(struct ql_adapter *qdev)
{ {
u32 tmp; u32 tmp;
int count = UDELAY_COUNT; int count;
/* Reset the RISC */ /* Reset the RISC */
ql_write32(qdev, CSR, CSR_CMD_SET_RST); ql_write32(qdev, CSR, CSR_CMD_SET_RST);
do { for (count = UDELAY_COUNT; count; count--) {
tmp = ql_read32(qdev, CSR); tmp = ql_read32(qdev, CSR);
if (tmp & CSR_RR) { if (tmp & CSR_RR) {
ql_write32(qdev, CSR, CSR_CMD_CLR_RST); ql_write32(qdev, CSR, CSR_CMD_CLR_RST);
break; break;
} }
mdelay(UDELAY_DELAY); mdelay(UDELAY_DELAY);
count--; }
} while (count);
return (count == 0) ? -ETIMEDOUT : 0; return (count == 0) ? -ETIMEDOUT : 0;
} }
@ -147,15 +145,15 @@ static int ql_get_mb_sts(struct ql_adapter *qdev, struct mbox_params *mbcp)
*/ */
static int ql_wait_mbx_cmd_cmplt(struct ql_adapter *qdev) static int ql_wait_mbx_cmd_cmplt(struct ql_adapter *qdev)
{ {
int count = 100; int count;
u32 value; u32 value;
do { for (count = 100; count; count--) {
value = ql_read32(qdev, STS); value = ql_read32(qdev, STS);
if (value & STS_PI) if (value & STS_PI)
return 0; return 0;
mdelay(UDELAY_DELAY); /* 100ms */ mdelay(UDELAY_DELAY); /* 100ms */
} while (--count); }
return -ETIMEDOUT; return -ETIMEDOUT;
} }
@ -914,10 +912,10 @@ int ql_mb_wol_set_magic(struct ql_adapter *qdev, u32 enable_wol)
static int ql_idc_wait(struct ql_adapter *qdev) static int ql_idc_wait(struct ql_adapter *qdev)
{ {
int status = -ETIMEDOUT; int status = -ETIMEDOUT;
long wait_time = 1 * HZ;
struct mbox_params *mbcp = &qdev->idc_mbc; struct mbox_params *mbcp = &qdev->idc_mbc;
long wait_time;
do { for (wait_time = 1 * HZ; wait_time;) {
/* Wait here for the command to complete /* Wait here for the command to complete
* via the IDC process. * via the IDC process.
*/ */
@ -947,7 +945,7 @@ static int ql_idc_wait(struct ql_adapter *qdev)
status = -EIO; status = -EIO;
break; break;
} }
} while (wait_time); }
return status; return status;
} }
@ -1080,18 +1078,18 @@ static int ql_mb_get_mgmnt_traffic_ctl(struct ql_adapter *qdev, u32 *control)
int ql_wait_fifo_empty(struct ql_adapter *qdev) int ql_wait_fifo_empty(struct ql_adapter *qdev)
{ {
int count = 5; int count;
u32 mgmnt_fifo_empty; u32 mgmnt_fifo_empty;
u32 nic_fifo_empty; u32 nic_fifo_empty;
do { for (count = 6; count; count--) {
nic_fifo_empty = ql_read32(qdev, STS) & STS_NFE; nic_fifo_empty = ql_read32(qdev, STS) & STS_NFE;
ql_mb_get_mgmnt_traffic_ctl(qdev, &mgmnt_fifo_empty); ql_mb_get_mgmnt_traffic_ctl(qdev, &mgmnt_fifo_empty);
mgmnt_fifo_empty &= MB_GET_MPI_TFK_FIFO_EMPTY; mgmnt_fifo_empty &= MB_GET_MPI_TFK_FIFO_EMPTY;
if (nic_fifo_empty && mgmnt_fifo_empty) if (nic_fifo_empty && mgmnt_fifo_empty)
return 0; return 0;
msleep(100); msleep(100);
} while (count-- > 0); }
return -ETIMEDOUT; return -ETIMEDOUT;
} }