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Revert "tty: serial: imx.c: Reset UART before activating interrupts" 

This reverts commit e95044ba4f.

Commit e95044ba4f ("tty: serial: imx.c: Reset UART before activating
interrupts") terribly messes up with the console on mx6 boards, so
let's revert it.

Reported-by: kernelci.org bot <bot@kernelci.org>
Cc: David Jander <david@protonic.nl>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
hifive-unleashed-5.1
Fabio Estevam 2015-07-27 15:15:59 -03:00 committed by Greg Kroah-Hartman
parent 92311e46ec
commit 458e2c82c5
1 changed files with 9 additions and 23 deletions
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32
drivers/tty/serial/imx.c
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@ -1098,23 +1098,10 @@ static void imx_disable_dma(struct imx_port *sport)
/* half the RX buffer size */
#define CTSTL 16
static inline void imx_reset(struct imx_port *sport)
{
int i = 100;
unsigned long temp;
temp = readl(sport->port.membase + UCR2);
temp &= ~UCR2_SRST;
writel(temp, sport->port.membase + UCR2);
while (!(readl(sport->port.membase + UCR2) & UCR2_SRST) && (--i > 0))
udelay(1);
}
static int imx_startup(struct uart_port *port)
{
struct imx_port *sport = (struct imx_port *)port;
int retval;
int retval, i;
unsigned long flags, temp;
retval = clk_prepare_enable(sport->clk_per);
@ -1141,7 +1128,14 @@ static int imx_startup(struct uart_port *port)
spin_lock_irqsave(&sport->port.lock, flags);
/* Reset fifo's and state machines */
imx_reset(sport);
i = 100;
temp = readl(sport->port.membase + UCR2);
temp &= ~UCR2_SRST;
writel(temp, sport->port.membase + UCR2);
while (!(readl(sport->port.membase + UCR2) & UCR2_SRST) && (--i > 0))
udelay(1);
/*
* Finally, clear and enable interrupts
@ -1980,14 +1974,6 @@ static int serial_imx_probe(struct platform_device *pdev)
clk_disable_unprepare(sport->clk_ipg);
/*
* Perform a complete reset of the UART device. Needed if we don't
* come straight out of reset.
*/
writel(0, sport->port.membase + UCR2);
writel(0, sport->port.membase + UCR1);
imx_reset(sport);
/*
* Allocate the IRQ(s) i.MX1 has three interrupts whereas later
* chips only have one interrupt.