clocksource/drivers/h8300: Cleanup startup and remove module code.
Remove some legacy code and replace it by the clksrc-of code. Do some cleanup and code consolidation. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>hifive-unleashed-5.1
Yoshinori Sato
Daniel Lezcano
parent
9115df89d1
commit
4633f4cac8
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@ -17,6 +17,8 @@
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <asm/segment.h>
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#include <asm/irq.h>
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@ -47,9 +49,7 @@
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#define ABSOLUTE 1
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struct timer16_priv {
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struct platform_device *pdev;
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struct clocksource cs;
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struct irqaction irqaction;
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unsigned long total_cycles;
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unsigned long mapbase;
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unsigned long mapcommon;
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@ -144,110 +144,77 @@ static void timer16_disable(struct clocksource *cs)
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p->cs_enabled = false;
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}
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static struct timer16_priv timer16_priv = {
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.cs = {
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.name = "h8300_16timer",
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.rating = 200,
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.read = timer16_clocksource_read,
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.enable = timer16_enable,
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.disable = timer16_disable,
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.mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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},
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};
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#define REG_CH 0
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#define REG_COMM 1
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static int timer16_setup(struct timer16_priv *p, struct platform_device *pdev)
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static void __init h8300_16timer_init(struct device_node *node)
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{
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struct resource *res[2];
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void __iomem *base[2];
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int ret, irq;
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unsigned int ch;
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struct clk *clk;
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p->pdev = pdev;
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res[REG_CH] = platform_get_resource(p->pdev,
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IORESOURCE_MEM, REG_CH);
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res[REG_COMM] = platform_get_resource(p->pdev,
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IORESOURCE_MEM, REG_COMM);
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if (!res[REG_CH] || !res[REG_COMM]) {
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dev_err(&p->pdev->dev, "failed to get I/O memory\n");
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return -ENXIO;
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clk = of_clk_get(node, 0);
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if (IS_ERR(clk)) {
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pr_err("failed to get clock for clocksource\n");
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return;
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}
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irq = platform_get_irq(p->pdev, 0);
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base[REG_CH] = of_iomap(node, 0);
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if (!base[REG_CH]) {
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pr_err("failed to map registers for clocksource\n");
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goto free_clk;
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}
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base[REG_COMM] = of_iomap(node, 1);
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if (!base[REG_COMM]) {
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pr_err("failed to map registers for clocksource\n");
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goto unmap_ch;
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}
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irq = irq_of_parse_and_map(node, 0);
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if (irq < 0) {
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dev_err(&p->pdev->dev, "failed to get irq\n");
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return irq;
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pr_err("failed to get irq for clockevent\n");
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goto unmap_comm;
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}
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p->clk = clk_get(&p->pdev->dev, "fck");
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if (IS_ERR(p->clk)) {
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dev_err(&p->pdev->dev, "can't get clk\n");
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return PTR_ERR(p->clk);
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}
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of_property_read_u32(p->pdev->dev.of_node, "renesas,channel", &ch);
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of_property_read_u32(node, "renesas,channel", &ch);
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p->pdev = pdev;
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p->mapbase = res[REG_CH]->start;
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p->mapcommon = res[REG_COMM]->start;
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p->enb = 1 << ch;
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p->imfa = 1 << ch;
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p->imiea = 1 << (4 + ch);
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p->cs.name = pdev->name;
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p->cs.rating = 200;
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p->cs.read = timer16_clocksource_read;
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p->cs.enable = timer16_enable;
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p->cs.disable = timer16_disable;
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p->cs.mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8);
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p->cs.flags = CLOCK_SOURCE_IS_CONTINUOUS;
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timer16_priv.mapbase = (unsigned long)base[REG_CH];
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timer16_priv.mapcommon = (unsigned long)base[REG_COMM];
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timer16_priv.enb = 1 << ch;
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timer16_priv.imfa = 1 << ch;
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timer16_priv.imiea = 1 << (4 + ch);
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ret = request_irq(irq, timer16_interrupt,
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IRQF_TIMER, pdev->name, p);
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IRQF_TIMER, timer16_priv.cs.name, &timer16_priv);
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if (ret < 0) {
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dev_err(&p->pdev->dev, "failed to request irq %d\n", irq);
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return ret;
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pr_err("failed to request irq %d of clocksource\n", irq);
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goto unmap_comm;
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}
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clocksource_register_hz(&p->cs, clk_get_rate(p->clk) / 8);
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clocksource_register_hz(&timer16_priv.cs,
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clk_get_rate(timer16_priv.clk) / 8);
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return;
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return 0;
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unmap_comm:
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iounmap(base[REG_COMM]);
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unmap_ch:
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iounmap(base[REG_CH]);
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free_clk:
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clk_put(clk);
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}
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static int timer16_probe(struct platform_device *pdev)
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{
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struct timer16_priv *p = platform_get_drvdata(pdev);
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if (p) {
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dev_info(&pdev->dev, "kept as earlytimer\n");
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return 0;
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}
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p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
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if (!p)
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return -ENOMEM;
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return timer16_setup(p, pdev);
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}
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static int timer16_remove(struct platform_device *pdev)
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{
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return -EBUSY;
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}
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static const struct of_device_id timer16_of_table[] = {
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{ .compatible = "renesas,16bit-timer" },
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{ }
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};
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static struct platform_driver timer16_driver = {
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.probe = timer16_probe,
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.remove = timer16_remove,
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.driver = {
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.name = "h8300h-16timer",
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.of_match_table = of_match_ptr(timer16_of_table),
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}
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};
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static int __init timer16_init(void)
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{
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return platform_driver_register(&timer16_driver);
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}
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static void __exit timer16_exit(void)
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{
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platform_driver_unregister(&timer16_driver);
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}
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subsys_initcall(timer16_init);
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module_exit(timer16_exit);
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MODULE_AUTHOR("Yoshinori Sato");
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MODULE_DESCRIPTION("H8/300H 16bit Timer Driver");
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MODULE_LICENSE("GPL v2");
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CLOCKSOURCE_OF_DECLARE(h8300_16bit, "renesas,16bit-timer", h8300_16timer_init);
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@ -12,13 +12,14 @@
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/clockchips.h>
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#include <linux/module.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <asm/irq.h>
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@ -39,10 +40,10 @@
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#define RELATIVE 0
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#define ABSOLUTE 1
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#define SCALE 64
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struct timer8_priv {
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struct platform_device *pdev;
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struct clock_event_device ced;
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struct irqaction irqaction;
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unsigned long mapbase;
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raw_spinlock_t lock;
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unsigned long flags;
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@ -111,7 +112,7 @@ static void timer8_set_next(struct timer8_priv *p, unsigned long delta)
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static int timer8_enable(struct timer8_priv *p)
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{
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p->rate = clk_get_rate(p->pclk) / 64;
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p->rate = clk_get_rate(p->pclk) / SCALE;
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ctrl_outw(0xffff, p->mapbase + TCORA);
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ctrl_outw(0x0000, p->mapbase + _8TCNT);
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ctrl_outw(0x0c02, p->mapbase + _8TCR);
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@ -179,7 +180,7 @@ static int timer8_clock_event_periodic(struct clock_event_device *ced)
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{
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struct timer8_priv *p = ced_to_priv(ced);
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dev_info(&p->pdev->dev, "used for periodic clock events\n");
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pr_info("%s: used for periodic clock events\n", ced->name);
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timer8_stop(p);
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timer8_clock_event_start(p, PERIODIC);
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@ -190,7 +191,7 @@ static int timer8_clock_event_oneshot(struct clock_event_device *ced)
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{
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struct timer8_priv *p = ced_to_priv(ced);
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dev_info(&p->pdev->dev, "used for oneshot clock events\n");
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pr_info("%s: used for oneshot clock events\n", ced->name);
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timer8_stop(p);
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timer8_clock_event_start(p, ONESHOT);
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@ -208,110 +209,61 @@ static int timer8_clock_event_next(unsigned long delta,
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return 0;
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}
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static int timer8_setup(struct timer8_priv *p,
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struct platform_device *pdev)
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static struct timer8_priv timer8_priv = {
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.ced = {
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.name = "h8300_8timer",
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.rating = 200,
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.set_next_event = timer8_clock_event_next,
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.set_state_shutdown = timer8_clock_event_shutdown,
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.set_state_periodic = timer8_clock_event_periodic,
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.set_state_oneshot = timer8_clock_event_oneshot,
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},
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};
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static void __init h8300_8timer_init(struct device_node *node)
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{
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struct resource *res;
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void __iomem *base;
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int irq;
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int ret;
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int ret = 0;
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int rate;
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struct clk *clk;
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p->pdev = pdev;
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res = platform_get_resource(p->pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(&p->pdev->dev, "failed to get I/O memory\n");
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return -ENXIO;
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clk = of_clk_get(node, 0);
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if (IS_ERR(clk)) {
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pr_err("failed to get clock for clockevent\n");
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return;
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}
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irq = platform_get_irq(p->pdev, 0);
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base = of_iomap(node, 0);
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if (!base) {
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pr_err("failed to map registers for clockevent\n");
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goto free_clk;
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}
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irq = irq_of_parse_and_map(node, 0);
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if (irq < 0) {
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dev_err(&p->pdev->dev, "failed to get irq\n");
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return -ENXIO;
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pr_err("failed to get irq for clockevent\n");
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goto unmap_reg;
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}
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p->mapbase = res->start;
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timer8_priv.mapbase = (unsigned long)base;
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timer8_priv.pclk = clk;
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p->irqaction.name = dev_name(&p->pdev->dev);
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p->irqaction.handler = timer8_interrupt;
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p->irqaction.dev_id = p;
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p->irqaction.flags = IRQF_TIMER;
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p->pclk = clk_get(&p->pdev->dev, "fck");
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if (IS_ERR(p->pclk)) {
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dev_err(&p->pdev->dev, "can't get clk\n");
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return PTR_ERR(p->pclk);
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}
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p->ced.name = pdev->name;
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p->ced.features = CLOCK_EVT_FEAT_PERIODIC |
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CLOCK_EVT_FEAT_ONESHOT;
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p->ced.rating = 200;
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p->ced.cpumask = cpumask_of(0);
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p->ced.set_next_event = timer8_clock_event_next;
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p->ced.set_state_shutdown = timer8_clock_event_shutdown;
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p->ced.set_state_periodic = timer8_clock_event_periodic;
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p->ced.set_state_oneshot = timer8_clock_event_oneshot;
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ret = setup_irq(irq, &p->irqaction);
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ret = request_irq(irq, timer8_interrupt,
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IRQF_TIMER, timer8_priv.ced.name, &timer8_priv);
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if (ret < 0) {
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dev_err(&p->pdev->dev,
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"failed to request irq %d\n", irq);
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return ret;
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pr_err("failed to request irq %d for clockevent\n", irq);
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goto unmap_reg;
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}
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clockevents_register_device(&p->ced);
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platform_set_drvdata(pdev, p);
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rate = clk_get_rate(clk) / SCALE;
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clockevents_config_and_register(&timer8_priv.ced, rate, 1, 0x0000ffff);
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return;
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return 0;
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unmap_reg:
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iounmap(base);
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free_clk:
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clk_put(clk);
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}
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static int timer8_probe(struct platform_device *pdev)
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{
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struct timer8_priv *p = platform_get_drvdata(pdev);
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if (p) {
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dev_info(&pdev->dev, "kept as earlytimer\n");
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return 0;
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}
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p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
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if (!p)
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return -ENOMEM;
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return timer8_setup(p, pdev);
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}
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static int timer8_remove(struct platform_device *pdev)
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{
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return -EBUSY;
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}
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static const struct of_device_id timer8_of_table[] __maybe_unused = {
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{ .compatible = "renesas,8bit-timer" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, timer8_of_table);
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static struct platform_driver timer8_driver = {
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.probe = timer8_probe,
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.remove = timer8_remove,
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.driver = {
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.name = "h8300-8timer",
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.of_match_table = of_match_ptr(timer8_of_table),
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}
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};
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static int __init timer8_init(void)
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{
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return platform_driver_register(&timer8_driver);
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}
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static void __exit timer8_exit(void)
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{
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platform_driver_unregister(&timer8_driver);
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}
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subsys_initcall(timer8_init);
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module_exit(timer8_exit);
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MODULE_AUTHOR("Yoshinori Sato");
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MODULE_DESCRIPTION("H8/300 8bit Timer Driver");
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MODULE_LICENSE("GPL v2");
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CLOCKSOURCE_OF_DECLARE(h8300_8bit, "renesas,8bit-timer", h8300_8timer_init);
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@ -1,5 +1,5 @@
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/*
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* H8/300 TPU Driver
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* H8S TPU Driver
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*
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* Copyright 2015 Yoshinori Sato <ysato@users.sourcefoge.jp>
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*
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@ -17,8 +17,8 @@
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <asm/irq.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#define TCR 0
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#define TMDR 1
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@ -32,9 +32,7 @@
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#define TGRD 14
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struct tpu_priv {
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struct platform_device *pdev;
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struct clocksource cs;
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struct clk *clk;
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unsigned long mapbase1;
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unsigned long mapbase2;
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raw_spinlock_t lock;
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@ -116,91 +114,54 @@ static void tpu_clocksource_disable(struct clocksource *cs)
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p->cs_enabled = false;
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}
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static struct tpu_priv tpu_priv = {
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.cs = {
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.name = "H8S_TPU",
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.rating = 200,
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.read = tpu_clocksource_read,
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.enable = tpu_clocksource_enable,
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.disable = tpu_clocksource_disable,
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.mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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},
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};
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#define CH_L 0
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#define CH_H 1
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static int __init tpu_setup(struct tpu_priv *p, struct platform_device *pdev)
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static void __init h8300_tpu_init(struct device_node *node)
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{
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struct resource *res[2];
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void __iomem *base[2];
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struct clk *clk;
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p->pdev = pdev;
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res[CH_L] = platform_get_resource(p->pdev, IORESOURCE_MEM, CH_L);
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res[CH_H] = platform_get_resource(p->pdev, IORESOURCE_MEM, CH_H);
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if (!res[CH_L] || !res[CH_H]) {
|
||||
dev_err(&p->pdev->dev, "failed to get I/O memory\n");
|
||||
return -ENXIO;
|
||||
clk = of_clk_get(node, 0);
|
||||
if (IS_ERR(clk)) {
|
||||
pr_err("failed to get clock for clocksource\n");
|
||||
return;
|
||||
}
|
||||
|
||||
p->clk = clk_get(&p->pdev->dev, "fck");
|
||||
if (IS_ERR(p->clk)) {
|
||||
dev_err(&p->pdev->dev, "can't get clk\n");
|
||||
return PTR_ERR(p->clk);
|
||||
base[CH_L] = of_iomap(node, CH_L);
|
||||
if (!base[CH_L]) {
|
||||
pr_err("failed to map registers for clocksource\n");
|
||||
goto free_clk;
|
||||
}
|
||||
base[CH_H] = of_iomap(node, CH_H);
|
||||
if (!base[CH_H]) {
|
||||
pr_err("failed to map registers for clocksource\n");
|
||||
goto unmap_L;
|
||||
}
|
||||
|
||||
p->mapbase1 = res[CH_L]->start;
|
||||
p->mapbase2 = res[CH_H]->start;
|
||||
tpu_priv.mapbase1 = (unsigned long)base[CH_L];
|
||||
tpu_priv.mapbase2 = (unsigned long)base[CH_H];
|
||||
|
||||
p->cs.name = pdev->name;
|
||||
p->cs.rating = 200;
|
||||
p->cs.read = tpu_clocksource_read;
|
||||
p->cs.enable = tpu_clocksource_enable;
|
||||
p->cs.disable = tpu_clocksource_disable;
|
||||
p->cs.mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8);
|
||||
p->cs.flags = CLOCK_SOURCE_IS_CONTINUOUS;
|
||||
clocksource_register_hz(&p->cs, clk_get_rate(p->clk) / 64);
|
||||
platform_set_drvdata(pdev, p);
|
||||
clocksource_register_hz(&tpu_priv.cs, clk_get_rate(clk) / 64);
|
||||
|
||||
return 0;
|
||||
return;
|
||||
|
||||
unmap_L:
|
||||
iounmap(base[CH_H]);
|
||||
free_clk:
|
||||
clk_put(clk);
|
||||
}
|
||||
|
||||
static int tpu_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct tpu_priv *p = platform_get_drvdata(pdev);
|
||||
|
||||
if (p) {
|
||||
dev_info(&pdev->dev, "kept as earlytimer\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
|
||||
if (!p)
|
||||
return -ENOMEM;
|
||||
|
||||
return tpu_setup(p, pdev);
|
||||
}
|
||||
|
||||
static int tpu_remove(struct platform_device *pdev)
|
||||
{
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
static const struct of_device_id tpu_of_table[] = {
|
||||
{ .compatible = "renesas,tpu" },
|
||||
{ }
|
||||
};
|
||||
|
||||
static struct platform_driver tpu_driver = {
|
||||
.probe = tpu_probe,
|
||||
.remove = tpu_remove,
|
||||
.driver = {
|
||||
.name = "h8s-tpu",
|
||||
.of_match_table = of_match_ptr(tpu_of_table),
|
||||
}
|
||||
};
|
||||
|
||||
static int __init tpu_init(void)
|
||||
{
|
||||
return platform_driver_register(&tpu_driver);
|
||||
}
|
||||
|
||||
static void __exit tpu_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&tpu_driver);
|
||||
}
|
||||
|
||||
subsys_initcall(tpu_init);
|
||||
module_exit(tpu_exit);
|
||||
MODULE_AUTHOR("Yoshinori Sato");
|
||||
MODULE_DESCRIPTION("H8S Timer Pulse Unit Driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
CLOCKSOURCE_OF_DECLARE(h8300_tpu, "renesas,tpu", h8300_tpu_init);
|
||||
|
|
|
|||
Loading…
Reference in New Issue