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ARM: dts: exynos: Add DT nodes for PRNG in Exynos5 SoCs 

Add nodes for Pseudo Random Number Generator in dts files describing
Exynos5 chips.

Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
hifive-unleashed-5.1
Łukasz Stelmach 2017-12-11 09:54:15 +01:00 committed by Krzysztof Kozlowski
parent 6351fe9375
commit 465def2ad4
4 changed files with 20 additions and 0 deletions
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5
arch/arm/boot/dts/exynos5.dtsi
View File

@ -211,6 +211,11 @@
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
};
prng: rng@10830400 {
compatible = "samsung,exynos5250-prng";
reg = <0x10830400 0x200>;
};
g2d: g2d@10850000 {
compatible = "samsung,exynos5250-g2d";
reg = <0x10850000 0x1000>;

5
arch/arm/boot/dts/exynos5250.dtsi
View File

@ -1061,6 +1061,11 @@
pinctrl-0 = <&i2c3_bus>;
};
&prng {
clocks = <&clock CLK_SSS>;
clock-names = "secss";
};
&pwm {
clocks = <&clock CLK_PWM>;
clock-names = "timers";

5
arch/arm/boot/dts/exynos5410.dtsi
View File

@ -333,6 +333,11 @@
clock-names = "fin_pll", "mct";
};
&prng {
clocks = <&clock CLK_SSS>;
clock-names = "secss";
};
&pwm {
clocks = <&clock CLK_PWM>;
clock-names = "timers";

5
arch/arm/boot/dts/exynos5420.dtsi
View File

@ -1429,6 +1429,11 @@
clock-names = "fin_pll", "mct";
};
&prng {
clocks = <&clock CLK_SSS>;
clock-names = "secss";
};
&pwm {
clocks = <&clock CLK_PWM>;
clock-names = "timers";